JP2685890B2 - Electrode forming method for chip parts - Google Patents
Electrode forming method for chip partsInfo
- Publication number
- JP2685890B2 JP2685890B2 JP1101719A JP10171989A JP2685890B2 JP 2685890 B2 JP2685890 B2 JP 2685890B2 JP 1101719 A JP1101719 A JP 1101719A JP 10171989 A JP10171989 A JP 10171989A JP 2685890 B2 JP2685890 B2 JP 2685890B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- glass
- conductive layer
- electrode
- conductive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、チツプ抵抗やチツプコンデンサ等のチツプ
部品に必要とされる電極の形成方法に関する。Description: TECHNICAL FIELD The present invention relates to a method for forming an electrode required for a chip component such as a chip resistor or a chip capacitor.
第３図は、チツプ部品の一例であるチツプ抵抗の従来
例を示す断面図である。同図に示すように、チツプ抵抗
１は、セラミツク基板３の表面にサーメツト等の抵抗体
４を形成した本体２と、この本体２の両端面に被着され
て抵抗体４に導通する電極５とから主に構成されてい
る。両電極５はそれぞれ、ガラス成分中に銀または銀・
パラジウムを混入した導電層６と、導電層６中の銀くわ
れを防止するためのニツケルメツキ層７と、はんだぬれ
性を確保するためのはんだメツキ層８とで構成されて、
これらは下から順に積層されている。また、抵抗体４の
表面にはガラス等からなるオーバーコート層９が形成さ
れている。FIG. 3 is a sectional view showing a conventional example of a chip resistor which is an example of a chip component. As shown in the figure, the chip resistor 1 is composed of a main body 2 in which a resistor 4 such as a thermist is formed on the surface of a ceramic substrate 3, and an electrode 5 which is attached to both end faces of the main body 2 and conducts to the resistor 4. It is mainly composed of and. Both electrodes 5 have silver or silver.
It is composed of a conductive layer 6 containing palladium, a nickel plating layer 7 for preventing silver cracks in the conductive layer 6, and a solder plating layer 8 for ensuring solder wettability.
These are stacked in order from the bottom. An overcoat layer 9 made of glass or the like is formed on the surface of the resistor 4.
前記電極５を形成する工程を説明すると、まず、銀ペ
ースト（または銀・パラジウムペースト）とガラスペー
ストとを所定比で混合したメタルグレーズをセラミツク
基板３にスクリーン印刷等でコーテイングし、これを乾
燥・焼成して導電層６を形成する。次いで、この導電層
６の表面にニツケルをメツキしてニツケルメツキ層７を
形成し、さらにこのニツケルメツキ層７の表面に、例え
ばスズと鉛とからなるはんだをメツキしてはんだメツキ
層８を形成する。The step of forming the electrode 5 will be described. First, a metal glaze obtained by mixing a silver paste (or a silver / palladium paste) and a glass paste at a predetermined ratio is coated on the ceramic substrate 3 by screen printing or the like, and dried. The conductive layer 6 is formed by firing. Next, a nickel plating is formed on the surface of the conductive layer 6 to form a nickel plating layer 7, and then a solder plating layer 8 is formed on the surface of the nickel plating layer 7 by plating a solder composed of, for example, tin and lead.
このように構成されたチツプ抵抗１は、図示省略した
プリント配線板に面実装されるが、この場合、予めペー
スト状のはんだを塗布しておいたプリント配線板のラン
ドに前記電極５を合致させてチツプ抵抗１を搭載した
後、リフロー炉等ではんだを溶融させて電極５をランド
にはんだ付けする。The chip resistor 1 configured as described above is surface-mounted on a printed wiring board (not shown). In this case, the electrodes 5 are aligned with the lands of the printed wiring board to which paste solder is applied in advance. After mounting the chip resistor 1, the solder is melted in a reflow furnace or the like to solder the electrode 5 to the land.
ところで、チツプ部品の電極には適度の機械強度が必
要であり、これが弱すぎると、チツプ部品をプリント配
線板にはんだ付け後に該プリント配線板にソリや振動等
のストレスが加つた際に、電極にクラツクが入るという
不具合を生じる。かかる電極の機械強度は、セラミツク
基板に対する導電層の密着力によつてほぼ決定され、導
電層に占めるガラス成分を増加することにより、電極強
度を高められることが知られている。しかしながら、こ
のようにガラス成分を増やして電極強度を高めようとす
ると、それに反比例して、その後のメツキ工程で形成さ
れるニツケルメツキ層が導電層の表面に付きにくくなる
ため、現状は、電極の機械強度をある程度犠牲にしてメ
ツキ工程におけるメツキ付性を確保するようにしてい
た。By the way, the electrode of the chip component needs to have an appropriate mechanical strength, and if it is too weak, the electrode will be deformed when the chip component is soldered to the printed wiring board and stress such as warpage or vibration is applied to the printed wiring board. There is a problem that a crack is introduced into. It is known that the mechanical strength of such an electrode is substantially determined by the adhesion of the conductive layer to the ceramic substrate, and the electrode strength can be increased by increasing the glass component in the conductive layer. However, if an attempt is made to increase the electrode strength by increasing the glass component in this manner, the nickel plating layer formed in the subsequent plating step is less likely to adhere to the surface of the conductive layer in inverse proportion to the above, and therefore the current state of the electrode mechanical The strength was sacrificed to some extent to ensure the sticking property in the plating process.
本発明はこのような実情に鑑みてなされたものであ
り、その目的は、導電層に対する金属メツキ層のメツキ
付性を損なうことなく、電極の機械強度を飛躍的に高め
られるチツプ部品を提供することにある。The present invention has been made in view of the above circumstances, and an object thereof is to provide a chip component capable of dramatically increasing the mechanical strength of an electrode without impairing the metal sticking property of the metal plating layer to the conductive layer. Especially.
上記目的を達成するために、本発明は、セラミツク基
板にガラスペーストをコーティングし、これを乾燥・焼
成してガラス層を形成した後、このガラス層上に導電ペ
ーストとガラスペーストとを混合したメタルグレーズを
コーテイングし、これを乾燥・焼成して導電層を形成
し、しかる後、この導電層上に金属メツキ層とはんだメ
ツキ層とを順次被着する工程を採用した。In order to achieve the above-mentioned object, the present invention coats a ceramic substrate with a glass paste, forms a glass layer by drying and firing the glass paste, and then a metal obtained by mixing a conductive paste and a glass paste on the glass layer. A step of coating the glaze, drying and firing it to form a conductive layer, and then successively depositing a metal plating layer and a solder plating layer on this conductive layer was adopted.
上記の如く、セラミツク基板に導電ペーストを含まな
いガラス層を形成した後、このガラス層の表面に導電層
を形成すると、導電層に占めるガラス成分が少なくて
も、ガラス層と導電層間の密着は両層のガラス成分によ
つて極めて高いものとなる。また、導電層に占める導電
成分の減少がないため、導電層の表面に金属メツキ層を
確実に被着・形成することができる。As described above, after forming a glass layer containing no conductive paste on the ceramic substrate, and forming a conductive layer on the surface of this glass layer, even if the glass component occupying the conductive layer is small, the adhesion between the glass layer and the conductive layer It becomes extremely high due to the glass components of both layers. Further, since the conductive component occupying the conductive layer is not reduced, the metal plating layer can be surely deposited / formed on the surface of the conductive layer.
以下、本発明の実施例を図に基づいて説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例に係るチツプ部品の要部断
面図であり、第３図に対応する部品には同一符号を付し
てある。FIG. 1 is a sectional view of an essential part of a chip part according to an embodiment of the present invention, and parts corresponding to FIG. 3 are designated by the same reference numerals.
本実施例が前述した従来例と異なる点は、セラミツク
基板３と導電層６との間にガラス層10を介在したことに
あり、その余の構成は同様である。すなわち、セラミツ
ク基板３にはガラス層10と、ガラス成分中に銀または銀
・パラジウムを混入した導電層６と、銀くわれ防止用の
ニツケルメツキ層７と、はんだぬれ性を確保するための
はんだメツキ層８とが下から順に積層されており、これ
ら四層で電極５が構成されている。The present embodiment is different from the above-mentioned conventional example in that the glass layer 10 is interposed between the ceramic substrate 3 and the conductive layer 6, and the rest of the configuration is the same. That is, the ceramic substrate 3 has a glass layer 10, a conductive layer 6 in which silver or silver / palladium is mixed in a glass component, a nickel plating layer 7 for preventing silver cracks, and a solder plating for ensuring solder wettability. Layer 8 and layer 8 are stacked in order from the bottom, and the electrode 5 is composed of these four layers.
次に、このように構成された電極５の形成方法を第２
図に基づいて説明する。Next, a second method for forming the electrode 5 thus configured will be described.
Description will be made based on the drawings.
まず、第２図（ａ）に示すように、セラミツク基板３
の端面にガラスペーストをスクリーン印刷法あるいは塗
布法によりコーテイングし、これを乾燥・焼成してガラ
ス層10を形成する。このガラス層10は導電成分を含まな
いため、セラミツク基板３に対して堅固に密着される。First, as shown in FIG. 2 (a), the ceramic substrate 3
The glass layer 10 is formed by coating the glass paste on the end face of the glass paste by a screen printing method or a coating method, and drying and baking the glass paste. Since the glass layer 10 does not contain a conductive component, it is firmly adhered to the ceramic substrate 3.
次いで、第２図（ｂ）に示すように、銀ペースト（ま
たは銀・パラジウムペースト）とガラスペーストとを所
定比で混合したメタルグレーズを前記ガラス層10の表面
にスクリーン印刷法または塗布法によりコーテイング
し、これを乾燥・焼成して導電層６を形成する。この場
合、導電層６に占める導電成分とガラス成分の比率は、
後のメツキ工程におけるメツキ付性を考慮して導電成分
がリツチ状態になるように設定しなければならないが、
ガラス層10と導電層７とは両層のガラス成分が焼成時に
結合することによつて堅固に密着される。Then, as shown in FIG. 2B, a metal glaze obtained by mixing a silver paste (or a silver / palladium paste) and a glass paste in a predetermined ratio is coated on the surface of the glass layer 10 by a screen printing method or a coating method. Then, this is dried and fired to form the conductive layer 6. In this case, the ratio of the conductive component and the glass component in the conductive layer 6 is
It must be set so that the conductive component is in the latched state in consideration of the sticking property in the subsequent plating process.
The glass layer 10 and the conductive layer 7 are firmly adhered to each other by bonding the glass components of both layers during firing.
しかる後、第２図（ｃ）に示すように、導電層６の表
面に電解メツキ法にてニツケルメツキ層７を形成する。
この場合、前述の如く、導電層６は導電成分リツチ状態
となつているため、導電層６に対するニツケルメツキ層
７の密着性は良好なものとなる。Then, as shown in FIG. 2 (c), a nickel plating layer 7 is formed on the surface of the conductive layer 6 by an electrolytic plating method.
In this case, since the conductive layer 6 is in the conductive component-rich state as described above, the adhesion of the nickel plating layer 7 to the conductive layer 6 becomes good.
最後に、第２図（ｄ）に示すように、ニツケルメツキ
層７の表面に電解メツキ法にてスズと鉛を析出させ、は
んだメツキ層８を形成する。Finally, as shown in FIG. 2D, tin and lead are deposited on the surface of the nickel plating layer 7 by the electrolytic plating method to form the solder plating layer 8.
このように、上記実施例にあつては、導電成分がリツ
チ状態の導電層６を用いたにも拘らず、導電層６をその
下層のガラス層を利用してセラミツク基板３に対し堅固
に密着させることができる。このため、メツキ付性を損
なうことなく、電極５の機械強度を大幅に高めることが
できる。As described above, in the above-described embodiment, the conductive layer 6 is firmly adhered to the ceramic substrate 3 by using the glass layer below the conductive layer 6 in spite of using the conductive layer 6 in which the conductive component is in the lit state. Can be made. Therefore, the mechanical strength of the electrode 5 can be significantly increased without impairing the plating property.
なお、上記実施例では、銀くわれ防止用の金属メツキ
層の一例としてニツケルメツキ層７を挙げたが、これに
代えて亜鉛メツキやスズメツキ等の他の金属メツキ層を
用いることも可能である。In the above-mentioned embodiment, the nickel plating layer 7 is given as an example of the metal plating layer for preventing silver nicks, but it is also possible to use other metal plating layers such as zinc plating and tin plating instead of this.
また、上記実施例は、本発明をチツプ抵抗に適用した
場合について説明したが、それ以外のチツプ部品、例え
ばチツプコンデンサ等にも適用できるのはいうまでもな
い。Further, although the above embodiments have been described with respect to the case where the present invention is applied to the chip resistor, it is needless to say that the present invention can be applied to other chip parts such as a chip capacitor.
以上説明したように、本発明によれば、導電層に対す
る金属メツキ層のメツキ付性を損なうことなく、導電層
をセラミツク基板に対して強固に密着させることがで
き、それ故、機械強度が高くクラツクの入りにくい電極
を備えたチツプ部品を提供することができる。As described above, according to the present invention, the conductive layer can be firmly adhered to the ceramic substrate without impairing the messiness of the metal plated layer to the conductive layer, and therefore the mechanical strength is high. It is possible to provide a chip component provided with an electrode that does not easily crack.
第１図は本発明の一実施例に係るチツプ部品の電極を示
す要部断面図、第２図はその電極の形成方法を示す工程
図、第３図は従来のチツプ部品の断面図である。 ３……セラミツク基板、５……電極、６……導電層、７
……ニツケルメツキ層（金属メツキ層）、８……はんだ
メツキ層。FIG. 1 is a sectional view of an essential part showing an electrode of a chip part according to an embodiment of the present invention, FIG. 2 is a process diagram showing a method of forming the electrode, and FIG. 3 is a sectional view of a conventional chip part. . 3 ... Ceramic substrate, 5 ... Electrode, 6 ... Conductive layer, 7
...... Nickel plating layer (metal plating layer), 8 ...... Soldering plating layer.
Claims (1)
イングし、これを乾燥・焼成してガラス層を形成した
後、このガラス層上に導電ペーストとガラスペーストと
を混合したメタルグレーズをコーテイングし、これを乾
燥・焼成して導電層を形成し、しかる後、この導電層上
に金属メツキ層とはんだメツキ層とを順次被着したこと
を特徴とするチツプ部品の電極形成方法。1. A ceramic substrate is coated with a glass paste, which is dried and fired to form a glass layer, and then a metal glaze obtained by mixing a conductive paste and a glass paste is coated on the glass layer. A method for forming an electrode of a chip part, comprising forming a conductive layer by drying and baking, and then sequentially depositing a metal plating layer and a solder plating layer on the conductive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1101719A JP2685890B2 (en) | 1989-04-24 | 1989-04-24 | Electrode forming method for chip parts |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1101719A JP2685890B2 (en) | 1989-04-24 | 1989-04-24 | Electrode forming method for chip parts |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02281711A JPH02281711A (en) | 1990-11-19 |
| JP2685890B2 true JP2685890B2 (en) | 1997-12-03 |
Family
ID=14308114
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1101719A Expired - Lifetime JP2685890B2 (en) | 1989-04-24 | 1989-04-24 | Electrode forming method for chip parts |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2685890B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001035740A (en) * | 1999-07-23 | 2001-02-09 | Taiyo Kagaku Kogyo Kk | Electronic component equipped with external terminal electrode and manufacture thereof |
| KR100465845B1 (en) * | 2002-07-12 | 2005-01-13 | 삼화콘덴서공업주식회사 | Multi layered ceramic capacitor and composition of the electrode |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5969908A (en) * | 1982-10-15 | 1984-04-20 | 松下電器産業株式会社 | Method of forming external electrode of chip type electronicpart |
-
1989
- 1989-04-24 JP JP1101719A patent/JP2685890B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02281711A (en) | 1990-11-19 |
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