JPH01194391A - Manufacture of wiring board - Google Patents
Manufacture of wiring boardInfo
- Publication number
- JPH01194391A JPH01194391A JP1812188A JP1812188A JPH01194391A JP H01194391 A JPH01194391 A JP H01194391A JP 1812188 A JP1812188 A JP 1812188A JP 1812188 A JP1812188 A JP 1812188A JP H01194391 A JPH01194391 A JP H01194391A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- hole
- plating
- copper
- resist
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 238000007747 plating Methods 0.000 claims abstract description 17
- 229910000679 solder Inorganic materials 0.000 claims abstract description 12
- 239000003054 catalyst Substances 0.000 claims abstract description 9
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 7
- 229910052802 copper Inorganic materials 0.000 claims abstract description 5
- 239000010949 copper Substances 0.000 claims abstract description 5
- 239000000463 material Substances 0.000 claims abstract description 4
- 238000000034 method Methods 0.000 claims description 10
- 239000000654 additive Substances 0.000 claims description 6
- 238000003780 insertion Methods 0.000 claims description 2
- 230000037431 insertion Effects 0.000 claims description 2
- 238000005530 etching Methods 0.000 abstract description 7
- 239000011889 copper foil Substances 0.000 abstract description 2
- 238000005553 drilling Methods 0.000 abstract description 2
- 230000035515 penetration Effects 0.000 abstract 3
- 238000004806 packaging method and process Methods 0.000 abstract 1
- 230000000996 additive effect Effects 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/428—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates having a metal pattern
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、耐めっきソルダレジスト処理の後にあけた穴
内を無電解銅めっきする配線板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a wiring board in which the inside of a hole made after a plating-resistant solder resist treatment is electrolessly plated with copper.
配線板の製造方法を大別すると、サブトラクティブ法、
フルアデイティブ法、セミアデイティブ法、パートリ−
アディティブ法がある。The manufacturing methods for wiring boards can be roughly divided into subtractive method,
Full additive method, semi-additive method, part-time method
There is an additive method.
パートリ−アディティブ法は、第３図の工程別説明図に
示すように、（１）銅張積層板、（２）穴あけ、（３）
触媒付与、（４）エツチングレジスト、（５）エツチン
グ、（６）剥離、（７）耐めっきソルダレジスト、（８
）無電解めっきの各工程によって行うのが一般的である
。As shown in the step-by-step explanatory diagram in Figure 3, the part-additive method involves (1) copper-clad laminates, (2) drilling, and (3)
Catalyst application, (4) Etching resist, (5) Etching, (6) Peeling, (7) Plating resistant solder resist, (8
) It is generally performed by each step of electroless plating.
特開昭５９−１５５９９４号公報に記載されている方法
は、このパートリ−アディティブ法による製造工程を簡
略にして製造コストを低減すると共に量産化への対処を
可能とした注目すべきものであるが、その製造工程の順
序は従来と同じである。The method described in Japanese Patent Application Laid-Open No. 59-155994 is noteworthy because it simplifies the manufacturing process using the part-additive method, reduces manufacturing costs, and makes it possible to cope with mass production. The order of the manufacturing process is the same as before.
この従来の方法において、第３図に示す（７）工程では
耐めっきツルダレジス１へをランド部と貫通穴とを除く
他の部分に塗布するが、レジストが貫通穴内に入ること
を防ぐために塗布しない部分を広くする必要があり、結
果として配線板表面の回路密−度が低下するという問題
がある。また、この耐めっきソルダレジストが貫通穴内
に入り込んだ時は、その部分にめっきが付着しないから
配線板及び配線板と実装部品との接続信頼性が悪くなる
という問題がある。In this conventional method, in step (7) shown in FIG. 3, plating-resistant turder resist 1 is applied to other parts except the land portion and the through hole, but is not applied to prevent the resist from entering the through hole. It is necessary to widen the area, and as a result, there is a problem that the circuit density on the surface of the wiring board decreases. Further, when this plating-resistant solder resist enters the through hole, there is a problem that the plating does not adhere to that part, resulting in poor connection reliability between the wiring board and the wiring board and the mounted components.
本発明は、配線板の製造工程を簡略にし、しかも高密度
で接続信頼性が高い方法である。The present invention is a method that simplifies the manufacturing process of a wiring board and also provides high density and high connection reliability.
本発明の実施例を図によって製造工程順に説明する。Embodiments of the present invention will be explained in the order of manufacturing steps with reference to the drawings.
第１図において、（１）銅張積層板、（２）エツチング
レジスト付与、（３）不要部分をエツチングにより除去
、（４）必要に応じてエツチングレジストを剥離するが
、剥離しなくてもよい、（５）耐めっきソルダレジスト
を付与する。ソルダレジストは。In Figure 1, (1) a copper-clad laminate, (2) etching resist applied, (3) unnecessary parts removed by etching, and (4) etching resist removed if necessary, but it is not necessary to remove it. , (5) Applying a plating-resistant solder resist. solder resist.
少なくとも表面実装パッド及び部品挿入スルーホールパ
ッド部分を除き、電気信号経由スルーホール部分を含む
全面に付与する必要がある。（６）穴あけを行う。穴は
、貫通穴と非貫通穴を用いることができる。（７）穴内
壁に触媒付与を行う、触媒入り銅張積層板を用いた場合
は行わない。（８）無電解銅めっきを少なくとも穴内壁
に行う。第２図は、触媒入り銅張積層板を用いた別の実
施例である。It is necessary to apply it to the entire surface including the electrical signal via through hole portion, excluding at least the surface mount pad and component insertion through hole pad portion. (6) Drill holes. As the hole, a through hole or a non-through hole can be used. (7) Applying a catalyst to the inner wall of the hole is not performed when using a copper-clad laminate containing a catalyst. (8) Electroless copper plating is performed on at least the inner wall of the hole. FIG. 2 shows another example using a catalyst-containing copper-clad laminate.
本発明による製造方法においては、電気信号経由スルー
ホール部分上に耐めっきソルダレジストを形成した後に
穴あけを行うから、耐めっきソルダレジストのずれがな
く、高密度配線板の製造が可能となった。また、同じ理
由から穴内への耐めっきソルダレジストの付着がなく接
続信頼性が向上した。In the manufacturing method according to the present invention, the holes are drilled after forming the plating-resistant solder resist on the electrical signal via through-hole portion, so there is no displacement of the plating-resistant solder resist, making it possible to manufacture a high-density wiring board. Also, for the same reason, there is no adhesion of anti-plating solder resist inside the holes, improving connection reliability.
本発明によって、従来はスルーホール円周部とラインの
間隔が０．５ｍ以上必要であったが、０．２ｍｍ まで
近づけることが可能となり、配線板の表面回路密度を１
．５倍向上させることができた。また、製造工程が簡略
となり、接続信頼性が高くなった。With the present invention, the distance between the circumference of the through hole and the line, which conventionally required 0.5 m or more, can be made as close as 0.2 mm, reducing the surface circuit density of the wiring board by 1.
．． We were able to improve it by 5 times. Additionally, the manufacturing process has been simplified and connection reliability has increased.
第１図、第２図は本発明実施例の製造工程別説明断面図
、第３図は従来法の説明断面図である。
１・・・銅箔、２・・・基材、３・・・貫通スルーホー
ル、４・・・触媒、５・・・エツチングレジスト、６・
・・耐めっきソルダレジスト、７・・・無電解銅めっき
、８・・・電気信号経由スルーホール、９・・・表面部
品接続用パッド、１０・・触媒入り基材、１１・・・内
層回路、１２・・・非貫通スルーホール。FIGS. 1 and 2 are cross-sectional views for explaining each manufacturing process according to an embodiment of the present invention, and FIG. 3 is a cross-sectional view for explaining a conventional method. DESCRIPTION OF SYMBOLS 1... Copper foil, 2... Base material, 3... Penetrating through hole, 4... Catalyst, 5... Etching resist, 6...
... Plating-resistant solder resist, 7... Electroless copper plating, 8... Through-hole via electric signal, 9... Surface component connection pad, 10... Base material containing catalyst, 11... Inner layer circuit , 12...Non-penetrating through hole.
Claims (2)
線板の製造において、少なくとも表面実装部品接続用パ
ッド及び部品挿入スルーホールパッド部分を除き、電気
信号経由スルーホール部分を含む全面に耐めつきソルダ
レジストを形成した後あけた穴に無電解銅めつきを行う
ことを特徴とする配線板の製造方法。1. When manufacturing wiring boards from copper-clad laminates using the part-additive method, a plating-proof solder resist is applied to the entire surface including the through-holes for electrical signals, excluding at least the surface-mounted component connection pads and component insertion through-hole pads. A method for producing a wiring board, which comprises performing electroless copper plating on the holes drilled after forming the wiring board.
徴とする特許請求の範囲第１項記載の配線板の製造方法
。2. 2. The method of manufacturing a wiring board according to claim 1, wherein the copper-clad laminate is made of a base material containing a plating catalyst.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1812188A JPH01194391A (en) | 1988-01-28 | 1988-01-28 | Manufacture of wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1812188A JPH01194391A (en) | 1988-01-28 | 1988-01-28 | Manufacture of wiring board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01194391A true JPH01194391A (en) | 1989-08-04 |
Family
ID=11962772
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1812188A Pending JPH01194391A (en) | 1988-01-28 | 1988-01-28 | Manufacture of wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01194391A (en) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014201777A (en) * | 2013-04-02 | 2014-10-27 | Jx日鉱日石金属株式会社 | Carrier-provided copper foil |
| JP2014201830A (en) * | 2013-04-03 | 2014-10-27 | Jx日鉱日石金属株式会社 | Carrier-provided copper foil, production method thereof, extremely thin copper layer and printed wiring board |
| JP2014224313A (en) * | 2013-04-26 | 2014-12-04 | Jx日鉱日石金属株式会社 | Copper foil for high-frequency circuit, copper-clad laminate sheet for high-frequency circuit, printed wiring board for high-frequency circuit, carrier-provided copper foil for high-frequency circuit, electronic apparatus and method of producing printed wiring board |
| JP2014224318A (en) * | 2013-04-26 | 2014-12-04 | Jx日鉱日石金属株式会社 | Copper foil for high-frequency circuit, copper-clad laminate sheet for high-frequency circuit, printed wiring board for high-frequency circuit, carrier-provided copper foil for high-frequency circuit, electronic apparatus and method of producing printed wiring board |
| JP2016166420A (en) * | 2013-07-23 | 2016-09-15 | Ｊｘ金属株式会社 | Surface treated copper foil, copper foil with carrier, manufacturing method of substrate, manufacturing method of printed wiring board, manufacturing method of printed circuit sheet and manufacturing method of copper laminate |
| JP2017133105A (en) * | 2017-03-06 | 2017-08-03 | Ｊｘ金属株式会社 | Copper foil with carrier, printed wiring board, printed circuit, copper clad laminate and manufacturing method of printed wiring board |
| JP2017137583A (en) * | 2017-05-08 | 2017-08-10 | Ｊｘ金属株式会社 | Copper foil with carrier and manufacturing method therefor, ultrathin copper layer, manufacturing method of copper-clad laminate and manufacturing method of printed wiring board |
| JP2017172047A (en) * | 2017-05-08 | 2017-09-28 | Ｊｘ金属株式会社 | Copper foil with carrier and manufacturing method therefor, ultrathin copper layer, manufacturing method of copper-clad laminate and manufacturing method of printed wiring board |
| US9955583B2 (en) | 2013-07-23 | 2018-04-24 | Jx Nippon Mining & Metals Corporation | Surface-treated copper foil, copper foil with carrier, substrate, resin substrate, printed wiring board, copper clad laminate and method for producing printed wiring board |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6043893A (en) * | 1983-08-19 | 1985-03-08 | 日立化成工業株式会社 | Method of producing printed circuit board |
-
1988
- 1988-01-28 JP JP1812188A patent/JPH01194391A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6043893A (en) * | 1983-08-19 | 1985-03-08 | 日立化成工業株式会社 | Method of producing printed circuit board |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014201777A (en) * | 2013-04-02 | 2014-10-27 | Jx日鉱日石金属株式会社 | Carrier-provided copper foil |
| JP2014201830A (en) * | 2013-04-03 | 2014-10-27 | Jx日鉱日石金属株式会社 | Carrier-provided copper foil, production method thereof, extremely thin copper layer and printed wiring board |
| JP2014224313A (en) * | 2013-04-26 | 2014-12-04 | Jx日鉱日石金属株式会社 | Copper foil for high-frequency circuit, copper-clad laminate sheet for high-frequency circuit, printed wiring board for high-frequency circuit, carrier-provided copper foil for high-frequency circuit, electronic apparatus and method of producing printed wiring board |
| JP2014224318A (en) * | 2013-04-26 | 2014-12-04 | Jx日鉱日石金属株式会社 | Copper foil for high-frequency circuit, copper-clad laminate sheet for high-frequency circuit, printed wiring board for high-frequency circuit, carrier-provided copper foil for high-frequency circuit, electronic apparatus and method of producing printed wiring board |
| JP2016166420A (en) * | 2013-07-23 | 2016-09-15 | Ｊｘ金属株式会社 | Surface treated copper foil, copper foil with carrier, manufacturing method of substrate, manufacturing method of printed wiring board, manufacturing method of printed circuit sheet and manufacturing method of copper laminate |
| JP2017075406A (en) * | 2013-07-23 | 2017-04-20 | Ｊｘ金属株式会社 | Surface treated copper foil, copper foil with carrier, manufacturing method of substrate, manufacturing method of printed wiring board, manufacturing method of printed circuit sheet, manufacturing method of copper-clad laminate |
| US9955583B2 (en) | 2013-07-23 | 2018-04-24 | Jx Nippon Mining & Metals Corporation | Surface-treated copper foil, copper foil with carrier, substrate, resin substrate, printed wiring board, copper clad laminate and method for producing printed wiring board |
| JP2017133105A (en) * | 2017-03-06 | 2017-08-03 | Ｊｘ金属株式会社 | Copper foil with carrier, printed wiring board, printed circuit, copper clad laminate and manufacturing method of printed wiring board |
| JP2017137583A (en) * | 2017-05-08 | 2017-08-10 | Ｊｘ金属株式会社 | Copper foil with carrier and manufacturing method therefor, ultrathin copper layer, manufacturing method of copper-clad laminate and manufacturing method of printed wiring board |
| JP2017172047A (en) * | 2017-05-08 | 2017-09-28 | Ｊｘ金属株式会社 | Copper foil with carrier and manufacturing method therefor, ultrathin copper layer, manufacturing method of copper-clad laminate and manufacturing method of printed wiring board |
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