JP7461188B2 - 半導体集積回路 - Google Patents
半導体集積回路 Download PDFInfo
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- JP7461188B2 JP7461188B2 JP2020051909A JP2020051909A JP7461188B2 JP 7461188 B2 JP7461188 B2 JP 7461188B2 JP 2020051909 A JP2020051909 A JP 2020051909A JP 2020051909 A JP2020051909 A JP 2020051909A JP 7461188 B2 JP7461188 B2 JP 7461188B2
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- 239000004065 semiconductor Substances 0.000 title claims description 93
- 239000012535 impurity Substances 0.000 claims description 102
- 239000000758 substrate Substances 0.000 claims description 22
- 239000012212 insulator Substances 0.000 claims description 2
- 238000000034 method Methods 0.000 claims description 2
- 230000015556 catabolic process Effects 0.000 description 19
- 230000003071 parasitic effect Effects 0.000 description 7
- 238000002161 passivation Methods 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 229920005591 polysilicon Polymers 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 2
- 230000006378 damage Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/868—PIN diodes
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
Description
本実施の形態に係る半導体集積回路10では、n型不純物領域18のインパクトイオン化に起因してpnpトランジスタPTのベースの電圧が降下し、pnpトランジスタPTがオンする。このことによって、ブレークダウン後に大きな電流を流すことが可能となっている。図2に示す電流isは、この際に流れるサージ電流の経路を示している。
IR面に表された逆方向特性で表現される。曲線C1は、半導体集積回路10の逆方向特性を示している。図3に示す符号VBRは、本実施の形態に係る半導体集積回路10のブレークダウン電圧を示しており、図3に示すように半導体集積回路10では、ブレークダウン電圧VBRにおいて大電流が流れる。半導体集積回路10のブレークダウン電圧VBRは約600Vである。これに対し曲線C2は従来技術に係る半導体集積回路の逆方向特性を示している。図3に示すように、従来技術に係る半導体集積回路ではブレークダウン電圧が明確に認められず、大きな電流を流すことができないので、カソードの電位が上昇してしまう。なお、本実施の形態に係る半導体集積回路10では、平面視でp型不純物領域26の面積をn型コンタクト領域28の面積より大きくした方が、pnpトランジスタPTの効果がより大きくなる。
Claims (5)
- p型の半導体基板と、
前記半導体基板の一方の面に形成された第1の電極と、
平面視で前記第1の電極と重ならない領域の前記半導体基板の一方の面に形成されたn型の第1の不純物領域と、
平面視で前記第1の不純物領域の内部に形成された前記n型の第2の不純物領域と、
平面視で前記第1の不純物領域の内部に形成されるとともに前記第2の不純物領域に隣接して形成された前記p型の第3の不純物領域と、
前記第2の不純物領域および前記第3の不純物領域の上部に設けられた第2の電極と、を含み、
前記第3の不純物領域をエミッタとし、前記第1の不純物領域をベースとし、前記半導体基板に含まれるp型不純物領域をコレクタとするpnpトランジスタが少なくとも1つ形成される、半導体集積回路。 - 平面視で、前記第3の不純物領域の面積が前記第2の不純物領域の面積より大きくされた
請求項1に記載の半導体集積回路。 - 前記第1の電極の下部に前記第1の電極と接して形成された前記p型の第4の不純物領域と、
平面視で前記第1の不純物領域と前記第4の不純物領域との間に形成された前記n型の第5の不純物領域をさらに含む
請求項1または請求項2に記載の半導体集積回路。 - 前記半導体基板が絶縁層としての埋め込み絶縁膜を含むSOI基板であり、
平面視で、前記第4の不純物領域に対し前記第5の不純物領域と反対側に形成されるとともに前記一方の面から前記埋め込み絶縁膜に至る絶縁物で形成された柱状構造体をさらに含む
請求項3に記載の半導体集積回路。 - 平面視で前記第5の不純物領域は前記第1の不純物領域を囲んで円環状に形成され、
前記第4の不純物領域は前記第5の不純物領域を囲んで円環状に形成され、
前記柱状構造体は前記第4の不純物領域を囲んで円環状に形成された
請求項4に記載の半導体集積回路。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2020051909A JP7461188B2 (ja) | 2020-03-23 | 2020-03-23 | 半導体集積回路 |
PCT/JP2021/007105 WO2021192800A1 (ja) | 2020-03-23 | 2021-02-25 | 半導体集積回路 |
Applications Claiming Priority (1)
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---|---|---|---|
JP2020051909A JP7461188B2 (ja) | 2020-03-23 | 2020-03-23 | 半導体集積回路 |
Publications (2)
Publication Number | Publication Date |
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JP2021150624A JP2021150624A (ja) | 2021-09-27 |
JP7461188B2 true JP7461188B2 (ja) | 2024-04-03 |
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JP2020051909A Active JP7461188B2 (ja) | 2020-03-23 | 2020-03-23 | 半導体集積回路 |
Country Status (2)
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JP (1) | JP7461188B2 (ja) |
WO (1) | WO2021192800A1 (ja) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005347367A (ja) | 2004-06-01 | 2005-12-15 | Toyota Motor Corp | 半導体装置とその製造方法 |
JP5136436B2 (ja) | 2009-01-22 | 2013-02-06 | 奥村遊機株式会社 | パチンコ遊技機 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2896141B2 (ja) * | 1987-02-26 | 1999-05-31 | 株式会社東芝 | 高耐圧半導体素子 |
JP3293871B2 (ja) * | 1991-01-31 | 2002-06-17 | 株式会社東芝 | 高耐圧半導体素子 |
JP3435930B2 (ja) * | 1995-09-28 | 2003-08-11 | 株式会社デンソー | 半導体装置及びその製造方法 |
JP6149603B2 (ja) * | 2013-08-20 | 2017-06-21 | 株式会社デンソー | 半導体装置 |
-
2020
- 2020-03-23 JP JP2020051909A patent/JP7461188B2/ja active Active
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- 2021-02-25 WO PCT/JP2021/007105 patent/WO2021192800A1/ja active Application Filing
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005347367A (ja) | 2004-06-01 | 2005-12-15 | Toyota Motor Corp | 半導体装置とその製造方法 |
JP5136436B2 (ja) | 2009-01-22 | 2013-02-06 | 奥村遊機株式会社 | パチンコ遊技機 |
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JP2021150624A (ja) | 2021-09-27 |
WO2021192800A1 (ja) | 2021-09-30 |
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