JP7394857B2 - 冷間溶接フリップチップ相互接続構造 - Google Patents
冷間溶接フリップチップ相互接続構造 Download PDFInfo
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- JP7394857B2 JP7394857B2 JP2021538196A JP2021538196A JP7394857B2 JP 7394857 B2 JP7394857 B2 JP 7394857B2 JP 2021538196 A JP2021538196 A JP 2021538196A JP 2021538196 A JP2021538196 A JP 2021538196A JP 7394857 B2 JP7394857 B2 JP 7394857B2
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- G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
- G06N10/00—Quantum computing, i.e. information processing based on quantum-mechanical phenomena
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N60/00—Superconducting devices
- H10N60/80—Constructional details
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- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- B82—NANOTECHNOLOGY
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Description
Claims (20)
- 基板上に形成された第1の突起のセットと、
量子ビット・チップ上に形成された第2の突起のセットと、
インタポーザ上に形成されたバンプのセットであって、前記バンプのセットが室温領域で閾値を超える延性を有する材料から形成されており、前記バンプのセットの第1のサブセットが、前記第1の突起のセットに冷間溶接するように構成され、前記バンプのセットの第2のサブセットが、前記第2の突起のセットに冷間溶接するように構成されている、前記バンプのセットと、
を含み、
前記基板は凹部を有し、前記量子ビット・チップは前記基板の前記凹部に配置される、量子デバイス。 - 前記第1の突起のセットが、金および白金からなる群から選択された少なくとも1つの部材である、請求項1に記載の量子デバイス。
- 前記第2の突起のセットが、金および白金からなる群から選択された少なくとも1つの部材である、請求項1に記載の量子デバイス。
- 前記バンプのセットが、インジウム、スズ、鉛、およびビスマスからなる群から選択された少なくとも1つの部材である、請求項1に記載の量子デバイス。
- 前記第1の突起のセットが円錐形を有する、請求項1に記載の量子デバイス。
- 前記第2の突起のセットが角錐形を有する、請求項1に記載の量子デバイス。
- 前記バンプのセットが、極低温領域で超伝導を示す材料を含む、請求項1に記載の量子デバイス。
- 複数の前記第1の突起のセットが、前記バンプのセットのうちの1つに冷間溶接するように構成されている、請求項1に記載の量子デバイス。
- 前記第1の突起のセットが、金でコーティングされた超伝導材料を含む、請求項1に記載の量子デバイス。
- 前記第2の突起のセットが、金でコーティングされた超伝導材料を含む、請求項1に記載の量子デバイス。
- 基板上に第1の突起のセットを形成することと、
量子ビット・チップ上に第2の突起のセットを形成することと、
インタポーザ上に形成されたバンプのセットを形成することであって、前記バンプのセットが室温領域で閾値を超える延性を有する材料から形成されている、前記バンプのセットを形成することと、
前記バンプのセットのサブセットを前記第1の突起のセットに冷間溶接し、前記バンプのセットの第2のサブセットを前記第2の突起のセットに冷間溶接することと、
前記基板は凹部を有し、前記量子ビット・チップは前記基板の前記凹部に配置されることと
を含む、方法。 - 前記第1の突起のセットが、金および白金からなる群から選択された少なくとも1つの部材である、請求項11に記載の方法。
- 前記第2の突起のセットが、金および白金からなる群から選択された少なくとも1つの部材である、請求項11に記載の方法。
- 前記バンプのセットが、インジウム、スズ、鉛、およびビスマスからなる群から選択された少なくとも1つの部材である、請求項11に記載の方法。
- 前記第1の突起のセットが円錐形を有する、請求項11に記載の方法。
- 前記第2の突起のセットが角錐形を有する、請求項11に記載の方法。
- 前記バンプのセットが、極低温領域で超伝導を示す材料を含む、請求項11に記載の方法。
- 複数の前記第1の突起のセットが、前記バンプのセットのうちの1つに冷間溶接するように構成されている、請求項11に記載の方法。
- 前記第1の突起のセットまたは前記第2の突起のセットの少なくとも一方が、金でコーティングされた超伝導材料を含む、請求項11に記載の方法。
- 請求項11ないし19のいずれかに記載の方法の動作を実行する回路製造システム。
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US16/272,481 | 2019-02-11 | ||
US16/272,481 US11165010B2 (en) | 2019-02-11 | 2019-02-11 | Cold-welded flip chip interconnect structure |
PCT/EP2020/051293 WO2020164864A1 (en) | 2019-02-11 | 2020-01-20 | Cold-welded flip chip interconnect structure |
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US20220020715A1 (en) * | 2020-07-17 | 2022-01-20 | International Business Machines Corporation | Uniform chip gaps via injection-molded solder pillars |
US11676903B2 (en) | 2020-08-20 | 2023-06-13 | International Business Machines Corporation | Combined backing plate and housing for use in bump bonded chip assembly |
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Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001250847A (ja) | 2000-01-06 | 2001-09-14 | Trw Inc | 高温超伝導体回路および他の脆い材料への高周波接続を形成させる方法 |
JP2009238806A (ja) | 2008-03-26 | 2009-10-15 | Denso Corp | バンプの接合方法およびバンプの接合構造体 |
US20170373044A1 (en) | 2015-11-05 | 2017-12-28 | Massachusetts Institute Of Technology | Interconnect structures and semiconductor structures for assembly of cryogenic electronic packages |
US20180013052A1 (en) | 2015-07-23 | 2018-01-11 | Massachusetts Institute Of Technology | Qubit and Coupler Circuit Structures and Coupling Techniques |
WO2018212041A1 (ja) | 2017-05-16 | 2018-11-22 | 国立研究開発法人産業技術総合研究所 | 量子ビットデバイス |
US20190043822A1 (en) | 2018-03-16 | 2019-02-07 | Intel Corporation | Qubit die attachment using preforms |
US20190044050A1 (en) | 2018-03-06 | 2019-02-07 | Intel Corporation | Fin strain in quantum dot devices |
US20190252536A1 (en) | 2018-09-27 | 2019-08-15 | Intel Corporation | Quantum dot devices with diodes for electrostatic discharge protection |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4930001A (en) * | 1989-03-23 | 1990-05-29 | Hughes Aircraft Company | Alloy bonded indium bumps and methods of processing same |
US5186379A (en) | 1991-06-17 | 1993-02-16 | Hughes Aircraft Company | Indium alloy cold weld bumps |
DE4225138A1 (de) | 1992-07-30 | 1994-02-03 | Daimler Benz Ag | Multichipmodul und Verfahren zu dessen Herstellung |
AU4859793A (en) | 1992-09-11 | 1994-04-12 | Regents Of The University Of California, The | Sulfated ligands for l-selectins and use of chlorates and or sulfatases for the treatment of inflammation |
US5523628A (en) | 1994-08-05 | 1996-06-04 | Hughes Aircraft Company | Apparatus and method for protecting metal bumped integrated circuit chips during processing and for providing mechanical support to interconnected chips |
JP3280327B2 (ja) | 1997-10-02 | 2002-05-13 | インターナショナル・ビジネス・マシーンズ・コーポレーション | テスト・プローブ構造体及びその製造方法 |
SG71734A1 (en) | 1997-11-21 | 2000-04-18 | Inst Materials Research & Eng | Area array stud bump flip chip and assembly process |
US6881609B2 (en) | 2001-09-07 | 2005-04-19 | Peter C. Salmon | Component connections using bumps and wells |
TW200742007A (en) | 2006-04-28 | 2007-11-01 | Advanced Semiconductor Eng | Method for flip-chip bonding |
US8159825B1 (en) | 2006-08-25 | 2012-04-17 | Hypres Inc. | Method for fabrication of electrical contacts to superconducting circuits |
CN101217124B (zh) | 2008-01-18 | 2010-06-23 | 清华大学 | 使用模板印刷高分子导电材料的低温倒装焊方法 |
EP2405469B1 (en) | 2010-07-05 | 2016-09-21 | ATOTECH Deutschland GmbH | Method to form solder alloy deposits on substrates |
US8496159B2 (en) | 2011-06-06 | 2013-07-30 | International Business Machines Corporation | Injection molded solder process for forming solder bumps on substrates |
US8921221B2 (en) | 2011-06-20 | 2014-12-30 | International Business Machines Corporation | IMS (injection molded solder) with two resist layers forming solder bumps on substrates |
TWI546911B (zh) | 2012-12-17 | 2016-08-21 | 巨擘科技股份有限公司 | 封裝結構及封裝方法 |
US9018040B2 (en) * | 2013-09-30 | 2015-04-28 | International Business Machines Corporation | Power distribution for 3D semiconductor package |
US20160148965A1 (en) | 2014-09-30 | 2016-05-26 | James E. Clayton | Detector assembly using vertical wire bonds and compression decals |
CN204375736U (zh) | 2014-12-26 | 2015-06-03 | 江苏长电科技股份有限公司 | 一种半导体倒装结构 |
-
2019
- 2019-02-11 US US16/272,481 patent/US11165010B2/en active Active
-
2020
- 2020-01-20 EP EP20701715.3A patent/EP3925007A1/en active Pending
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Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001250847A (ja) | 2000-01-06 | 2001-09-14 | Trw Inc | 高温超伝導体回路および他の脆い材料への高周波接続を形成させる方法 |
JP2009238806A (ja) | 2008-03-26 | 2009-10-15 | Denso Corp | バンプの接合方法およびバンプの接合構造体 |
US20180013052A1 (en) | 2015-07-23 | 2018-01-11 | Massachusetts Institute Of Technology | Qubit and Coupler Circuit Structures and Coupling Techniques |
US20170373044A1 (en) | 2015-11-05 | 2017-12-28 | Massachusetts Institute Of Technology | Interconnect structures and semiconductor structures for assembly of cryogenic electronic packages |
WO2018212041A1 (ja) | 2017-05-16 | 2018-11-22 | 国立研究開発法人産業技術総合研究所 | 量子ビットデバイス |
US20190044050A1 (en) | 2018-03-06 | 2019-02-07 | Intel Corporation | Fin strain in quantum dot devices |
US20190043822A1 (en) | 2018-03-16 | 2019-02-07 | Intel Corporation | Qubit die attachment using preforms |
US20190252536A1 (en) | 2018-09-27 | 2019-08-15 | Intel Corporation | Quantum dot devices with diodes for electrostatic discharge protection |
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