JP7350006B2 - 半導体装置製造方法 - Google Patents
半導体装置製造方法 Download PDFInfo
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- JP7350006B2 JP7350006B2 JP2020553360A JP2020553360A JP7350006B2 JP 7350006 B2 JP7350006 B2 JP 7350006B2 JP 2020553360 A JP2020553360 A JP 2020553360A JP 2020553360 A JP2020553360 A JP 2020553360A JP 7350006 B2 JP7350006 B2 JP 7350006B2
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- semiconductor device
- forming
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Description
Z3-COOH (d)
(式中、Z3はカルボキシ基以外の置換基を有していてもよい、飽和もしくは不飽和脂肪族炭化水素、飽和もしくは不飽和脂環式炭化水素、および芳香族炭化水素からなる群より選択される一種、の構造式から1個の水素原子を除去した基を表す)
Z4-OH (e)
(式中、Z4はヒドロキシ基以外の置換基を有していてもよい芳香族炭化水素の構造式から1個の水素原子を除去した基を表す)
<フロー条件>
圧力:100kg/cm2
スピード:6℃/分
ノズル:1mmφ×10mm
溶媒:重クロロホルム
積算回数:1800回
測定温度:25℃
測定温度:40℃
溶離液:テトラヒドロフラン(THF)
試料濃度:0.1~0.2質量%
流量:1mL/分
標準試料:ポリスチレン
検出器:UV-VIS検出器(商品名「SPD-20A」,株式会社島津製作所製)
後記のようにして得られるエポキシ基含有ポリオルガノシルセスキオキサン100質量部と、プロピレングリコールモノメチルエーテルアセテート115質量部と、アンチモン系スルホニウム塩(商品名「SI-150L」,三新化学工業株式会社製)0.45質量部(固形分として)と、(4-ヒドロキシフェニル)ジメチルスルホニウムメチルサルファイト(商品名「サンエイドSI助剤」,三新化学工業株式会社製)0.05質量部とを混合し、接着剤を得た。
還流冷却器と、窒素ガス導入管と、撹拌装置と、温度計とを備えた300mLのフラスコ内で、窒素ガスを導入しながら、2-(3,4-エポキシシクロヘキシル)エチルトリメトキシシラン161.5mmol(39.79g)と、フェニルトリメトキシシラン9mmol(1.69g)と、溶媒としてのアセトン165.9gとを混合して50℃に昇温した。次に、当該混合物に、5%炭酸カリウム水溶液4.7g(炭酸カリウムとして1.7mmol)を5分かけて滴下し、続いて水1700mmol(30.6g)を20分かけて滴下した。滴下操作の間、混合物に著しい温度上昇は生じなかった。当該滴下操作の後、フラスコ内に窒素ガスを導入しながら、50℃で4時間、重縮合反応を行った。重縮合反応後の反応溶液中の生成物を分析したところ、数平均分子量は1900であり、分子量分散度は1.5であった。そして、静置されて冷却された反応溶液について、相分離によって生じる下層液(水相)が中性になるまで水洗を繰り返した後、上層液を分取し、1mmHgおよび40℃の条件で、溶媒量が25質量%になるまで上層液から溶媒を留去し、無色透明の液状の生成物(エポキシ基含有ポリオルガノシルセスキオキサン)を得た。
以下のようにして、二つの第1のウエハ積層体を作製した。
以下のようにして、二つの第1のウエハ積層体を接着剤接合して第2のウエハ積層体を作製した。
多層化工程を経て作製された上述の第2のウエハ積層体について、形状測定装置(商品名「LTV-3000」,株式会社コベルコ科研製)を使用して、SEMI規格(具体的にはSEMI MF1451-0707)に定められるSORI(反り量)を測定したところ、11μmであった。本測定においては、測定対象物の自重たわみに関する補正を経て得られる当該測定対象物の表面形状データから最小二乗参照平面が算出され、前記表面形状データにおける当該最小二乗参照平面からの偏差の最大値と最小値との差分に、前記反り量は相当する。一方、多層化工程前の上述の第1のウエハ積層体について、形状測定装置(商品名「LTV-3000」,株式会社コベルコ科研製)を使用して同様に反り量を測定したところ、47μmであった。厚さ方向において対称的な積層構成を有する第2のウエハ積層体では、第1のウエハ積層体よりも反りが抑制されていた。
上述のようにして作製された接着剤をシリコン基板(直径300mm,厚さ775μm)上にスピンコーティングによって塗布して接着剤塗膜を形成した。1回のスピンコーティングに供して使用した接着剤は20gであり、スピンコーティングにおける回転速度は1200rpmとした。そして、基板上の接着剤塗膜に対し、150℃で30分間の加熱を行い、続いて170℃で30分間の加熱を行い、これにより、硬化した塗膜を基材上に形成した。形成された塗膜について、微細形状測定機(商品名「サーフコーダ ET4000A」,株式会社小坂研究所製)を使用して厚さを測定したところ、2.5μmであった。実施例に係る上述のウエハ積層体は、このような硬化塗膜を、第1および第2シリコンウエハを接合する接着剤層として含む。
素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する補強ウエハを用意する、用意工程と、
前記補強ウエハにおける前記ウエハをその裏面側から研削して薄化ウエハを形成する、薄化工程と、
前記補強ウエハの面と、素子形成面およびこれとは反対の裏面を有する他のウエハの面とを接合してウエハ積層体を形成する、接合工程と、
前記ウエハ積層体において支持基板の取り外しを行う、取外し工程と、
前記取外し工程を経た前記ウエハ積層体の面と、他のウエハ積層体の面とを接合してウエハ積層体を形成する、多層化工程と、を含む半導体装置製造方法であって、
多層化工程を経て得られるウエハ積層体が、その厚さ方向において対称的な積層構成を有するウエハ積層体である半導体装置製造方法。
素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する二つの補強ウエハを用意する、用意工程と、
前記補強ウエハにおける前記ウエハをその裏面側から研削して薄化ウエハを形成する、薄化工程と、
素子形成面およびこれとは反対の裏面を有するベースウエハの前記素子形成面側と、前記補強ウエハの前記薄化ウエハの裏面側とを、接着剤を介して接合して第1のウエハ積層体を形成する、前記補強ウエハごとに行われる、接合工程と、
各第1のウエハ積層体において支持基板の取り外しを行う、取外し工程と、
前記取外し工程を経た二つの前記第1のウエハ積層体における、前記薄化ウエハの素子形成面側どうし又は前記ベースウエハの裏面側どうしを、接着剤を介して接合して第2のウエハ積層体を形成する、多層化工程と、を含む、〔付記1〕に記載の半導体装置製造方法。
前記ウエハの厚さは、1000μm以下、900μm以下、又は800μm以下であり、500μm以上である、〔付記2〕に記載の半導体装置製造方法。
前記支持基板は、シリコンウエハやガラスウエハであり、その厚さは、300μm以上、500μm以上、又は700μm以上であり、800μm以下である、〔付記2〕または〔付記3〕に記載の半導体装置製造方法。
素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する少なくとも一つの追加の補強ウエハを用意する工程と、
各追加の補強ウエハにおける前記ウエハをその裏面側から研削して薄化ウエハを形成する工程と、
前記追加の補強ウエハにおける前記薄化ウエハの裏面側を、第1のウエハ積層体における薄化ウエハの素子形成面側に接着剤を介して接合する、少なくとも一つの追加の接合工程と、
前記追加の接合工程を経た第1のウエハ積層体における支持基板の取り外しを行う取外し工程と、を前記多層化工程よりも前に含む、〔付記2〕から〔付記4〕のいずれか一つに記載の半導体装置製造方法。
前記第2のウエハ積層体において複数の薄化ウエハと少なくとも一つのベースウエハとを貫通して延びる貫通電極を形成する工程を更に含む、〔付記2〕から〔付記5〕のいずれか一つに記載の半導体装置製造方法。
各第1のウエハ積層体における積層方向の一端に位置する薄化ウエハの素子形成面から他端に位置するベースウエハの素子形成面に至るまで当該第1のウエハ積層体内を貫通して延びる貫通電極を形成する工程を前記多層化工程よりも前に含む、〔付記2〕から〔付記5〕のいずれか一つに記載の半導体装置製造方法。
前記ベースウエハにおける前記裏面側に対する研削によって当該ベースウエハを薄化する工程を更に含む、〔付記2〕から〔付記7〕のいずれか一つに記載の半導体装置製造方法。
前記接着剤は、重合性基含有ポリオルガノシルセスキオキサンを含有する、〔付記2〕から〔付記8〕のいずれか一つに記載の半導体装置製造方法。
前記重合性基含有ポリオルガノシルセスキオキサンは、エポキシ基含有ポリオルガノシルセスキオキサンである、〔付記9〕に記載の半導体装置製造方法。
前記仮接着剤層を形成するための仮接着剤は、多価ビニルエーテル化合物と、そのビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して前記多価ビニルエーテル化合物と重合体を形成しうる化合物と、熱可塑性樹脂とを含有する、〔付記2〕から〔付記10〕のいずれか一つに記載の半導体装置製造方法。
前記多価ビニルエーテル化合物は、1,4-ブタンジオールジビニルエーテル、ジエチレングリコールジビニルエーテル、およびトリエチレングリコールジビニルエーテルからなる群より選択される少なくとも一種の化合物である、〔付記11〕に記載の半導体装置製造方法。
前記多価ビニルエーテル化合物のビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して多価ビニルエーテル化合物と重合体を形成しうる化合物は、上記式(b)(式中、Xはヒドロキシ基またはカルボキシ基を表す。n2個のXは、互いに同一であってもよいし、互いに異なってもよい。n2は1以上の整数を表す。Z2は、飽和もしくは不飽和脂肪族炭化水素、飽和もしくは不飽和脂環式炭化水素、芳香族炭化水素、複素環式化合物、またはこれらが単結合もしくは連結基を介して結合した結合体、の構造式から(n2+2)個の水素原子を除去した基を表す。)で表される構成単位と、鎖状オレフィン、環状オレフィン、芳香族ビニル化合物、不飽和カルボン酸エステル、カルボン酸ビニルエステル、および不飽和ジカルボン酸ジエステルからなる群より選択される少なくとも一種の重合性単量体由来の構成単位と、を含む化合物である、〔付記11〕または〔付記12〕に記載の半導体装置製造方法。
前記多価ビニルエーテル化合物のビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して多価ビニルエーテル化合物と重合体を形成しうる化合物は、スチレン系ポリマー、(メタ)アクリル系ポリマー、ポリビニルアルコール、ノボラック樹脂、又はレゾール樹脂である、〔付記11〕または〔付記12〕に記載の半導体装置製造方法。
前記多価ビニルエーテル化合物のビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して多価ビニルエーテル化合物と重合体を形成しうる化合物は、上記式(b-1)~(b-6)からなる群より選択される少なくとも一種の構成単位(繰り返し単位)を2以上有する化合物を含む化合物である、〔付記11〕または〔付記12〕に記載の半導体装置製造方法。
前記熱可塑性樹脂は、ポリビニルアセタール系樹脂、ポリエステル系樹脂、ポリウレタン系樹脂、およびポリアミド系樹脂からなる群より選択される少なくとも一種である、〔付記11〕から〔付記15〕のいずれか一つに記載の半導体装置製造方法。
前記接合工程は、前記重合体の軟化点より低い温度で前記接着剤を硬化させる硬化処理を含み、
前記取外し工程は、前記重合体の軟化点より高い温度で前記仮接着剤層を軟化させる軟化処理を含む、〔付記11〕から〔付記16〕のいずれか一つに記載の半導体装置製造方法。
素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する少なくとも四つの補強ウエハを用意する、用意工程と、
各補強ウエハにおいて、前記ウエハの前記裏面側を研削して当該ウエハを薄化する、薄化工程と、
前記薄化工程を経た二つの補強ウエハにおける前記ウエハの前記裏面側どうしを接合して、前記支持基板を伴うウエハ二層体を少なくとも二つ形成する、接合工程と、
各ウエハ二層体において、少なくとも一つの支持基板を取り外す、取外し工程と、
少なくとも二つのウエハ二層体において前記取外し工程を経て露出したウエハの素子形成面側どうしを接合してウエハ多積層体を形成する、多層化工程と、を含む、〔付記1〕に記載の半導体装置製造方法。
前記ウエハの厚さは、1000μm以下、900μm以下、又は800μm以下であり、500μm以上である、〔付記18〕に記載の半導体装置製造方法。
前記支持基板は、シリコンウエハやガラスウエハであり、その厚さは、300μm以上、500μm以上、又は700μm以上であり、800μm以下である、〔付記18〕または〔付記19〕に記載の半導体装置製造方法。
前記ウエハ多積層体における積層方向の一端に位置する支持基板を取り外す工程を更に含む、〔付記18〕から〔付記20〕のいずれか一つに記載の半導体装置製造方法。
前記ウエハ多積層体における積層方向の一端に位置するウエハの、露出している素子形成面側に、前記ウエハ二層体において前記取外し工程を経て露出したウエハの素子形成面側を接合する、追加の多層化工程を更に含む、〔付記18〕から〔付記21〕のいずれか一つに記載の半導体装置製造方法。
前記ウエハ多積層体における積層方向の一端に位置するウエハの素子形成面から他端に位置するウエハの素子形成面に至るまで当該ウエハ多積層体内を貫通して延びる貫通電極を形成する工程を更に含む、〔付記18〕から〔付記22〕のいずれか一つに記載の半導体装置製造方法。
前記接合工程における前記裏面側どうしの接合は、熱硬化性樹脂としての重合性基含有ポリオルガノシルセスキオキサンを含有する接着剤を介して行われる、〔付記18〕から〔付記23〕のいずれか一つ記載の半導体装置製造方法。
前記重合性基含有ポリオルガノシルセスキオキサンは、エポキシ基含有ポリオルガノシルセスキオキサンである、〔付記24〕に記載の半導体装置製造方法。
前記接合工程では、接合対象面である二つの前記裏面の一方または両方に前記接着剤が塗布され、当該接着剤を介して当該裏面どうしの貼合わせが行われ、当該貼合わせ後に当該接着剤が硬化される、〔付記24〕または〔付記25〕に記載の半導体装置製造方法。
前記接合工程では、前記接着剤の塗布の前に、接合対象面である二つの前記裏面の一方または両方にシランカップリング剤処理が施される、〔付記26〕に記載の半導体装置製造方法。
前記接合工程において、前記貼合わせは室温以上かつ80℃以下の温度で行われ、当該貼合わせ後に30~200℃の温度で前記接着剤が硬化される、〔付記26〕または〔付記27〕に記載の半導体装置製造方法。
前記多層化工程における前記素子形成面側どうしの接合は、熱硬化性樹脂としての重合性基含有ポリオルガノシルセスキオキサンを含有する接着剤を介して行われる、〔付記18〕から〔付記28〕のいずれか一つに記載の半導体装置製造方法。
前記重合性基含有ポリオルガノシルセスキオキサンは、エポキシ基含有ポリオルガノシルセスキオキサンである、〔付記29〕に記載の半導体装置製造方法。
前記多層化工程では、接合対象面である二つの前記素子形成面の一方または両方に前記接着剤が塗布され、当該接着剤を介して当該素子形成面どうしの貼合わせが行われ、当該貼合わせ後に当該接着剤が硬化される、〔付記29〕または〔付記30〕に記載の半導体装置製造方法。
前記多層化工程では、前記接着剤の塗布の前に、接合対象面である二つの前記素子形成面の一方または両方にシランカップリング剤処理が施される、〔付記31〕に記載の半導体装置製造方法。
前記多層化工程において、前記貼合わせは室温以上かつ80℃以下の温度で行われ、当該貼合わせ後に30~200℃の温度で前記接着剤が硬化される、〔付記31〕または〔付記32〕に記載の半導体装置製造方法。
前記仮接着剤層を形成するための仮接着剤は、多価ビニルエーテル化合物と、そのビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して前記多価ビニルエーテル化合物と重合体を形成しうる化合物と、熱可塑性樹脂とを含有する、〔付記18〕から〔付記33〕のいずれか一つに記載の半導体装置製造方法。
前記多価ビニルエーテル化合物は、1,4-ブタンジオールジビニルエーテル、ジエチレングリコールジビニルエーテル、およびトリエチレングリコールジビニルエーテルからなる群より選択される少なくとも一種の化合物である、〔付記34〕に記載の半導体装置製造方法。
前記多価ビニルエーテル化合物のビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して多価ビニルエーテル化合物と重合体を形成しうる化合物は、上記式(b)(式中、Xはヒドロキシ基またはカルボキシ基を表す。n2個のXは、互いに同一であってもよいし、互いに異なってもよい。n2は1以上の整数を表す。Z2は、飽和もしくは不飽和脂肪族炭化水素、飽和もしくは不飽和脂環式炭化水素、芳香族炭化水素、複素環式化合物、またはこれらが単結合もしくは連結基を介して結合した結合体、の構造式から(n2+2)個の水素原子を除去した基を表す。)で表される構成単位と、鎖状オレフィン、環状オレフィン、芳香族ビニル化合物、不飽和カルボン酸エステル、カルボン酸ビニルエステル、および不飽和ジカルボン酸ジエステルからなる群より選択される少なくとも一種の重合性単量体由来の構成単位と、を含む化合物である、〔付記34〕または〔付記35〕に記載の半導体装置製造方法。
前記多価ビニルエーテル化合物のビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して多価ビニルエーテル化合物と重合体を形成しうる化合物は、スチレン系ポリマー、(メタ)アクリル系ポリマー、ポリビニルアルコール、ノボラック樹脂、又はレゾール樹脂である、〔付記34〕または〔付記35〕に記載の半導体装置製造方法。
前記多価ビニルエーテル化合物のビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して多価ビニルエーテル化合物と重合体を形成しうる化合物は、上記式(b-1)~(b-6)からなる群より選択される少なくとも一種の構成単位(繰り返し単位)を2以上有する化合物を含む化合物である、〔付記34〕または〔付記35〕に記載の半導体装置製造方法。
前記熱可塑性樹脂は、ポリビニルアセタール系樹脂、ポリエステル系樹脂、ポリウレタン系樹脂、およびポリアミド系樹脂からなる群より選択される少なくとも一種である、〔付記34〕から〔付記38〕のいずれか一つに記載の半導体装置製造方法。
S 支持基板
1 ウエハ
1T 薄化ウエハ
1a,3a 素子形成面
1b,3b 裏面
1R 補強ウエハ
3 ウエハ(ベースウエハ)
2 仮接着剤層
4 接着剤
5 貫通電極
11R 補強ウエハ
11 ウエハ
11a 素子形成面
11b 裏面
12 支持基板
13 仮接着剤層
14 接着剤層
15 貫通電極
1X ウエハ二層体
1Y ウエハ多積層体
Claims (21)
- 素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する補強ウエハを用意する、用意工程と、
前記補強ウエハにおける前記ウエハをその裏面側から研削して薄化ウエハを形成する、薄化工程と、
前記補強ウエハの面と、素子形成面およびこれとは反対の裏面を有する他のウエハの面とを接合してウエハ積層体を形成する、接合工程と、
前記ウエハ積層体において支持基板の取り外しを行う、取外し工程と、
前記取外し工程を経た前記ウエハ積層体の面と、他のウエハ積層体の面とを接合してウエハ積層体を形成する、多層化工程と、を含む半導体装置製造方法であって、
多層化工程を経て得られるウエハ積層体が、その厚さ方向において対称的な積層構成を有するウエハ積層体である半導体装置製造方法。 - 素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する二つの補強ウエハを用意する、用意工程と、
前記補強ウエハにおける前記ウエハをその裏面側から研削して薄化ウエハを形成する、薄化工程と、
素子形成面およびこれとは反対の裏面を有するベースウエハの前記素子形成面側と、前記補強ウエハの前記薄化ウエハの裏面側とを、接着剤を介して接合して第1のウエハ積層体を形成する、前記補強ウエハごとに行われる、接合工程と、
各第1のウエハ積層体において支持基板の取り外しを行う、取外し工程と、
前記取外し工程を経た二つの前記第1のウエハ積層体における、前記薄化ウエハの素子形成面側どうし又は前記ベースウエハの裏面側どうしを、接着剤を介して接合して第2のウエハ積層体を形成する、多層化工程と、を含む、請求項1に記載の半導体装置製造方法。 - 素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する少なくとも一つの追加の補強ウエハを用意する工程と、
各追加の補強ウエハにおける前記ウエハをその裏面側から研削して薄化ウエハを形成する工程と、
前記追加の補強ウエハにおける前記薄化ウエハの裏面側を、第1のウエハ積層体における薄化ウエハの素子形成面側に接着剤を介して接合する、少なくとも一つの追加の接合工程と、
前記追加の接合工程を経た第1のウエハ積層体における支持基板の取り外しを行う取外し工程と、を前記多層化工程よりも前に含む、請求項2に記載の半導体装置製造方法。 - 前記第2のウエハ積層体において複数の薄化ウエハと少なくとも一つのベースウエハとを貫通して延びる貫通電極を形成する工程を更に含む、請求項2または3に記載の半導体装置製造方法。
- 各第1のウエハ積層体における積層方向の一端に位置する薄化ウエハの素子形成面から他端に位置するベースウエハの素子形成面に至るまで当該第1のウエハ積層体内を貫通して延びる貫通電極を形成する工程を前記多層化工程よりも前に含む、請求項2または3に記載の半導体装置製造方法。
- 前記ベースウエハにおける前記裏面側に対する研削によって当該ベースウエハを薄化する工程を更に含む、請求項2から5のいずれか一つに記載の半導体装置製造方法。
- 前記接着剤は、重合性基含有ポリオルガノシルセスキオキサンを含有する、請求項2から6のいずれか一つに記載の半導体装置製造方法。
- 前記仮接着剤層を形成するための仮接着剤は、多価ビニルエーテル化合物と、そのビニルエーテル基と反応してアセタール結合を形成可能なヒドロキシ基またはカルボキシ基を二つ以上有して前記多価ビニルエーテル化合物と重合体を形成しうる化合物と、熱可塑性樹脂とを含有する、請求項2から7のいずれか一つに記載の半導体装置製造方法。
- 前記接合工程は、前記重合体の軟化点より低い温度で前記接着剤を硬化させる硬化処理を含み、
前記取外し工程は、前記重合体の軟化点より高い温度で前記仮接着剤層を軟化させる軟化処理を含む、請求項8に記載の半導体装置製造方法。 - 素子形成面およびこれとは反対の裏面を有するウエハ、支持基板、並びに、前記ウエハの前記素子形成面側および前記支持基板の間の、仮接着状態形成用の仮接着剤層、を含む積層構造を有する少なくとも四つの補強ウエハを用意する、用意工程と、
各補強ウエハにおいて、前記ウエハの前記裏面側を研削して当該ウエハを薄化する、薄化工程と、
前記薄化工程を経た二つの補強ウエハにおける前記ウエハの前記裏面側どうしを接合して、前記支持基板を伴うウエハ二層体を少なくとも二つ形成する、接合工程と、
各ウエハ二層体において、少なくとも一つの支持基板を取り外す、取外し工程と、
少なくとも二つのウエハ二層体において前記取外し工程を経て露出したウエハの素子形成面側どうしを接合してウエハ多積層体を形成する、多層化工程と、を含む、請求項1に記載の半導体装置製造方法。 - 前記ウエハ多積層体における積層方向の一端に位置する支持基板を取り外す工程を更に含む、請求項10に記載の半導体装置製造方法。
- 前記ウエハ多積層体における積層方向の一端に位置するウエハの、露出している素子形成面側に、前記ウエハ二層体において前記取外し工程を経て露出したウエハの素子形成面側を接合する、追加の多層化工程を更に含む、請求項10または11に記載の半導体装置製造方法。
- 前記ウエハ多積層体における積層方向の一端に位置するウエハの素子形成面から他端に位置するウエハの素子形成面に至るまで当該ウエハ多積層体内を貫通して延びる貫通電極を形成する工程を更に含む、請求項10から12のいずれか一つに記載の半導体装置製造方法。
- 前記接合工程における前記裏面側どうしの接合は、熱硬化性樹脂としての重合性基含有ポリオルガノシルセスキオキサンを含有する接着剤を介して行われる、請求項10から13のいずれか一つに記載の半導体装置製造方法。
- 前記接合工程では、接合対象面である二つの前記裏面の一方または両方に前記接着剤が塗布され、当該接着剤を介して当該裏面どうしの貼合わせが行われ、当該貼合わせ後に当該接着剤が硬化される、請求項14に記載の半導体装置製造方法。
- 前記接合工程では、前記接着剤の塗布の前に、接合対象面である二つの前記裏面の一方または両方にシランカップリング剤処理が施される、請求項15に記載の半導体装置製造方法。
- 前記接合工程において、前記貼合わせは室温以上かつ80℃以下の温度で行われ、当該貼合わせ後に30~200℃の温度で前記接着剤が硬化される、請求項15または16に記載の半導体装置製造方法。
- 前記多層化工程における前記素子形成面側どうしの接合は、熱硬化性樹脂としての重合性基含有ポリオルガノシルセスキオキサンを含有する接着剤を介して行われる、請求項10から17のいずれか一つに記載の半導体装置製造方法。
- 前記多層化工程では、接合対象面である二つの前記素子形成面の一方または両方に前記接着剤が塗布され、当該接着剤を介して当該素子形成面どうしの貼合わせが行われ、当該貼合わせ後に当該接着剤が硬化される、請求項18に記載の半導体装置製造方法。
- 前記多層化工程では、前記接着剤の塗布の前に、接合対象面である二つの前記素子形成面の一方または両方にシランカップリング剤処理が施される、請求項19に記載の半導体装置製造方法。
- 前記多層化工程において、前記貼合わせは室温以上かつ80℃以下の温度で行われ、当該貼合わせ後に30~200℃の温度で前記接着剤が硬化される、請求項19または20に記載の半導体装置製造方法。
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