JP7346171B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

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Publication number
JP7346171B2
JP7346171B2 JP2019159281A JP2019159281A JP7346171B2 JP 7346171 B2 JP7346171 B2 JP 7346171B2 JP 2019159281 A JP2019159281 A JP 2019159281A JP 2019159281 A JP2019159281 A JP 2019159281A JP 7346171 B2 JP7346171 B2 JP 7346171B2
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semiconductor chip
semiconductor device
resin
manufacturing
lead frame
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JP2021039993A (ja
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大輔 小池
史義 川城
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Priority to JP2019159281A priority Critical patent/JP7346171B2/ja
Priority to US16/775,557 priority patent/US11476223B2/en
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H01L23/49513—Lead-frames or other flat leads characterised by the die pad having bonding material between chip and die pad
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Description

本発明の実施形態は、半導体装置及びその製造方法に関する。
発電や送電、ポンプやブロアなどの回転機、通信システムや工場などの電源装置、交流モータによる鉄道、電気自動車、家庭用電化製品等の幅広い分野に向けた、ＭＯＳＦＥＴ（Ｍｅｔａｌ－Ｏｘｉｄｅ－Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｆｉｅｌｄ－Ｅｆｆｅｃｔ－Ｔｒａｎｓｉｓｔｏｒ）やＩＧＢＴ（Ｉｎｓｕｌａｔｅｄ Ｇａｔｅ Ｂｉｐｏｌａｒ Ｔｒａｎｓｉｓｔｏｒ）等の、電力制御用に設計されたパワー半導体チップの開発が行われている。
また、かかるパワー半導体チップを用いた、パワーモジュールとしての半導体装置の開発が行われている。このような半導体装置には、高電流密度化、低損失化、高放熱化等のスペックが要求されている。
特開２０１５－５６２３８号公報
本発明が解決しようとする課題は、電力損失の抑制された半導体装置を提供することである。
実施形態の半導体装置は、平坦な第１面を有するリードフレームと、第１面の上に設けられた半導体チップと、所定の金属材料を含む焼結材と、所定の樹脂と、を含み、第１面と半導体チップの間に設けられた第１部分と、半導体チップの周囲における第１面の上に設けられ第１部分より高く第１部分より厚い第２部分と、第１面に接して設けられた、第１部分及び第２部分の底面と、を有し、リードフレームと半導体チップを接合している接合材であって、半導体チップの下面と、下面に隣接する第２部分の上面がなす角の角度は８０度以下である。
実施形態の半導体装置の模式断面図である。 実施形態の半導体装置の製造方法のフローチャートである。 実施形態の半導体装置の製造方法において、製造途中の半導体装置を示す模式断面図である。 比較形態となる半導体装置の製造方法において、製造途中の半導体装置を示す模式断面図である。
以下、図面を参照しつつ本発明の実施形態を説明する。なお、以下の説明では、同一又は類似の部材には同一の符号を付す場合がある。また、一度説明した部材等については適宜その説明を省略する場合がある。
本明細書中、部品等の位置関係を示すために、図面の上方向を「上」、図面の下方向を「下」と記述する。本明細書中、「上」、「下」の概念は、必ずしも重力の向きとの関係を示す用語ではない。
（実施形態）
実施形態の半導体装置は、リードフレームと、リードフレームの上に設けられた半導体チップと、所定の金属材料を含む焼結材と、所定の樹脂と、を含み、リードフレームと半導体チップの間に設けられた第１部分と、半導体チップの周囲におけるリードフレームの上に設けられた第２部分と、を有し、リードフレームと半導体チップを接合している接合材であって、半導体チップの下面と、下面に隣接する第２部分の上面がなす角は８０度以下である。
図１は、実施形態の半導体装置１００の模式断面図である。
図１（ａ）は、実施形態の一態様の半導体装置１００の模式断面図である。
半導体装置１００は、リードフレーム１０と、半導体チップ２０と、接合材３０と、を備える。
リードフレーム１０は、例えばＣｕ（銅）等の金属又は合金で形成されている。なおリードフレーム１０の表面には、例えば、Ａｕ（金）、Ｐｔ（白金）、Ｐｄ（パラジウム）、Ａｇ（銀）、Ｃｕ（銅）、Ｓｎ（錫）又はＮｉ（ニッケル）等を含む薄膜が設けられていても良い。リードフレーム１０を介して、後述する半導体チップ２０と半導体装置１００外部の電気回路が接続される。
半導体チップ２０は、上面２２と、下面２４と、側面２６と、を有する。
半導体チップ２０は、例えば、Ｓｉ（シリコン）を用いた縦型のＳｉ－ＩＧＢＴである。なお、半導体チップ２０は、Ｓｉ－ＭＯＳＦＥＴ、Ｓｉ－ＦＲＤ（Ｆａｓｔ Ｒｅｃｏｖｅｒｙ Ｄｉｏｄｅ）、ＳｉＣ（炭化珪素）を用いたＳｉＣ－ＩＧＢＴ、ＳｉＣ－ＭＯＳＦＥＴ又はＳｉＣ－ＳＢＤ（Ｓｃｈｏｔｔｋｙ Ｂａｒｒｉｅｒ Ｄｉｏｄｅ）、又はＩＩＩ－Ｖ族半導体においてＶ族元素が窒素である窒化物半導体を用いたＧａＮ－ＭＯＳＦＥＴ等であってもかまわない。また、半導体チップ２０は、いわゆるパワー半導体チップでなくてもかまわない。
半導体チップ２０のチップ厚は、２００μｍ未満であることが好ましい。
接合材３０は、所定の金属材料を含む焼結材と、所定の樹脂と、を含む。接合材３０は、リードフレーム１０と半導体チップ２０を接合している。接合材３０は、いわゆるダイアタッチ（ＤＡ）材である。接合材３０は、上記の所定の金属材料を含む金属粒子と、上記の所定の樹脂と、極性溶剤等の所定の溶剤と、を含むペースト７０（図３、図４）を熱処理して、所定の溶剤を蒸発させ、上記の金属粒子を焼結することにより形成されるものである。
所定の金属材料は特に限定されるものではないが、例えば、Ａｕ、Ｐｔ、Ｐｄ、Ｒｕ（ルテニウム）、Ｒｈ（ロジウム）、Ｉｒ（イリジウム）、Ａｇ（銀）、Ｃｕ（銅）、Ｎｉ（ニッケル）、Ｚｎ（亜鉛）、Ｂｉ（ビスマス）、Ｆｅ（鉄）、Ｍｏ（モリブデン）、Ａｌ（アルミニウム）、Ｃｒ（クロム）又はＶ（バナジウム）等が好ましく用いられる。所定の金属材料としては、Ａｇ、Ｃｕ又はＡｕが、熱伝導性及び電気伝導性が高いため特に好ましく用いられる。
所定の樹脂は、特に限定されるものではないが、例えば、ポリエチレン樹脂、ポリプロピレン樹脂、塩化ビニル樹脂、ポリスチレン樹脂、アクリロニトリルスチレン樹脂、ＡＢＳ樹脂、ポリエチレンテレフタレート樹脂、メタクリル樹脂、ポリビニルアルコール樹脂、塩化ビニリデン樹脂、ポリカーボネート樹脂、ポリアミド樹脂、アセタール樹脂、ポリブチレンテレフタレート樹脂、フッ素樹脂、フェノール樹脂、メラミン樹脂、ユリア樹脂、ポリウレタン樹脂、エポキシ系樹脂、又は不飽和ポリエステル樹脂等が好ましく用いられる。所定の樹脂としては、エポキシ系樹脂が特に好ましく用いられる。
ペースト７０は、所定の樹脂を５ｗｔ％以上３０ｗｔ％以下含むことが好ましい。
接合材３０は、リードフレーム１０と半導体チップ２０の間に設けられた第１部分３２と、半導体チップ２０の周囲におけるリードフレーム１０の上に設けられた第２部分３４と、を有する。接合材３０は、半導体チップ２０の周囲において、図１（ａ）に示すような、丸みを有した形状となっている。図１（ａ）に示した半導体装置１００において、第２部分３４の高さは第１部分３２の高さより高い。なお第２部分３４の高さは半導体チップ２０の周囲において等しくなくてもよく、部分的に高さの低いところがあっても構わない。
半導体チップ２０の下面２４と、半導体チップ２０の下面２４に隣接する第２部分３４の上面２２がなす角θは、８０度以下である。ここで、「なす角θ」とは、半導体チップ２０の下面２４の延長線と、半導体チップ２０の下面に隣接する第２部分３４の上面２２に対する接線３８のなす角である。図１（ａ）の「なす角θ」は、正の角度であるものとする。
図１（ｂ）は、実施形態の他の態様の半導体装置１１０の模式断面図である。半導体装置１１０において、第２部分３４の高さは第１部分３２の高さより低い。接線３８は、図１（ｂ）に示すように、半導体チップ２０から遠ざかるに従って、高さが低くなるような線となる。図１（ｂ）の「なす角θ」は、負の角度であるものとする。図１（ａ）と図１（ｂ）いずれにおいても、「なす角θ」は８０度以下という条件を満たすものである。
図２は、実施形態の半導体装置１００の製造方法のフローチャートである。
図３は、実施形態の半導体装置１００の製造方法において、製造途中の半導体装置を示す模式断面図である。
図２と図３を用いて、実施形態の半導体装置の製造方法について説明をする。
実施形態の半導体装置の製造方法は、半導体チップの側面を、所定の樹脂をはじく絶縁材料で被覆し、リードフレームの上に設けられた、所定の金属材料を含む金属粒子と、所定の樹脂と、を含むペーストの上に、半導体チップを載置し、半導体チップ、ペースト及びリードフレームの熱処理を行い、所定の金属材料を含む焼結材と、所定の樹脂と、を含み、リードフレームと半導体チップの間に設けられた第１部分と、半導体チップの周囲におけるリードフレームの上に設けられた第２部分と、を有し、リードフレームと半導体チップを接合する接合材であって、半導体チップの下面と、下面に隣接する第２部分の上面がなす角は８０度以下である接合材を形成する。
まず、シート５０上の半導体チップ２０に対し、スプレー４０を用いて、半導体チップ２０の側面２６及び上面２２を、ペースト７０に含まれている所定の樹脂をはじく絶縁材料６０で被覆する（図２の（Ｓ１０）、図３（ａ））。
少なくとも半導体チップ２０の側面２６が絶縁材料６０で被覆されていることが好ましいが、上面２２が絶縁材料６０で被覆されていても構わない。
絶縁材料６０で半導体チップ２０の側面２６及び上面２２を被覆するために用いる手段はスプレー４０に限定されるものではなく、例えば印刷法、スピンコート法又は蒸着法等を用いてもかまわない。
絶縁材料６０としては、特に限定されるものではないが、所定の樹脂がエポキシ系樹脂である場合には、エポキシブリードアウト（ＥＢＯ）防止剤であることが好ましい。
次に、例えば吸着コレット８０を用いて、シート５０上の半導体チップ２０を、リードフレーム１０上に設けられたペースト７０の上に載置する（図２の（Ｓ２０）、図３（ｂ））。
次に、半導体チップ２０、ペースト７０、リードフレーム１０、絶縁材料６０を、例えば空気中又は窒素ガス中で、例えば２００度以上３５０度以下の温度において、熱処理を行う。こうして、ペースト７０を硬化させることにより、所定の金属材料を含む焼結材と、所定の樹脂と、を含み、リードフレーム１０と半導体チップ２０の間に設けられた第１部分３２と、半導体チップ２０の周囲におけるリードフレーム１０の上に設けられた第２部分３４と、を有し、リードフレーム１０と半導体チップ２０を接合する接合材３０であって、半導体チップ２０の下面２４と、下面２４に隣接する第２部分３４の上面２２がなす角は８０度以下である接合材３０を形成する（図２の（Ｓ３０））。なお、絶縁材料６０は熱処理により揮発（昇華）する。
次に、実施形態の半導体装置及び半導体装置の製造方法の作用効果について記載する。
接合材またはダイアタッチ（ＤＡ）材としては、これまではんだが用いられていた。はんだについては環境保護の観点から鉛フリー化が進んでいる。しかし、パワーモジュールの接合部には大きな電流に伴い大きな発熱が生じるため、鉛フリー化は困難であった。さらに、近年では、シリコンよりも高温での動作が可能なワイドバンドギャップ半導体（ＳｉＣ、窒化物半導体）を用いたパワーモジュールの開発が進んでいる。ワイドバンドギャップ半導体を使用したパワーモジュールの動作温度は３００℃程度に達することが予想されている。このため、接合材には、一般的なはんだで達成可能な耐熱性と比較して、より高い耐熱性が求められている。
この問題を解決し得る接合材として、所定の金属材料を含む金属粒子と、所定の樹脂と、極性溶剤等の所定の溶剤と、を含むペーストを用いた接合材を使用することが考えられる。耐熱性が確保され、さらに所定の樹脂を含むことにより接合される部分に圧力を加えなくても容易に焼結をさせることが出来るためである。
しかし、上記のペーストを用いて接合をおこなう場合には、ペーストが半導体チップ２０の側面２６や上面２２に這い上がってしまい、半導体チップ２０の下面２４に設けられた電極と上面２２に設けられた電極が短絡してしまうという問題があった。また、この問題は、半導体チップ２０の低抵抗化のため、半導体チップ２０のチップ厚が２００μｍ未満となったときに、特に起こりやすくなっていた。
図４は、比較形態となる半導体装置８００の製造方法において、製造途中の半導体装置を示す模式断面図である。
図４（ａ）においては、絶縁材料６０を用いていない。このような半導体チップ２０を図４（ｂ）のようにペースト７０の上に載置して熱処理すると、図４（ｃ）のように、半導体チップ２０の側面２６に、ペースト７０が這い上がってしまい、結果として接合材３０の第２部分３４が這い上がった形状になってしまうという問題があった。
そこで、実施形態の半導体装置１００の製造方法においては、半導体チップ２０の側面２６及び上面２２を、ペースト７０に含まれる所定の樹脂をはじく絶縁材料６０で被覆する。これにより、ペースト７０は半導体チップ２０の側面２６を這い上がることなく硬化する。そのため、半導体チップ２０の下面２４に設けられた電極と上面２２に設けられた電極が短絡してしまうという問題の発生を抑制することが出来る。よって、電力損失の抑制された半導体装置の提供が可能となる。なお、上記の通り、絶縁材料６０は熱処理により揮発（昇華）する。そのため、この後の工程におけるボンディングワイヤの接続性や、モールド樹脂と半導体チップ２０の間の密着性には影響しない。
半導体チップ２０のチップ厚が２００μｍ未満である場合、ペースト７０が半導体チップ２０の側面２６を這い上がり、半導体チップ２０の下面２４に設けられた電極と上面２２に設けられた電極が短絡してしまうという問題が特に発生しやすい。そのため、半導体チップ２０のチップ厚が２００μｍ未満である場合、実施形態の半導体装置及び半導体装置の製造方法の適用は特に好ましい。
被覆された絶縁材料６０の膜厚は０．１μｍ以上２μｍ以下であることが好ましい。０．１μｍ未満である場合、膜厚が十分でないためにペースト７０が半導体チップ２０の側面２６を這い上がってしまうことがある。一方２μｍを超える場合には、熱処理により完全に揮発（昇華）せずに一部が残ってしまい、ボンディングワイヤの接続性や、モールド樹脂と半導体チップ２０の間の密着性に影響を及ぼす可能性がある
絶縁材料６０を用いた場合、接合材３０の形状は、図４（ｃ）に示したものと異なり、図１（ａ）又は図１（ｂ）に示したように、リードフレーム１０と半導体チップ２０の間に設けられた第１部分３２と、半導体チップ２０の周囲におけるリードフレーム１０の上に設けられた第２部分３４と、を有し、半導体チップ２０の下面２４と、下面２４に隣接する第２部分３４の上面２２がなす角の角度は８０度以下となる。
ペースト７０は所定の樹脂を５ｗｔ％以上３０ｗｔ％以下含むことが好ましい。良好に半導体チップ２０とリードフレーム１０の接合をおこなうことが出来るためである。
所定の樹脂はエポキシ系樹脂であり、絶縁材料６０はエポキシブリードアウト防止剤であることが特に好ましい。接合される部分に圧力を加えなくても容易に焼結をさせることが出来るためであり、さらにエポキシブリードアウト防止剤によりペースト７０の這い上がりが良好に抑制できるためである。
本実施形態の半導体装置１００によれば、電力損失の抑制された半導体装置の提供が可能となる。
本発明のいくつかの実施形態及び実施例を説明したが、これらの実施形態及び実施例は、例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことが出来る。これら実施形態やその変形は、発明の範囲や要旨に含まれると共に、特許請求の範囲に記載された発明とその均等の範囲に含まれる。
１０ リードフレーム
２０ 半導体チップ
２２ 半導体チップの上面
２４ 半導体チップの下面
２６ 半導体チップの側面
３０ 接合材
３２ 接合材の第１部分
３４ 接合材の第２部分
３６ 接合材の第２部分の上面
３８ 接合材の第２部分の上面に対する接線
４０ スプレー
５０ シート
６０ 絶縁材料
７０ ペースト
８０ 吸着コレット
１００ 半導体装置
１１０ 半導体装置

Claims (14)

  1. 平坦な第１面を有するリードフレームと、
    前記第１面の上に設けられた半導体チップと、
    所定の金属材料を含む焼結材と、所定の樹脂と、を含み、前記第１面と前記半導体チップの間に設けられた第１部分と、
    前記半導体チップの周囲における前記第１面の上に設けられ前記第１部分より高く前記第１部分より厚い第２部分と、
    前記第１面に接して設けられた、前記第１部分及び前記第２部分の底面と、
    を有し、前記リードフレームと前記半導体チップを接合している接合材であって、
    前記半導体チップの下面と、前記下面に隣接する前記第２部分の上面がなす角の角度は８０度以下である半導体装置。
  2. 前記所定の樹脂はエポキシ系樹脂である請求項１記載の半導体装置。
  3. 前記半導体チップのチップ厚は２００μｍ未満である請求項１又は請求項２記載の半導体装置。
  4. 前記第２部分は前記半導体チップの側面から離間している請求項１乃至請求項３いずれか一項記載の半導体装置。
  5. 前記下面に隣接する前記第２部分の前記上面は、前記半導体チップの側面に対向している請求項１乃至請求項４いずれか一項記載の半導体装置。
  6. 半導体チップの側面を、所定の樹脂をはじく絶縁材料で被覆し、
    平坦な第１面を有するリードフレームの前記第１面の上に設けられた、所定の金属材料を含む金属粒子と、前記所定の樹脂と、を含むペーストの上に、前記半導体チップを載置し、
    前記半導体チップ、前記ペースト及び前記リードフレームの熱処理を行い、前記所定の金属材料を含む焼結材と、前記所定の樹脂と、を含み、前記第１面と前記半導体チップの間に設けられた第１部分と、前記半導体チップの周囲における前記第１面の上に設けられ前記第１部分より高く前記第１部分より厚い第２部分と、前記第１面に接して設けられた、前記第１部分及び前記第２部分の底面と、を有し、前記リードフレームと前記半導体チップを接合する接合材であって、前記半導体チップの下面と、前記下面に隣接する前記第２部分の上面がなす角は８０度以下である接合材を形成する、
    半導体装置の製造方法。
  7. 被覆された前記絶縁材料の膜厚は０．１μｍ以上２μｍ以下である請求項６記載の半導体装置の製造方法。
  8. 前記所定の樹脂はエポキシ系樹脂である請求項６又は請求項７記載の半導体装置の製造方法。
  9. 前記ペーストは前記所定の樹脂を５ｗｔ％以上３０ｗｔ％以下含む請求項６乃至請求項８いずれか一項記載の半導体装置の製造方法。
  10. 前記絶縁材料はエポキシブリードアウト防止剤である請求項６乃至請求項９いずれか一項記載の半導体装置の製造方法。
  11. 前記半導体チップのチップ厚は２００μｍ未満である請求項６乃至請求項１０いずれか一項記載の半導体装置の製造方法。
  12. 前記第２部分は前記半導体チップの前記側面から離間している請求項６乃至請求項１１いずれか一項記載の半導体装置の製造方法。
  13. 前記下面に隣接する前記第２部分の前記上面は、前記半導体チップの前記側面に対向している請求項６乃至請求項１２いずれか一項記載の半導体装置の製造方法。
  14. 前記半導体チップの側面を、前記所定の樹脂をはじく前記絶縁材料で被覆する際に、前記第１面は前記絶縁材料で被覆されない請求項６乃至請求項１３いずれか一項記載の半導体装置の製造方法。
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