JP7095012B2 - 基板処理方法 - Google Patents
基板処理方法 Download PDFInfo
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- JP7095012B2 JP7095012B2 JP2020057175A JP2020057175A JP7095012B2 JP 7095012 B2 JP7095012 B2 JP 7095012B2 JP 2020057175 A JP2020057175 A JP 2020057175A JP 2020057175 A JP2020057175 A JP 2020057175A JP 7095012 B2 JP7095012 B2 JP 7095012B2
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- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
- H01L2223/5446—Located in scribe lines
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Mechanical Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Oil, Petroleum & Natural Gas (AREA)
- Laser Beam Processing (AREA)
- Dicing (AREA)
- Processing Of Stones Or Stones Resemblance Materials (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
波長:300乃至1100nm
パルス幅:10乃至100ns
パルスエネルギー:1乃至10μJ
パルスピッチ(中心から中心):0.5乃至4μm
波長:300乃至1100nm
パルス幅:10乃至100ns
パルスエネルギー:5乃至40μJ
パルスピッチ(中心から中心):6乃至24μm
Claims (9)
- 少なくとも1つの分割ライン(12)が形成された第1面(4)と、前記第1面(4)の反対側の第2面(6)と、を有する基板(2)を処理する方法であって、
保護シート(30)を前記第1面(4)に取り付けるステップと、
レーザービーム(LB)を前記保護シート(30)に照射して、複数の位置合わせ用マーク(16)を前記保護シート(30)の内部に形成するステップと、
基板材料を前記少なくとも1つの分割ライン(12)に沿って前記第2面(6)の側から基板材料除去手段(26)を使用して除去するステップと、
を備える方法において、
前記保護シートは、前記レーザービームに対して透過性を有し、
前記位置合わせ用マークは、前記レーザービームの焦点を、前記保護シートにおいて前記位置合わせ用マークが形成される位置に配置することにより、前記保護シートに形成され、
前記位置合わせ用マーク(16)は、前記基板材料除去手段(26)を前記少なくとも1つの分割ライン(12)に対して位置合わせするために使用される、
方法。 - 前記保護シート(30)の一部分(40)が、前記第1面(4)を超えて横方向に延在し、
前記位置合わせ用マーク(16)のうちの少なくとも1つは、前記第1面(4)を超えて横方向に延在する前記保護シート(30)の前記一部分(40)の内部に形成される、
請求項1に記載の方法。 - 前記第1面(4)を超えて横方向に延在する前記保護シート(30)の前記一部分(40)は、前記基板(2)の厚さ方向に沿って、前記第1面(4)から前記第2面(6)に向かって延在し、
前記位置合わせ用マーク(16)のうちの少なくとも1つは、前記第1面(4)を超えて横方向に延在する前記保護シート(30)の前記一部分(40)において、前記第1面(4)より前記第2面(6)に近い位置に形成される、
請求項2に記載の方法。 - 裏面層(14)、特に金属層が、前記第2面(6)に形成される、
請求項1乃至3のいずれか一項に記載の方法。 - レーザービーム(LB)を前記基板(2)に前記第1面(4)の側から照射するステップを更に備え、
前記基板(2)は、前記レーザービーム(LB)に対して透過性を有する材料で作製され、
前記レーザービーム(LB)を、前記少なくとも1つの分割ライン(12)に沿った複数の位置において前記基板(2)に照射することにより、複数の改質領域(18)が前記基板(2)に形成される、
請求項1乃至4のいずれか一項に記載の方法。 - 特に前記基板(2)を前記少なくとも1つの分割ライン(12)に沿って機械的に切断することにより、前記基板材料は前記少なくとも1つの分割ライン(12)に沿って機械的に除去される、
請求項1乃至5のいずれか一項に記載の方法。 - 前記基板材料は、レーザーカットにより、特にレーザーアブレーションにより、前記少なくとも1つの分割ライン(12)に沿って除去される、
請求項1乃至5のいずれか一項に記載の方法。 - 前記基板材料は、前記基板(2)の厚さの一部のみに沿って、前記第2面(6)から前記第1面(4)に向かう方向において除去される、
請求項1乃至7のいずれか一項に記載の方法。 - 基板材料を前記少なくとも1つの分割ライン(12)に沿って除去するステップの後に、外力を前記基板(2)に付与して前記基板(2)を前記少なくとも1つの分割ライン(12)に沿って分割するステップを更に備える、
請求項1乃至8のいずれか一項に記載の方法。
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