JP7091204B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP7091204B2 JP7091204B2 JP2018175440A JP2018175440A JP7091204B2 JP 7091204 B2 JP7091204 B2 JP 7091204B2 JP 2018175440 A JP2018175440 A JP 2018175440A JP 2018175440 A JP2018175440 A JP 2018175440A JP 7091204 B2 JP7091204 B2 JP 7091204B2
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- 239000004065 semiconductor Substances 0.000 title claims description 265
- 239000012535 impurity Substances 0.000 claims description 30
- 230000004888 barrier function Effects 0.000 description 28
- 238000000034 method Methods 0.000 description 12
- 239000002184 metal Substances 0.000 description 6
- 230000009467 reduction Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 230000000149 penetrating effect Effects 0.000 description 5
- 238000009825 accumulation Methods 0.000 description 4
- 230000006378 damage Effects 0.000 description 4
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000004088 simulation Methods 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
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Description
第1の実施形態の半導体装置は、第1の面と、第1の面と対向する第2の面を有する半導体層と、半導体層の中に設けられた第1導電形の第1の半導体領域と、半導体層の中に、第1の半導体領域と第1の面との間に設けられた第2導電形の第2の半導体領域と、半導体層の中に、第2の半導体領域と第1の面との間に設けられた第1導電形の第3の半導体領域と、第3の半導体領域を貫通し第2の半導体領域に達する第1のトレンチと、第1のトレンチの中に設けられた第1のゲート電極と、第1のゲート電極と半導体層との間に設けられた第1のゲート絶縁膜と、第3の半導体領域を貫通し第2の半導体領域に達する第2のトレンチと、第2のトレンチの中に設けられた第2のゲート電極と、第2のゲート電極と半導体層との間に設けられた第2のゲート絶縁膜と、半導体層の中に、第3の半導体領域と第1の面との間に設けられ、第1のゲート絶縁膜に接し、第2のゲート絶縁膜と離間した第2導電形の第4の半導体領域と、半導体層の第1の面の側に設けられ、第4の半導体領域に電気的に接続された第1の電極と、半導体層の第2の面の側に設けられ第1の半導体領域に電気的に接続された第2の電極と、半導体層の第1の面の側に設けられ、第1のゲート電極と電気的に接続され、第1のゲート電圧が印加される第1のゲート電極パッドと、半導体層の第1の面の側に設けられ、第2のゲート電極と電気的に接続され、第2のゲート電圧が印加される第2のゲート電極パッドと、を備え、第1のゲート電圧をターンオン電圧からターンオフ電圧に変化させる前に、第2のゲート電圧を第1の電圧から第2の電圧に変化させ、第2の電圧は、第1導電形がp形の場合には負電圧であり、第1導電形がn形の場合には正電圧である。
第2の実施形態の半導体装置は、半導体層の中に、第2の半導体領域と第3の半導体領域との間に設けられ、第2の半導体領域よりも第2導電形不純物濃度の高い第2導電形の第5の半導体領域を、更に備える点で、第1の実施形態の半導体装置と異なっている。以下、第1の実施形態と重複する内容については、一部記述を省略する。
第3の実施形態の半導体装置は、半導体層の中に、第2の半導体領域と第5の半導体領域との間に設けられた第1導電形の第6の半導体領域を、更に備える点で、第2の実施形態の半導体装置と異なっている。以下、第1の実施形態及び第2の実施形態と重複する内容については、一部記述を省略する。
第4の実施形態の半導体装置は、第1の面と、第1の面と対向する第2の面を有する半導体層と、半導体層の中に設けられた第1導電形の第1の半導体領域と、半導体層の中に、第1の半導体領域と第1の面との間に設けられた第2導電形の第2の半導体領域と、半導体層の中に、第2の半導体領域と第1の面との間に設けられた第1導電形の第3の半導体領域と、第3の半導体領域を貫通し第2の半導体領域に達する第1のトレンチと、第1のトレンチの中に設けられた第1のゲート電極と、第1のゲート電極と半導体層との間に設けられた第1のゲート絶縁膜と、第3の半導体領域を貫通し第2の半導体領域に達する第2のトレンチと、第2のトレンチの中に設けられた第2のゲート電極と、第2のゲート電極と半導体層との間に設けられた第2のゲート絶縁膜と、半導体層の中に、第3の半導体領域と第1の面との間に設けられ、第1のゲート絶縁膜及び第2のゲート絶縁膜に接した第2導電形の第4の半導体領域と、半導体層の中に、第2の半導体領域と第3の半導体領域との間に設けられ、第2の半導体領域よりも第2導電形不純物濃度の高い第2導電形の第5の半導体領域と、半導体層の第1の面の側に設けられ、第4の半導体領域に電気的に接続された第1の電極と、半導体層の第2の面の側に設けられ第1の半導体領域に電気的に接続された第2の電極と、半導体層の第1の面の側に設けられ、第1のゲート電極と電気的に接続され、第1のゲート電圧が印加される第1のゲート電極パッドと、半導体層の第1の面の側に設けられ、第2のゲート電極と電気的に接続され、第2のゲート電圧が印加される第2のゲート電極パッドと、を備え、第1のゲート電圧をターンオン電圧からターンオフ電圧に変化させる前に、第2のゲート電圧を第1の電圧から第2の電圧に変化させ、第2の電圧は、第1導電形がp形の場合には負電圧であり、第1導電形がn形の場合には正電圧である。
第5の実施形態の半導体装置は、第4の半導体領域のパターンが異なる点で、第4の実施形態の半導体装置と異なっている。以下、第4の実施形態と重複する内容については、一部記述を省略する。
12 エミッタ電極(第1の電極)
14 コレクタ電極(第2の電極)
21 第1のゲートトレンチ(第1のトレンチ)
22 第2のゲートトレンチ(第2のトレンチ)
28 コレクタ領域(第1の半導体領域)
32 ドリフト領域(第2の半導体領域)
34 ベース領域(第3の半導体領域)
36 エミッタ領域(第4の半導体領域)
41 第1のゲート絶縁膜
42 第2のゲート絶縁膜
51 第1のゲート電極
52 第2のゲート電極
70 バリア領域(第5の半導体領域)
80 p形領域(第6の半導体領域)
100 IGBT(半導体装置)
101 第1のゲート電極パッド
102 第2のゲート電極パッド
200 IGBT(半導体装置)
300 IGBT(半導体装置)
400 IGBT(半導体装置)
500 IGBT(半導体装置)
P1 第1の面
P2 第2の面
Claims (6)
- 第1の面と、前記第1の面と対向する第2の面を有する半導体層と、
前記半導体層の中に設けられた第1導電形の第1の半導体領域と、
前記半導体層の中に、前記第1の半導体領域と前記第1の面との間に設けられた第2導電形の第2の半導体領域と、
前記半導体層の中に、前記第2の半導体領域と前記第1の面との間に設けられた第1導電形の第3の半導体領域と、
前記第3の半導体領域を貫通し前記第2の半導体領域に達する第1のトレンチと、
前記第1のトレンチの中に設けられた第1のゲート電極と、
前記第1のゲート電極と前記半導体層との間に設けられた第1のゲート絶縁膜と、
前記第3の半導体領域を貫通し前記第2の半導体領域に達する第2のトレンチと、
前記第2のトレンチの中に設けられた第2のゲート電極と、
前記第2のゲート電極と前記半導体層との間に設けられた第2のゲート絶縁膜と、
前記半導体層の中に、前記第3の半導体領域と前記第1の面との間に設けられ、前記第1のゲート絶縁膜に接し、前記第2のゲート絶縁膜と離間した第2導電形の第4の半導体領域と、
前記半導体層の前記第1の面の側に設けられ、前記第4の半導体領域に電気的に接続された第1の電極と、
前記半導体層の前記第2の面の側に設けられ、前記第1の半導体領域に電気的に接続された第2の電極と、
前記半導体層の前記第1の面の側に設けられ、前記第1のゲート電極と電気的に接続され、第1のゲート電圧が印加される第1のゲート電極パッドと、
前記半導体層の前記第1の面の側に設けられ、前記第2のゲート電極と電気的に接続され、第2のゲート電圧が印加される第2のゲート電極パッドと、を備え、
前記第1のゲート電圧をターンオン電圧からターンオフ電圧に変化させる前に、前記第2のゲート電圧を第1の電圧から第2の電圧に変化させ、前記第2の電圧は、第1導電形がp形の場合には負電圧であり、第1導電形がn形の場合には正電圧である半導体装置。 - 前記半導体層の中に、前記第2の半導体領域と前記第3の半導体領域との間に設けられ、前記第2の半導体領域よりも第2導電形不純物濃度の高い第2導電形の第5の半導体領域を、更に備える請求項1記載の半導体装置。
- 前記半導体層の中に、前記第2の半導体領域と前記第5の半導体領域との間に設けられた第1導電形の第6の半導体領域を、更に備える請求項2記載の半導体装置。
- 前記第2のゲート電極パッドに前記第2の電圧が印加されることにより、前記第2のゲート絶縁膜に接する前記第2の半導体領域に反転層が形成される請求項1ないし請求項3いずれか一項記載の半導体装置。
- 前記第2のゲート電極パッドに前記第2の電圧が印加されることにより、前記第2のゲート絶縁膜に接する前記第5の半導体領域に反転層が形成される請求項2記載の半導体装置。
- 前記第1のゲート電圧に前記ターンオン電圧が印加されている際の前記第1の電圧の絶対値は、前記ターンオン電圧の絶対値よりも小さい請求項1ないし請求項5いずれか一項記載の半導体装置。
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WO2005109521A1 (ja) | 2004-05-12 | 2005-11-17 | Kabushiki Kaisha Toyota Chuo Kenkyusho | 半導体装置 |
JP2016162855A (ja) | 2015-02-27 | 2016-09-05 | 株式会社日立製作所 | 半導体装置およびそれを用いた電力変換装置 |
JP2017139328A (ja) | 2016-02-03 | 2017-08-10 | 株式会社デンソー | ダイオードおよび半導体装置 |
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