JP6927138B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP6927138B2 JP6927138B2 JP2018089202A JP2018089202A JP6927138B2 JP 6927138 B2 JP6927138 B2 JP 6927138B2 JP 2018089202 A JP2018089202 A JP 2018089202A JP 2018089202 A JP2018089202 A JP 2018089202A JP 6927138 B2 JP6927138 B2 JP 6927138B2
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Description
(2)上記形態における半導体装置の製造方法において、さらに、前記不純物は、n型不純物であり、前記注入領域と導通する第2電極を形成する第2電極形成工程を備え、前記第1電極形成工程は、前記溝部の表面から前記p型半導体層の表面のうち少なくとも前記注入領域に至るまで前記絶縁膜を介して前記第1電極を形成してもよい。この第1電極と第2電極とは電気的に接続されていない。このような形態とすれば、第1電極がp型半導体層の表面のうちn型不純物がイオン注入される位置に到るまで絶縁膜を介して形成されているため、第1電極に電圧が印加された際に注入領域と接続する位置まで反転層を形成することができる。したがって、導通経路を確実に確保することができる。
(3)上記形態における半導体装置の製造方法において、さらに、前記イオン注入工程の後、前記p型半導体層の表面のうち前記溝部が形成される位置から少なくとも前記注入領域に至るまで第2n型半導体層を形成する工程と、前記第2n型半導体層と導通する第2電極を形成する第2電極形成工程と、を備えてもよい。この第1電極と第2電極とは電気的に接続されていない。このような形態とすれば、イオン注入される不純物がn型不純物である場合、溝部が形成される位置から離れた位置にn型不純物がイオン注入されることによって生じるチャネル長の増加を抑制できる。また、イオン注入によってダメージを受けた注入領域は、電極のコンタクトが取りがたく、接触抵抗やオン抵抗が高くなりやすい。しかし、第2電極を第2n型半導体層にコンタクトさせることで、オン抵抗を低くすることができ、イオン注入される不純物がp型不純物である場合においては、第2n型半導体層をソースとして用いることができる。
(4)本発明の他の形態によれば、半導体装置が提供される。この半導体装置は、第1n型半導体層にp型半導体層が積層された積層体と、前記p型半導体層を貫通して前記第1n型半導体層内に底部が位置する溝部と、前記溝部が形成される位置から離れた位置において、前記p型半導体層の表面から前記p型半導体層の内側にわたって形成され、前記p型半導体層とは不純物濃度が異なる不純物注入領域と、前記不純物注入領域の下方に位置する前記第1n型半導体層に形成されるp型半導体領域と、前記溝部の表面に絶縁膜を介して形成された第1電極と、を備える。
(5)上記形態における半導体装置において、さらに、前記不純物注入領域はn型不純物が注入された領域であり、前記不純物注入領域と導通する第2電極を備え、前記第1電極は、前記溝部の表面から前記p型半導体層の表面のうち少なくとも前記不純物注入領域が形成された位置に至るまで前記絶縁膜を介して形成されていてもよい。
(6)上記形態における半導体装置において、さらに、前記p型半導体層の表面のうち前記溝部が形成される位置から少なくとも前記不純物注入領域に至る第2n型半導体層と、前記第2n型半導体層と導通する第2電極と、を備えてもよい。
図1は、第1実施形態の半導体装置10の断面の一部を示す模式図である。なお、図1以降に示された模式図は、半導体装置10の技術的特徴をわかりやすく示すための図であり、各部の寸法を正確に示すものではない。図1には、説明を容易にするために、相互に略直交するXYZ軸が図示されている。図1のXYZ軸は、他の図のXYZ軸は、図1のXYZ軸に対応する。なお、本明細書において、Z軸の+方向を便宜的に「上」と呼ぶことがある。この「上」という呼称は、半導体装置10の配置(向き)を限定するものではない。すなわち、半導体装置10は、任意の向きに配置しうる。
図7は、第2実施形態の半導体装置10aの断面の一部を示す模式図である。半導体装置10aは、第1実施形態の第2電極174とは異なる第2電極174aおよびn型半導体層310を備える点を除き、第1実施形態の半導体装置10の装置構成と同じである。第1実施形態と同じ符号は、同一の構成を示すものであって、先行する説明を参照する。
図9は、第3実施形態の半導体装置10bの断面の一部を示す模式図である。半導体装置10cは、n型半導体領域140の代わりにp型半導体領域140bを備える点を除き、第2実施形態の半導体装置10aの装置構成と同じである。第1実施形態と同じ符号は、同一の構成を示すものであって、先行する説明を参照する。
図10は、第4実施形態の半導体装置10cの断面の一部を示す模式図である。半導体装置10cは、第3実施形態のp型半導体領域140bおよびp型不純物拡散領域150の代わりにp型半導体領域140cおよびp型不純物拡散領域150cを備える点を除き、第3実施形態の半導体装置10bの装置構成と同じである。第3実施形態と同じ符号は、同一の構成を示すものであって、先行する説明を参照する。
第1実施形態では、イオン注入工程(工程P130)および熱処理工程(工程P140)を行ってから溝部形成工程(工程P150)を行っていたが、本発明はこれに限られない。例えば、溝部形成工程(工程P150)を行ってからイオン注入工程(工程P130)および熱処理工程(工程P140)を行ってもよい。
Claims (1)
- 半導体装置の製造方法であって、
第1n型半導体層にp型半導体層を積層する積層工程と、
前記p型半導体層の表面のうち溝部が形成される位置から離れた位置にn型不純物またはp型不純物をイオン注入するイオン注入工程と、
熱処理によって、前記イオン注入された不純物を活性化させた注入領域を形成するとともに、前記注入領域の下方に位置する前記第1n型半導体層に対して前記p型半導体層に含まれるp型不純物を拡散させることによってp型不純物拡散領域を形成する熱処理工程と、
前記p型半導体層を貫通して前記第1n型半導体層内に底部が位置する前記溝部を形成する溝部形成工程と、
前記溝部の表面に絶縁膜を介して第1電極を形成する第1電極形成工程と、
を備え、更に、
前記イオン注入工程の後、前記p型半導体層の表面のうち前記溝部が形成される位置から少なくとも前記注入領域に至るまで第2n型半導体層を形成する工程と、
前記第2n型半導体層と導通する第2電極を形成する第2電極形成工程と、
を備える、半導体装置の製造方法。
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