JP6707292B2 - 積層チップの製造方法 - Google Patents
積層チップの製造方法 Download PDFInfo
- Publication number
- JP6707292B2 JP6707292B2 JP2016203071A JP2016203071A JP6707292B2 JP 6707292 B2 JP6707292 B2 JP 6707292B2 JP 2016203071 A JP2016203071 A JP 2016203071A JP 2016203071 A JP2016203071 A JP 2016203071A JP 6707292 B2 JP6707292 B2 JP 6707292B2
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- Prior art keywords
- wafer
- chip
- chips
- thickness
- back surface
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000004519 manufacturing process Methods 0.000 title claims description 17
- 238000000034 method Methods 0.000 claims description 13
- 238000005520 cutting process Methods 0.000 description 21
- 238000005259 measurement Methods 0.000 description 9
- 239000004065 semiconductor Substances 0.000 description 7
- 238000003754 machining Methods 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000003028 elevating effect Effects 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 230000003595 spectral effect Effects 0.000 description 2
- 238000001228 spectrum Methods 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Grinding Of Cylindrical And Plane Surfaces (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Dicing (AREA)
Description
11a 表面
11b 裏面
13 分割予定ライン(ストリート)
15 デバイス
17 分割用の溝(分割用の構造)
19,19a,19b,19c チップ
21 保護部材
21a 表面
21b 裏面
31 積層チップ
2 切削装置
4 チャックテーブル
4a 保持面
6 切削ユニット
8 スピンドル
10 切削ブレード
22 研削装置
24 チャックテーブル
24a 保持面
26 研削ユニット
28 スピンドル
30 マウント
32 研削ホイール
34 ホイール基台
36 研削砥石
38 厚み測定器
Claims (2)
- 複数のチップが積層された積層チップの製造方法であって、
ウェーハの裏面を研削してウェーハを薄くし、ウェーハを複数のチップへと分割するチップ形成ステップと、
該チップ形成ステップで得られた各チップの厚みを測定する測定ステップと、
複数のチップを積層した際に所定の厚みになるように、該測定ステップで測定した各チップの厚みに基づき積層すべき複数のチップを選択して積層するチップ積層ステップと、を備えることを特徴とする積層チップの製造方法。 - 該チップ形成ステップでは、交差する複数の分割予定ラインに沿ってウェーハに分割用の構造を形成した後、ウェーハの裏面を研削することで、ウェーハを薄くして複数のチップへと分割することを特徴とする請求項1に記載の積層チップの製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016203071A JP6707292B2 (ja) | 2016-10-14 | 2016-10-14 | 積層チップの製造方法 |
TW106131129A TWI732935B (zh) | 2016-10-14 | 2017-09-12 | 層疊晶片之製造方法 |
CN201710945668.7A CN107958848B (zh) | 2016-10-14 | 2017-10-12 | 层叠芯片的制造方法 |
KR1020170132578A KR102315783B1 (ko) | 2016-10-14 | 2017-10-12 | 적층칩의 제조 방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016203071A JP6707292B2 (ja) | 2016-10-14 | 2016-10-14 | 積層チップの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018064078A JP2018064078A (ja) | 2018-04-19 |
JP6707292B2 true JP6707292B2 (ja) | 2020-06-10 |
Family
ID=61954623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016203071A Active JP6707292B2 (ja) | 2016-10-14 | 2016-10-14 | 積層チップの製造方法 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP6707292B2 (ja) |
KR (1) | KR102315783B1 (ja) |
CN (1) | CN107958848B (ja) |
TW (1) | TWI732935B (ja) |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4704319A (en) * | 1984-11-23 | 1987-11-03 | Irvine Sensors Corporation | Apparatus and method for fabricating modules comprising stacked circuit-carrying layers |
US4617160A (en) * | 1984-11-23 | 1986-10-14 | Irvine Sensors Corporation | Method for fabricating modules comprising uniformly stacked, aligned circuit-carrying layers |
TW503531B (en) * | 2000-09-28 | 2002-09-21 | Toshiba Corp | Multi-layered semiconductor apparatus |
TW479339B (en) * | 2001-03-01 | 2002-03-11 | Advanced Semiconductor Eng | Package structure of dual die stack |
JP2003007653A (ja) * | 2001-06-26 | 2003-01-10 | Disco Abrasive Syst Ltd | 半導体ウェーハの分割システム及び分割方法 |
JP4769048B2 (ja) * | 2005-08-23 | 2011-09-07 | 株式会社ディスコ | 基板の加工方法 |
JP2008182015A (ja) | 2007-01-24 | 2008-08-07 | Disco Abrasive Syst Ltd | ウエーハの研削方法 |
JP5059449B2 (ja) * | 2007-03-02 | 2012-10-24 | 株式会社ディスコ | ウェーハの加工方法 |
JP4875532B2 (ja) * | 2007-04-03 | 2012-02-15 | 株式会社ディスコ | 切削加工装置 |
JP5122854B2 (ja) * | 2007-04-13 | 2013-01-16 | 株式会社ディスコ | デバイスの研削方法 |
WO2008125543A2 (en) * | 2007-04-17 | 2008-10-23 | Interuniversitair Microelektronica Centrum (Imec) | Method for reducing the thickness of substrates |
JP4980140B2 (ja) * | 2007-05-25 | 2012-07-18 | 株式会社ディスコ | ウェーハの研削加工方法 |
JP2013084717A (ja) * | 2011-10-07 | 2013-05-09 | Tokyo Electron Ltd | 三次元実装装置 |
JP2013138077A (ja) * | 2011-12-28 | 2013-07-11 | Tokyo Electron Ltd | 三次元実装装置 |
JP5930840B2 (ja) * | 2012-05-22 | 2016-06-08 | 株式会社ディスコ | 板状物の加工方法 |
JP5995616B2 (ja) * | 2012-09-05 | 2016-09-21 | 株式会社ディスコ | ウエーハの加工方法 |
JP6215544B2 (ja) * | 2013-03-18 | 2017-10-18 | 株式会社ディスコ | ウエーハの加工方法 |
JP5902114B2 (ja) * | 2013-03-22 | 2016-04-13 | 株式会社東芝 | 半導体装置及びその製造方法 |
CN103413785B (zh) * | 2013-08-02 | 2015-08-26 | 南通富士通微电子股份有限公司 | 芯片切割方法及芯片封装方法 |
JP2015041687A (ja) * | 2013-08-21 | 2015-03-02 | 株式会社ディスコ | ウエーハの加工方法 |
JP2015176937A (ja) * | 2014-03-14 | 2015-10-05 | マイクロン テクノロジー, インク. | 半導体装置の製造方法 |
JP2015233077A (ja) * | 2014-06-10 | 2015-12-24 | 株式会社ディスコ | ウエーハの加工方法 |
JP6389660B2 (ja) * | 2014-07-04 | 2018-09-12 | 株式会社ディスコ | 研削方法 |
JP2016178100A (ja) * | 2015-03-18 | 2016-10-06 | マイクロン テクノロジー, インク. | 半導体装置の製造方法 |
-
2016
- 2016-10-14 JP JP2016203071A patent/JP6707292B2/ja active Active
-
2017
- 2017-09-12 TW TW106131129A patent/TWI732935B/zh active
- 2017-10-12 KR KR1020170132578A patent/KR102315783B1/ko active IP Right Grant
- 2017-10-12 CN CN201710945668.7A patent/CN107958848B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
TW201826445A (zh) | 2018-07-16 |
CN107958848A (zh) | 2018-04-24 |
CN107958848B (zh) | 2023-07-07 |
KR102315783B1 (ko) | 2021-10-20 |
TWI732935B (zh) | 2021-07-11 |
KR20180041592A (ko) | 2018-04-24 |
JP2018064078A (ja) | 2018-04-19 |
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