JP6674016B2 - 印刷配線板およびその製造方法 - Google Patents
印刷配線板およびその製造方法 Download PDFInfo
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- JP6674016B2 JP6674016B2 JP2018507407A JP2018507407A JP6674016B2 JP 6674016 B2 JP6674016 B2 JP 6674016B2 JP 2018507407 A JP2018507407 A JP 2018507407A JP 2018507407 A JP2018507407 A JP 2018507407A JP 6674016 B2 JP6674016 B2 JP 6674016B2
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/036—Multilayers with layers of different types
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0094—Filling or covering plated through-holes or blind plated vias, e.g. for masking or for mechanical reinforcement
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/423—Plated through-holes or plated via connections characterised by electroplating method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/01—Dielectrics
- H05K2201/0183—Dielectric layers
- H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/068—Thermal details wherein the coefficient of thermal expansion is important
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09563—Metal filled via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/20—Details of printed circuits not provided for in H05K2201/01 - H05K2201/10
- H05K2201/2072—Anchoring, i.e. one structure gripping into another
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0723—Electroplating, e.g. finish plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0055—After-treatment, e.g. cleaning or desmearing of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/027—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed by irradiation, e.g. by photons, alpha or beta particles
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
(I)絶縁体の表面に導体回路を形成してコア層を得る工程。
(II)コア層の少なくとも一つの面に、第1の樹脂を含む少なくとも1層の第1ビルドアップ層を積層させる工程。
(III)第1ビルドアップ層の表面に、第2の樹脂を含む第2ビルドアップ層を積層させる工程。
(IV)コア層と第1および第2ビルドアップ層とを貫通するスルーホールを形成する工程。
(V)第2ビルドアップ層におけるスルーホールの開口部周辺に、導体が充填されたフィルドビアを複数形成する工程。
以下、本開示の一実施形態に係る印刷配線板の製造方法を、図2(a)〜(d)および図3(e)および(f)に基づいて説明する。
1a 孔部
10 コア層
2、20、21 導体回路
21a 銅箔
3 第1ビルドアップ層
31、32 絶縁樹脂層
32’ 第1のプリプレグ
3' 第2ビルドアップ層
3a 樹脂付き銅箔
3a' 樹脂(半硬化樹脂)
3a'' 銅箔
3b 2層基板
3b' 絶縁体
3b'' 導体層
4、4’ ビア
4’a ビア形成用の穴部
5 スルーホール
5a スルーホール下孔
6 フィルドビア
6a フィルドビア形成用の穴部
7 導体層
8 ソルダーレジスト層
11、12 積層板
100、110 印刷配線板
Claims (12)
- 絶縁体の表面に導体回路が位置するコア層と、
該コア層の表面に積層された第1の樹脂を含む第1ビルドアップ層と、
該第1ビルドアップ層の表面に積層された第2の樹脂を含む第2ビルドアップ層と、
前記コア層、前記第1ビルドアップ層および前記第2ビルドアップ層を貫通するスルーホールと、を備え、
前記第1の樹脂と前記第2の樹脂とは互いに異なる樹脂であり、
前記第2の樹脂は、前記第1の樹脂よりも大きい熱膨張係数を有し、
前記第2ビルドアップ層は、前記スルーホールの開口部周辺に、前記第2の樹脂よりも小さい熱膨張係数を有する導体が充填された複数のフィルドビアを有し、複数のフィルドビアは電気的に独立していることを特徴とする印刷配線板。 - 前記フィルドビアが、前記スルーホールの開口部周辺に少なくとも2個配置されている請求項1に記載の印刷配線板。
- 複数の前記フィルドビアが、前記スルーホールを中心にして同一円周上に配置されている請求項1または2に記載の印刷配線板。
- 前記スルーホールの壁面と前記フィルドビアの壁面とが、少なくとも0.3mmの距離を設けて位置している請求項1〜3のいずれかに記載の印刷配線板。
- 隣接する前記フィルドビアの壁面同士の距離が、少なくとも0.3mm離れて位置している請求項1〜4のいずれかに記載の印刷配線板。
- 前記コア層の前記絶縁体を形成する樹脂と前記第1ビルドアップ層を形成する前記第1の樹脂とが、同じ樹脂である請求項1〜5のいずれかに記載の印刷配線板。
- 前記第1ビルドアップ層は、前記コア層の上下両面に位置しており、
前記第2ビルドアップ層は、片方または両方の前記第1ビルドアップ層の表面に位置している請求項1〜6のいずれかに記載の印刷配線板。 - 前記第2ビルドアップ層が、前記コア層の一つの面に位置する前記第1ビルドアップ層の表面に位置している請求項1〜7のいずれかに記載の印刷配線板。
- 前記第1ビルドアップ層が、前記第1の樹脂を含む少なくとも一層により構成される請求項1〜8のいずれかに記載の印刷配線板。
- 絶縁体の表面に導体回路を形成してコア層を得る工程と、
コア層の少なくとも一つの面に、第1の樹脂を含む第1ビルドアップ層を積層する工程と、
第1ビルドアップ層の表面に、前記第1の樹脂よりも大きい熱膨張係数を有する第2の樹脂を含む第2ビルドアップ層を積層する工程と、
前記コア層と第1および第2ビルドアップ層とを貫通するスルーホールを形成する工程と、
前記第2ビルドアップ層における前記スルーホールの開口部周辺に、前記第2の樹脂よりも小さい熱膨張係数を有する導体が充填されたフィルドビアを電気的に独立させて複数形成する工程と、
を含むことを特徴とする印刷配線板の製造方法。 - 前記第2ビルドアップ層が、樹脂付き銅箔である請求項10に記載の印刷配線板の製造方法。
- 前記第2ビルドアップ層が、2層基板である請求項10に記載の印刷配線板の製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016060655 | 2016-03-24 | ||
JP2016060655 | 2016-03-24 | ||
PCT/JP2017/011693 WO2017164300A1 (ja) | 2016-03-24 | 2017-03-23 | 印刷配線板およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2017164300A1 JPWO2017164300A1 (ja) | 2019-01-10 |
JP6674016B2 true JP6674016B2 (ja) | 2020-04-01 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2018507407A Active JP6674016B2 (ja) | 2016-03-24 | 2017-03-23 | 印刷配線板およびその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US10952320B2 (ja) |
EP (1) | EP3435747A4 (ja) |
JP (1) | JP6674016B2 (ja) |
WO (1) | WO2017164300A1 (ja) |
Families Citing this family (3)
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US20200279814A1 (en) * | 2019-02-28 | 2020-09-03 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
US10790241B2 (en) | 2019-02-28 | 2020-09-29 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
EP3979308A4 (en) | 2019-05-31 | 2023-08-16 | Kyocera Corporation | PRINTED CARD AND METHOD OF MAKING A PRINTED CARD |
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2017
- 2017-03-23 EP EP17770340.2A patent/EP3435747A4/en active Pending
- 2017-03-23 JP JP2018507407A patent/JP6674016B2/ja active Active
- 2017-03-23 WO PCT/JP2017/011693 patent/WO2017164300A1/ja active Application Filing
- 2017-03-23 US US16/087,975 patent/US10952320B2/en active Active
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Publication number | Publication date |
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EP3435747A4 (en) | 2019-11-27 |
US20190098755A1 (en) | 2019-03-28 |
EP3435747A1 (en) | 2019-01-30 |
WO2017164300A1 (ja) | 2017-09-28 |
US10952320B2 (en) | 2021-03-16 |
JPWO2017164300A1 (ja) | 2019-01-10 |
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