JP6658171B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP6658171B2 JP6658171B2 JP2016056559A JP2016056559A JP6658171B2 JP 6658171 B2 JP6658171 B2 JP 6658171B2 JP 2016056559 A JP2016056559 A JP 2016056559A JP 2016056559 A JP2016056559 A JP 2016056559A JP 6658171 B2 JP6658171 B2 JP 6658171B2
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- semiconductor device
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Description
そこでSiCは、半導体基板のドリフト層を薄くして、抵抗成分をSiより小さくでき、デバイスの損失を小さくできる点で有利である。しかし、厚さ10μm程度の極薄の厚みとなると、SiCの半導体基板の機械的強度が非常に小さくなるため、薄化後、上面側のサポート基板を分離した状態で、様々な問題が生じる。
また半導体基板が極薄であると、チップ単体での取り扱いの際にも、デバイス構造や温度変化による内部応力や、ハンドリング時や配線との接続時等において外部から負荷される応力により、容易に破損する可能性が非常に高くなる。
また上面側にサポート基板を用いる場合であっても、半導体基板が極薄であると、半導体基板からサポート基板を取り外す際の衝撃により、半導体基板が破損する可能性が高くなる。このようにワイドバンドギャップ半導体が極薄であると、機械的強度が著しく低下して、取扱いの困難さが飛躍的に大きくなるという問題がある。
また基板部分を選択的に除去し、チップ状態で基板の厚い領域を意図的に残す方法がある(特許文献3参照)。しかしSiCは加工が比較的難しい材料であり、特許文献3の方法の場合、加工作業に多くの時間やコストがかかってしまうという問題が生じる。
一方、Siの融点は1600℃より低い1414℃である。特許文献4では、このSiの融点が考慮されていないため、Si基板をSiC基板のリブとしてそのまま適用したとしても、SiCのエピタキシャル成長やSiCへの不純物導入にSi基板が耐えられない。そのため、実際の使用に耐えられるSiCデバイスを作製できない。
そのため特許文献5の場合、実際に縦型の半導体装置を製造することは困難である。またエッチングにより接合界面の酸化膜を除去する工程では、エッチング時に接合界面に侵入するエッチャントを除去することは非常に困難であるため、2枚の基板の接合強度が低下するという問題も生じる。
(半導体装置)
第1の実施の形態に係る半導体装置は、図1(a)に示すように、SiCを主材料とするエピタキシャル成長層(以下「エピ層」と称する。)1と、このエピ層1の上に設けられたデバイス構造2と、を備える。また第1の実施の形態に係る半導体装置は、図1(b)に示すように、エピ層1の下面(裏面)に、下面の中央部が部分的に露出するように、下面の周縁の領域に選択的に設けられたサポート脚3を備える。
図2に示すように、エピ層1の露出した下面及びサポート脚3の下面には、下面電極4が設けられている。下面電極4は、例えばニッケル(Ni)、アルミニウム(Al)、又はNiAl等からなる導電膜である。
すなわちサポート脚3は、エピ層1の露出した下面を底面とし、下面から連続するサポート脚3の斜面を側壁面とする凹部をなしている。凹部の図2中に現れる断面パターンは等脚台形状である。
尚、図1及び図2は模式的な例示であるので、実際の半導体装置としてのデバイス構造の明示は省略されている。デバイス構造は、エピ層1の上部にチャネル領域やソース領域等の半導体領域が設けられると共に、それらの半導体領域の上に、絶縁膜を介してゲート電極が設けられる等の種々の構造が採用可能である。そしてエピ層1の上部の半導体領域及びエピ層1の上に設けられた構造が一体となって、通電動作に関わるデバイス構造をなしている。
次に、第1の実施の形態に係る半導体装置の製造方法を説明する。まず、図3(a)に示すように、不純物濃度1×1018cm−3程度、厚さ350μm程度の4H−SiCのバルク層10aを有する半導体基板(半導体装置ウェハ)を用意する。そしてバルク層10aの上に、SiCをエピタキシャル成長させて、厚さ10μm程度のエピ層10を形成する。
デバイス構造20a〜20dの作成で用いられる各種の材料は、後で図10(a)を用いて説明するオーミックコンタクト層の形成までに行われる各工程の処理でそれぞれ到達する最高温度に耐えられるように、いずれの処理の最高温度よりも高い融点のものが選択される。
上面サポート基板6は、例えばSi基板やSiを原料とするガラス基板等であり、外径はSiCウェハ100と略同じでよい。また上面サポート基板6は、SiCの加工プロセスにおける必要な強度を有していればよく、Si基板は安価であるため有利である。
次に、デバイス構造20a〜20dのパターンの位置に位置合わせしたフォトリソグラフィ技術及び異方性エッチング等により、Siの下面サポート基板30rを、デバイス構造20a〜20dに対応させて選択的に除去してパターニングする。そして図8(a)に示すように、複数のデバイス構造20a〜20dに対応する下面の位置に、エピ層10が露出する開口部を備えた凹部のパターンがそれぞれ形成されたサポート構造30を形成する。
水酸化カリウム(KOH)溶液、エチレンジアミン・ピロカテコール(EDP)等が使用可能である。下面サポート基板30rの下面が(100)面であれば、図8(a)中の凹部の斜面の傾斜角度θを約52度に形成できる。次に図8(b)に示すように、下面サポート基板30rの下面を粘着テープ等の支持体7に貼り付けて固定する。
比較例に係る半導体装置は、図13に示すように、SiCを主材料とするバルク層10aと、このバルク層10aの上面に設けられたエピ層1と、このエピ層1の上に設けられたデバイス構造2と、を備える。バルク層1aの下面には下面電極4が設けられている。
比較例に係る半導体装置には、図2に示したサポート脚3は設けられておらず、その代わりに、エピ層1よりも遥かに厚いバルク層1aを備えることにより、半導体基板の強度が確保されている点が、第1の実施の形態に係る半導体装置と異なる。例えばエピ層1は10μm程度であり、バルク層1aは70μm程度である。比較例に係る半導体装置の他の構造については、図1及び図2に示した半導体装置における対応するそれぞれの構造と等価であるため、重複説明を省略する。
次に、図14に示すように、バルク層10aを下面から研削して薄化する。このとき、図6に示したような下面サポート基板30subを用いないので、バルク層10aを一定の厚み分残す必要がある。SiCウェハ100の面積や工程の内容にもよるが、エピ層10及びバルク層10aの合計厚さが望ましくは50μm以上、より望ましくは70μm以上となるように、バルク層10aを残す必要が生じる。合計厚さが50μmより薄くなると、SiCウェハ100の強度が不足し、割れ、欠け等の欠損が生じる。
このような比較例に係る半導体装置の製造方法の場合、強度を確保する必要上、バルク層10aの厚みを一定の厚み以下には薄くできないので、半導体装置のドリフト層を薄くできず、キャリアの走行時間が長くなり、高速動作ができない。更にドリフト層が厚いため抵抗成分を充分に低下できないことから導通損失も大きく、SiCの長所を十分に活かすことができない。
また、下面サポート基板30subを用いることなくエピタキシャル成長プロセスを行わずに、SiC半導体基板のみで半導体装置を作り込むには、一定の厚みを有するSiC半導体基板を用意する必要がある。なぜなら、デバイス構造20a〜20dに必要な層や、特許文献5で示されたような水素イオンの注入により形成される剥離層及び剥離時に荒れた表面を平坦化するための厚さである加工マージンといった各層のそれぞれの厚みが必要になるからである。
この点、第1の実施の形態に係る半導体装置の製造方法によれば、下面サポート基板30subとしてSi基板を用いるので、SiCのエピタキシャル成長プロセスを行うことができる。よって、複雑な構造のSiCデバイスであっても、加工の負担を抑えて安価に製造できる。
(半導体装置)
第2の実施の形態に係る半導体装置は、図17(a)に示すように、SiCを主材料とするエピ層1と、このエピ層1の上に設けられたデバイス構造2と、を備える。また第2の実施の形態に係る半導体装置は、図17(b)に示すように、エピ層1の下面に、下面の中央部が部分的に露出するように、下面の周縁の領域に選択的に設けられたサポート脚3aを備える。
第2の実施の形態に係る半導体装置によれば、エピ層1の下面側でサポート脚3aの付け根のコーナーの領域が、図1に示した半導体装置より大きく確保されることにより、サポート脚3aの強度が高められている。第2の実施の形態に係る半導体装置の他の効果については、第1の実施の形態に係る半導体装置の効果と同様である。
第2の実施の形態に係る半導体装置のサポート脚3aは、図3〜図12で説明した製造方法の、サポート構造30を加工して凹部を形成するプロセスにおいて、レジストマスクの形状を変更してエッチングされる領域を変更することで製造できる。第2の実施の形態に係る半導体装置の製造方法の他の効果については、第1の実施の形態に係る半導体装置の製造方法の効果と同様である。
(半導体装置)
第3の実施の形態に係る半導体装置は、図18(a)に示すように、SiCを主材料とするエピ層1と、このエピ層1の上に設けられたデバイス構造2と、を備える。また第3の実施の形態に係る半導体装置は、図18(b)に示すように、エピ層1の下面に、下面の中央部が部分的に露出するように、下面の周縁の領域に選択的に設けられたサポート脚3bを備える。
第3の実施の形態に係る半導体装置のサポート脚3bは、第2の実施の形態に係る半導体装置の製造方法の場合と同様に、サポート構造30を加工して凹部を形成する際、レジストマスクの形状を変更してエッチングされる領域を変更することで製造できる。第3の実施の形態に係る半導体装置の製造方法の効果については、第1の実施の形態に係る半導体装置の製造方法の効果と同様である。
(半導体装置)
第4の実施の形態に係る半導体装置は、図19に示すように、SiCを主材料とするエピ層1と、このエピ層1の上に設けられたデバイス構造2と、を備える。また第4の実施の形態に係る半導体装置は、エピ層1の下面に、下面の中央部が部分的に露出するように、下面の周縁の領域に選択的に設けられたサポート脚3と、エピ層1の下面及びサポート脚3の下面に亘って設けられた下面電極4と、を備える。
第4の実施の形態に係る半導体装置によれば、コンタクト領域11が設けられていることにより、下面のコンタクト抵抗をより低減した、MOSFET等の半導体装置を実現できる。第4の実施の形態に係る半導体装置の他の効果については、第1の実施の形態に係る半導体装置の効果と同様である。
第4の実施の形態に係る半導体装置のコンタクト領域11は、第1の実施の形態に係る半導体装置の製造方法の、サポート構造30を形成した後、n型を呈する不純物元素を凹部の底面に対してイオン注入すると共に局部加熱処理を行えば形成できる。局部加熱により、注入された不純物元素が活性化する。コンタクト領域11の形成のためのイオン注入及び局部加熱は、Siの融点以下の低温状態で行う。また、図5で示したバルク層10aの除去処理においては、後で形成されるコンタクト領域11の厚みを考慮して、バルク層10aを一部残すように行ってもよい。
(半導体装置)
第5の実施の形態に係る半導体装置は、図20に示すように、SiCを主材料とするエピ層1と、このエピ層1の上に設けられたデバイス構造2と、を備える。また第5の実施の形態に係る半導体装置は、エピ層1の下面に、下面の中央部が部分的に露出するように、下面の周縁の領域に選択的に設けられたサポート脚3と、エピ層1の下面及びサポート脚3の下面に亘って設けられた下面電極4と、を備える。
第4の実施の形態に係る半導体装置によれば、下面のコンタクト抵抗を低減したコンタクト領域12が設けられていることにより、このコンタクト領域12をコレクタ領域として用いればIGBTを実現できる。第5の実施の形態に係る半導体装置の他の効果については、第1の実施の形態に係る半導体装置の効果と同様である。
第5の実施の形態に係る半導体装置のコンタクト領域12の形成方法としては、まず第1の実施の形態に係る半導体装置の製造方法におけるサポート構造30を形成した後、p型を呈する不純物元素を、凹部の底面に対してイオン注入する。そして注入した不純物元素を局部加熱により活性化する処理を行えば、コンタクト領域12を形成できる。またサポート構造30をなす下面サポート基板30subとしてp型のSiを用いると共に、コンタクト領域11形成のイオン注入及び局部加熱は、図19に示した半導体装置の場合と同様に低温状態で行う。
(半導体装置)
第6の実施の形態に係る半導体装置は、図21に示すように、SiCを主材料とするエピ層1と、このエピ層1の上に設けられたデバイス構造2と、を備える。また第6の実施の形態に係る半導体装置は、エピ層1の下面に、下面の中央部が部分的に露出するように、下面の周縁の領域に選択的に設けられたサポート脚3と、エピ層1の下面及びサポート脚3の下面に亘って設けられた下面電極4と、を備える。
第6の実施の形態に係る半導体装置の絶縁層13の形成方法としては、まず、第4の実施の形態に係る半導体装置の製造方法における、SiCウェハ100及び下面サポート基板30subの接合における表面処理時に酸素(O2)ガスを添加する。これにより接合界面に酸化膜(SiO2)の絶縁膜を形成する。そしてサポート構造30を加工して凹部を形成する際に、サポート構造30と共に絶縁膜も部分的にエッチングして除去して開口部を形成すれば、残留した絶縁膜により絶縁層13を形成できる。
本発明は上記の開示した実施の形態によって説明したが、この開示の一部をなす論述及び図面は、本発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例及び運用技術が明らかになると考えられるべきである。
1a バルク層
2 デバイス構造
3,3a,3b サポート脚
4 下面電極
5 接着層
6 上面サポート基板
7 支持体
8 ダイシングテープ
9 ベース部材
10 エピタキシャル成長層
10a バルク層
11 コンタクト領域
12 コンタクト領域(コレクタ領域)
13 絶縁層
20a〜20d デバイス構造
30sub,30r 下面サポート基板
30 サポート構造
40 下面電極
21 はんだ
22a〜22d 配線
100 SiCウェハ
S,Sp 領域(活性部配置予定領域)
d 距離(付け根からの離間距離)
tl 厚み(サポート構造の厚み)
θ 傾斜角度
Claims (15)
- バルク層の上にエピタキシャル成長層が形成された半導体基板の前記エピタキシャル成長層に複数のチップ領域を定義し、複数のデバイス構造を前記複数のチップ領域のそれぞれに形成する工程と、
前記バルク層の下面側から前記半導体基板を薄くする工程と、
薄くされた前記半導体基板の下面にサポート基板を接合する工程と、
前記複数のデバイス構造のそれぞれの主電流経路の位置に対応する前記半導体基板の下面が露出するように、前記サポート基板を選択的に除去する工程と、
前記半導体基板を前記サポート基板と共に前記チップ領域の間のダイシングラインに沿ってダイシングしてチップ化する工程と、
を含み、
前記サポート基板を選択的に除去する処理は、前記エピタキシャル成長層の下面が露出するように行うことを特徴とする半導体装置の製造方法。 - 前記半導体基板は、ワイドバンドギャップ半導体であることを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記半導体基板は炭化珪素であることを特徴とする請求項2に記載の半導体装置の製造方法。
- 前記サポート基板は、前記半導体基板と異なる半導体であることを特徴とする請求項3に記載の半導体装置の製造方法。
- 前記サポート基板は、単結晶のシリコン基板であることを特徴とする請求項4に記載の半導体装置の製造方法。
- 前記サポート基板を選択的に除去する処理は、異方性エッチングにより行うことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記半導体基板の下面側にオーミックコンタクト層を形成し、前記オーミックコンタクト層をシリサイド化して下面電極を形成する工程と、を更に含むことを特徴とする請求項6に記載の半導体装置の製造方法。
- 前記オーミックコンタクト層を形成する処理は、500℃以上、シリコンの融点以下の温度で行うことを特徴とする請求項7に記載の半導体装置の製造方法。
- 前記オーミックコンタクト層は、ニッケル、チタン、アルミニウム、モリブデン、クロムのうち少なくとも1個を含むことを特徴とする請求項8に記載の半導体装置の製造方法。
- 前記エピタキシャル成長層に前記デバイス構造を形成する処理で用いる材料は、前記接合する処理及び前記サポート基板を選択的に除去する処理におけるそれぞれの最高到達温度のいずれよりも高い融点を有することを特徴とする請求項9に記載の半導体装置の製造方法。
- 前記接合する処理は、前記半導体基板及び前記サポート基板の接合面を活性化して行うことを特徴とする請求項10に記載の半導体装置の製造方法。
- 前記活性化する処理は、プラズマ、ガス又はビームにより行うことを特徴とする請求項11に記載の半導体装置の製造方法。
- 前記接合する処理は、前記半導体基板及び前記サポート基板を直接接合して行うことを特徴とする請求項12に記載の半導体装置の製造方法。
- 前記接合する処理は、前記半導体基板及び前記サポート基板を、前記半導体基板及び前記サポート基板のうち少なくとも一方の接合面に中間層を形成し、前記中間層を介して行うことを特徴とする請求項12に記載の半導体装置の製造方法。
- 前記中間層は、分子層レベルの厚みを有する水分子を含む層であることを特徴とする請求項14に記載の半導体装置の製造方法。
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