JP6217233B2 - 半導体装置の製造方法 - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims description 56
- 239000000758 substrate Substances 0.000 claims description 372
- 238000000034 method Methods 0.000 claims description 60
- 239000012535 impurity Substances 0.000 claims description 15
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 13
- 150000002500 ions Chemical class 0.000 claims description 12
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Description
最初に、本願発明の実施形態の内容を列記して説明する。
[本願発明の実施形態の詳細]
以下、図面に基づいて本発明の実施の形態を説明する。なお以下の図面において同一または相当する部分には同一の参照符号を付し、その説明については繰り返さない。
図1は、本発明の実施形態による半導体装置の製造方法を実施するための製造装置であるイオン注入装置の概略構成図である。
図2は、本発明の実施の形態による半導体装置の製造方法を説明するためのフローチャートである。図1に示したイオン注入装置1を用いて、半導体基板70に不純物イオンを注入する工程を説明する。
ここで、「スタンバイ温度」は、イオン注入工程の目標温度(たとえば440℃)よりも低い温度であって、静電チャック20および半導体基板70の間に静電吸着力を発生させることができる基板温度の範囲内に設定される。具体的には、スタンバイ温度は、半導体基板の反り量h(図3)が、静電チャック20が半導体基板70をチャッキングできる許容値以下となる基板温度の範囲内に設定される。この許容値は、これ以上半導体基板70が反ると、静電チャック20および半導体基板70の間に静電吸着力を発生させることができなくなる半導体基板70の反り量hの限界値に相当する。
さらに、半導体基板70が載せられているが静電吸着電極21,22に電圧が印加されていない状態での静電チャック20全体の静電容量をCOFFとすると、半導体基板70の載置による静電容量の変化率ΔCOFFは下記(2)式となる。また、半導体基板70が載せられ、かつ、静電吸着電極21,22に電圧が印加されている状態での静電チャック20全体の静電容量をCONとすると、静電チャック20への電圧印加による静電容量の変化率ΔCONは下記(3)式となる。
ΔCON=|C0−CON|/C0 ・・・(3)
静電容量の変化率ΔCの一例として、外径が100mmより大きい炭化珪素半導体基板の場合、ΔCOFFは80%となる。また、炭化珪素半導体基板に反りが発生していなければ(理想的には反り量hがほぼ零)、ΔCONはΔCOFFからほとんど変化せず、80%となる。すなわち、半導体基板70が静電チャック20に正常に吸着されている場合、静電チャック20への電圧印加の前後で静電容量Cはほぼ等しい値となる(CON≒COFF)。
本実施の形態では、静電容量の変化率ΔCOFF→ONに閾値を設け、ΔCOFF→ONが当該閾値以下となる基板温度の範囲を、静電チャック20および半導体基板70の間に静電吸着力を発生させることができる基板温度の範囲に設定する。そして、その設定された基板温度の範囲内でスタンバイ温度を設定する。一例として、外径が100mmより大きい炭化珪素半導体基板の場合、閾値は10%に設定される。
図6を参照して、本発明の実施の形態による半導体装置の製造方法の第1の実施の形態を説明する。
図7を参照して、本発明の実施の形態による半導体装置の製造方法の第2の実施の形態を説明する。
以下、図6および図7を参照しながら、上記の実施の形態1,2による半導体装置の製造方法の変形例について説明する。
10 真空チャンバ
20 静電チャック
21,22 静電吸着電極
25 ヒータ
26 温度センサ
30 直流電源
40 温度制御部
50 ソース
60 温度センサ
70 半導体基板
Claims (10)
- 半導体基板を準備する工程と、
静電チャック上に前記半導体基板を載置する工程と、
前記静電チャックを第1の温度に昇温した後、前記半導体基板をチャッキングする工程と、
前記半導体基板をチャッキングした状態で、前記静電チャックを前記第1の温度より高い第2の温度に昇温する工程と、
前記静電チャックを前記第2の温度に昇温した状態で、前記半導体基板に対する処理を実行する工程とを備え、
前記第1の温度は、前記半導体基板の反り量が、前記静電チャックが前記半導体基板をチャッキングできる許容値以下となる基板温度の範囲内に設定される、半導体装置の製造方法。 - 前記第2の温度に昇温する工程は、前記半導体基板が前記第1の温度に昇温した後、前記静電チャックの昇温を開始する、請求項1に記載の半導体装置の製造方法。
- 前記静電チャックは、印加される電圧に応じた静電吸着力を前記半導体基板に対して発生可能な電極を含み、
前記半導体基板をチャッキングする工程では、前記電極へ第1の電圧を印加し、
前記第2の温度に昇温する工程では、前記電極への印加電圧を前記第1の電圧より高い第2の電圧に増加させる、請求項1または請求項2に記載の半導体装置の製造方法。 - 前記半導体基板に対する処理を実行する工程の後において、前記静電チャックを前記第1の温度に降温した後、前記半導体基板のチャッキングを解除する工程をさらに備える、請求項1から請求項3のいずれか1項に記載の半導体装置の製造方法。
- 前記半導体基板に対する処理を実行する工程の後において、前記静電チャックを、前記第2の温度以下で前記第1の温度以上となる第3の温度に降温した後、前記半導体基板のチャッキングを解除する工程をさらに備える、請求項1から請求項3のいずれか1項に記載の半導体装置の製造方法。
- 前記第1の温度は、前記半導体基板をチャッキングする工程の前後における、前記静電チャックの静電容量の変化率が閾値以下となる温度範囲内に設定される、請求項1から請求項5のいずれか1項に記載の半導体装置の製造方法。
- 前記第1の温度は、前記半導体基板をチャッキングする工程の前後における、前記半導体基板の温度の変化量が閾値以上となる温度範囲内に設定される、請求項1から請求項5のいずれか1項に記載の半導体装置の製造方法。
- 前記半導体基板に対する処理を実行する工程は、前記半導体基板に不純物イオンを注入する工程を含み、
前記第2の温度は、100℃以上800℃以下の温度範囲内に設定され、
前記第1の温度は、室温以上700℃以下の温度範囲内に設定される、請求項1から請求項7のいずれか1項に記載の半導体装置の製造方法。 - 前記半導体基板は、100mmより大きい外径を有する化合物半導体基板である、請求項1から請求項8のいずれか1項に記載の半導体装置の製造方法。
- 前記半導体基板は、100mmより大きい外径を有する炭化珪素半導体基板である、請求項9に記載の半導体装置の製造方法。
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JP2013171239A JP6217233B2 (ja) | 2013-08-21 | 2013-08-21 | 半導体装置の製造方法 |
US14/912,509 US9887101B2 (en) | 2013-08-21 | 2014-07-08 | Method for manufacturing semiconductor device |
PCT/JP2014/068134 WO2015025628A1 (ja) | 2013-08-21 | 2014-07-08 | 半導体装置の製造方法 |
DE112014003838.5T DE112014003838T5 (de) | 2013-08-21 | 2014-07-08 | Verfahren zur Herstellung einer Halbleitervorrichtung |
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JP6159172B2 (ja) * | 2013-06-26 | 2017-07-05 | 東京エレクトロン株式会社 | 温度制御方法及びプラズマ処理装置 |
WO2017127405A1 (en) * | 2016-01-19 | 2017-07-27 | Intevac, Inc. | Patterned chuck for substrate processing |
JP6472776B2 (ja) * | 2016-02-01 | 2019-02-20 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
US10732615B2 (en) * | 2017-10-30 | 2020-08-04 | Varian Semiconductor Equipment Associates, Inc. | System and method for minimizing backside workpiece damage |
US10903097B2 (en) * | 2018-03-30 | 2021-01-26 | Axcelis Technologies, Inc. | In-situ wafer temperature measurement and control |
JP7304188B2 (ja) * | 2019-03-29 | 2023-07-06 | 東京エレクトロン株式会社 | 基板処理方法及び基板処理装置 |
CN115029672B (zh) * | 2022-08-11 | 2022-11-04 | 广州粤芯半导体技术有限公司 | 溅射方法及半导体器件的制造方法 |
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JP4159216B2 (ja) * | 1999-11-22 | 2008-10-01 | 株式会社アルバック | 静電吸着装置、真空処理装置、及び静電吸着方法 |
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JP2002009140A (ja) * | 2000-06-22 | 2002-01-11 | Mitsubishi Electric Corp | 静電チャック装置 |
US6921724B2 (en) * | 2002-04-02 | 2005-07-26 | Lam Research Corporation | Variable temperature processes for tunable electrostatic chuck |
US7993698B2 (en) * | 2006-09-23 | 2011-08-09 | Varian Semiconductor Equipment Associates, Inc. | Techniques for temperature controlled ion implantation |
WO2008120467A1 (ja) * | 2007-03-29 | 2008-10-09 | Panasonic Corporation | 半導体装置の製造方法 |
JP2011084770A (ja) * | 2009-10-15 | 2011-04-28 | Canon Anelva Corp | 静電チャックを備えた基板ホルダを用いた基板温度制御方法 |
US20110068084A1 (en) | 2008-07-10 | 2011-03-24 | Canon Anelva Corporation | Substrate holder and substrate temperature control method |
US8164879B2 (en) * | 2009-04-02 | 2012-04-24 | Advanced Ion Beam Technology, Inc. | Step down dechucking |
US8410393B2 (en) * | 2010-05-24 | 2013-04-02 | Lam Research Corporation | Apparatus and method for temperature control of a semiconductor substrate support |
JP2013191802A (ja) * | 2012-03-15 | 2013-09-26 | Fujitsu Semiconductor Ltd | 半導体装置の製造方法 |
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