JP6167104B2 - Method for producing thermoelectric conversion material - Google Patents
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- JP6167104B2 JP6167104B2 JP2014523741A JP2014523741A JP6167104B2 JP 6167104 B2 JP6167104 B2 JP 6167104B2 JP 2014523741 A JP2014523741 A JP 2014523741A JP 2014523741 A JP2014523741 A JP 2014523741A JP 6167104 B2 JP6167104 B2 JP 6167104B2
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Classifications
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C28/00—Alloys based on a metal not provided for in groups C22C5/00 - C22C27/00
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C23/00—Alloys based on magnesium
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- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C38/00—Ferrous alloys, e.g. steel alloys
- C22C38/02—Ferrous alloys, e.g. steel alloys containing silicon
-
- C—CHEMISTRY; METALLURGY
- C22—METALLURGY; FERROUS OR NON-FERROUS ALLOYS; TREATMENT OF ALLOYS OR NON-FERROUS METALS
- C22C—ALLOYS
- C22C38/00—Ferrous alloys, e.g. steel alloys
- C22C38/12—Ferrous alloys, e.g. steel alloys containing tungsten, tantalum, molybdenum, vanadium, or niobium
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
- C23C14/0623—Sulfides, selenides or tellurides
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/24—Vacuum evaporation
- C23C14/32—Vacuum evaporation by explosion; by evaporation and subsequent ionisation of the vapours, e.g. ion-plating
- C23C14/325—Electric arc evaporation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N10/00—Thermoelectric devices comprising a junction of dissimilar materials, i.e. devices exhibiting Seebeck or Peltier effects
- H10N10/80—Constructional details
- H10N10/85—Thermoelectric active materials
- H10N10/851—Thermoelectric active materials comprising inorganic compositions
Description
本発明は、熱と電気との相互エネルギー変換を行う熱電変換材料の製造方法に関し、特に、アークプラズマ蒸着法により蒸着源の熱電半導体材料の組成比が精度良く反映された熱電薄膜を有する、熱電性能指数の高い熱電変換材料の製造方法に関する。 The present invention relates to a method for manufacturing a thermoelectric conversion material that performs mutual energy conversion between heat and electricity, and in particular, a thermoelectric film having a thermoelectric thin film in which the composition ratio of a thermoelectric semiconductor material of a deposition source is accurately reflected by an arc plasma deposition method. The present invention relates to a method for producing a thermoelectric conversion material having a high figure of merit.
近年、システムが単純でしかも小型化が可能な熱電発電技術が、ビル、工場等で使用される化石燃料資源等から発生する未利用の廃熱エネルギーに対する回収発電技術として注目されている。
しかしながら、熱電発電は一般に発電効率が悪いこともあり、さまざまな企業、研究機関で発電効率の向上のための研究開発が活発に行われている。発電効率は、一般に、熱電性能指数Ｚ（Ｚ＝σＳ2／λ）によって評価することができる。ここで、Ｓはゼーベック係数、σは電気伝導率、λは熱伝導率である。このため、発電効率の向上には、高いゼーベック効果を有し、高い電気伝導率かつ低い熱伝導率を有する材料の開発が重要となる。In recent years, thermoelectric power generation technology that has a simple system and can be reduced in size has attracted attention as a recovery power generation technology for unused waste heat energy generated from fossil fuel resources used in buildings, factories, and the like.
However, thermoelectric power generation generally has poor power generation efficiency, and various companies and research institutions are actively researching and developing power generation efficiency. The power generation efficiency can be generally evaluated by a thermoelectric figure of merit Z (Z = σS 2 / λ). Here, S is the Seebeck coefficient, σ is the electrical conductivity, and λ is the thermal conductivity. For this reason, in order to improve the power generation efficiency, it is important to develop a material having a high Seebeck effect, a high electrical conductivity, and a low thermal conductivity.
このような中で、近年、加工性に優れ、製造コストが低減でき、かつ小型化が可能であり、幅広い分野への適用が期待できるという理由から、薄膜状の熱電変換材料の開発が特に注目されている。薄膜状の熱電変換材料としては、例えば、特許文献１及び特許文献２には、樹脂やセラミック等の基板上に、２種以上の元素を含む熱電半導体材料を原材料として、スパッタリング等の物理的蒸着により、ｐ型熱電薄膜とｎ型熱電薄膜を形成したものが開示されている。 Under these circumstances, the development of thin-film thermoelectric conversion materials is particularly focused on in recent years because it is excellent in workability, can reduce manufacturing costs, can be miniaturized, and can be expected to be applied to a wide range of fields. Has been. As a thin-film thermoelectric conversion material, for example, in Patent Document 1 and Patent Document 2, physical vapor deposition such as sputtering using a thermoelectric semiconductor material containing two or more elements as a raw material on a substrate such as resin or ceramic. Discloses a p-type thermoelectric thin film and an n-type thermoelectric thin film formed thereon.
しかしながら、従来の物理的蒸着による成膜方法では、形成する熱電変換材料の厚みをナノオーダーの薄膜にした場合に、スパッタリング等で用いられる原材料の組成比が、成膜後の薄膜の組成比として必ずしも精度良く反映されず、熱電変換効率が低下したり、また、基板と薄膜の界面で剥離しやすいという課題があった。加えて、実用化に向けて、熱電変換効率のさらなる向上（目安として、無次元熱電性能指数ＺＴが１以上；Ｔは絶対温度で通常３００Ｋである。）が求められていた。 However, in the conventional film formation method by physical vapor deposition, when the thickness of the thermoelectric conversion material to be formed is a nano-order thin film, the composition ratio of raw materials used in sputtering or the like is the composition ratio of the thin film after film formation. There is a problem that it is not necessarily reflected with high accuracy, the thermoelectric conversion efficiency is lowered, and the film is easily peeled off at the interface between the substrate and the thin film. In addition, further improvement of the thermoelectric conversion efficiency (as a guide, the dimensionless thermoelectric figure of merit ZT is 1 or more; T is usually 300 K in absolute temperature) has been demanded for practical use.
本発明は、上記のような事情に鑑みてなされたものであり、多孔質基板上に原材料である熱電半導体材料の組成比が精度良く反映された熱電薄膜を形成し、前記多孔質基板と薄膜との密着性に優れ、かつ熱電変換効率に優れる熱電変換材料の製造方法を提供することを課題とする。 The present invention has been made in view of the above circumstances, and forms a thermoelectric thin film in which the composition ratio of a thermoelectric semiconductor material as a raw material is accurately reflected on a porous substrate, and the porous substrate and the thin film are formed. It is an object of the present invention to provide a method for producing a thermoelectric conversion material that is excellent in adhesiveness and thermoelectric conversion efficiency.
本発明者らは、上記課題を解決すべく鋭意検討を重ねた結果、熱電変換材料を構成する基板として、多孔質構造体からなる基板（多孔質基板）を用い、前記基板上に、２種以上の元素を含みかつ所定の組成比を有する熱電半導体材料を蒸着源として、アークプラズマ蒸着法により前記熱電半導体材料の薄膜を成膜することで、前記蒸着源の組成比が精度良く反映された熱電薄膜を基板上に形成し、かつ成膜工程時及び／又は成膜工程後に熱処理を施すことで、熱電変換効率の高い熱電変換材料が得られることを見出し、本発明を完成した。
すなわち、本発明は、以下の（１）〜（１０）を提供するものである。
（１）多孔質基板上に、２種以上の元素を含有する熱電半導体材料の薄膜が形成された熱電変換材料の製造方法において、アークプラズマ蒸着法を用いて、前記熱電半導体材料を前記多孔質基板上に成膜する工程、かつ該成膜工程時及び／又は該成膜工程後に熱処理を施す工程を含むことを特徴とする熱電変換材料の製造方法。
（２）前記熱処理が、不活性ガスの大気圧雰囲気下又は真空条件下で施される上記（１）に記載の熱電変換材料の製造方法。
（３）前記多孔質基板が、ブロックコポリマーの自己組織化により形成されてなる上記（１）又は（２）に記載の熱電変換材料の製造方法。
（４）前記熱電半導体材料が、ビスマス−テルル系熱電半導体材料、シリサイド系熱電半導体材料、及びホイスラー系熱電半導体材料から選ばれるいずれかである、上記（１）〜（３）のいずれかに記載の熱電変換材料の製造方法。
（５）前記ブロックコポリマーが、親水性ユニットと疎水性ユニットとから構成されているブロックコポリマーである上記（３）に記載の熱電変換材料の製造方法。
（６）前記親水性ユニットが、メタクリレート、ブタジエン、ビニールアセテート、アクリレート、アクリルアミド、アクリロニトリル、アクリル酸から選ばれる少なくとも１種含み、且つ前記疎水性ユニットが、スチレン、キシリレン、エチレン、ヘドラルオリゴメリックシルセスキオキサン含有ポリメタクリレートから選ばれる少なくとも１種含む上記（５）に記載の熱電変換材料の製造方法。
（７）前記ビスマス−テルル系熱電半導体材料が、ｐ型ビスマステルライド（ＢｉXＴｅ3Ｓｂ2-X（０＜Ｘ≦０．６））、ｎ型ビスマステルライド（Ｂｉ2Ｔｅ3-YＳｅY（０＜Ｙ≦３））、Ｂｉ2Ｔｅ3から選ばれる少なくとも１種含む上記（４）に記載の熱電変換材料の製造方法。
（８）前記シリサイド系熱電半導体材料が、β―ＦｅＳｉ2、ＣｒＳｉ2、ＭｎＳｉ1.73、Ｍｇ2Ｓｉから選ばれる少なくとも１種含む上記（４）に記載の熱電変換材料の製造方法。
（９）前記ホイスラー系熱電半導体材料が、Ｆｅ2ＶＡｌ、ＦｅＶＡｌＳｉ、ＦｅＶＴｉＡｌから選ばれる少なくとも１種含む上記（４）に記載の熱電変換材料の製造方法。
（１０）前記熱電半導体材料の薄膜を、前記多孔質基板上に１０ｎｍ〜１０μｍの膜厚で成膜する上記（１）〜（９）のいずれかに記載の熱電変換材料の製造方法。As a result of intensive studies to solve the above-mentioned problems, the present inventors have used a substrate (porous substrate) made of a porous structure as a substrate constituting the thermoelectric conversion material, and on the substrate, two types are used. Using the thermoelectric semiconductor material containing the above elements and having a predetermined composition ratio as a deposition source, the composition ratio of the deposition source was accurately reflected by forming a thin film of the thermoelectric semiconductor material by arc plasma deposition. It has been found that a thermoelectric conversion material with high thermoelectric conversion efficiency can be obtained by forming a thermoelectric thin film on a substrate and performing a heat treatment during and / or after the film forming step, thereby completing the present invention.
That is, the present invention provides the following (1) to (10).
(1) In a method for manufacturing a thermoelectric conversion material in which a thin film of a thermoelectric semiconductor material containing two or more elements is formed on a porous substrate, the thermoelectric semiconductor material is converted into the porous material by using an arc plasma deposition method. A method for producing a thermoelectric conversion material comprising a step of forming a film on a substrate and a step of performing a heat treatment during and / or after the film forming step.
(2) The method for producing a thermoelectric conversion material according to (1), wherein the heat treatment is performed under an atmospheric pressure of an inert gas or under vacuum conditions.
(3) The method for producing a thermoelectric conversion material according to (1) or (2), wherein the porous substrate is formed by self-organization of a block copolymer.
(4) The thermoelectric semiconductor material according to any one of (1) to (3), wherein the thermoelectric semiconductor material is any one selected from a bismuth-tellurium-based thermoelectric semiconductor material, a silicide-based thermoelectric semiconductor material, and a Heusler-based thermoelectric semiconductor material. Manufacturing method of thermoelectric conversion material.
(5) The method for producing a thermoelectric conversion material according to (3), wherein the block copolymer is a block copolymer composed of a hydrophilic unit and a hydrophobic unit.
(6) The hydrophilic unit includes at least one selected from methacrylate, butadiene, vinyl acetate, acrylate, acrylamide, acrylonitrile, and acrylic acid, and the hydrophobic unit includes styrene, xylylene, ethylene, and helical oligomeric silyl. The method for producing a thermoelectric conversion material according to (5) above, comprising at least one selected from sesquioxane-containing polymethacrylate.
(7) the bismuth - telluride thermoelectric semiconductor material, p-type bismuth telluride (Bi X Te 3 Sb 2- X (0 <X ≦ 0.6)), n -type bismuth telluride (Bi 2 Te 3-Y Se Y (0 <Y ≦ 3)), the method for producing a thermoelectric conversion material according to (4) above, comprising at least one selected from Bi 2 Te 3 .
(8) The method for producing a thermoelectric conversion material according to (4) above, wherein the silicide-based thermoelectric semiconductor material contains at least one selected from β-FeSi 2 , CrSi 2 , MnSi 1.73 , and Mg 2 Si.
(9) The method for producing a thermoelectric conversion material according to (4), wherein the Heusler-based thermoelectric semiconductor material includes at least one selected from Fe 2 VAl, FeVAlSi, and FeVTiAl.
(10) The method for producing a thermoelectric conversion material according to any one of (1) to (9), wherein the thin film of the thermoelectric semiconductor material is formed on the porous substrate with a film thickness of 10 nm to 10 μm.
本発明によれば、アークプラズマ蒸着法を用いることで、原材料である熱電半導体材料を瞬時にプラズマにして、基板にイオン化した蒸着粒子が付着するため、熱電変換材料を構成する成膜された熱電半導体材料の薄膜（以下、単に「熱電薄膜」ということがある。）の組成と前記原材料の組成がほとんど変化することがなく、また、イオン化した蒸着粒子が高出力で成膜されるため、緻密な膜となり、熱電半導体材料の薄膜と基板との密着性も向上する。さらに、材料の飛散、未蒸発物の残留等も少ないため、熱電半導体材料を効率良く及び精度良く成膜することができ、かつ多孔質基板を用いることで、基板の熱伝導による熱損失が生じることを抑制でき、熱処理による熱電薄膜の結晶成長により熱電特性が向上し、熱電変換効率に優れる薄膜状の熱電変換材料を、簡便に低コストで製造する方法を提供することができる。 According to the present invention, by using the arc plasma deposition method, the thermoelectric semiconductor material that is the raw material is instantaneously turned into plasma, and the ionized deposition particles adhere to the substrate, so that the thermoelectric film that forms the thermoelectric conversion material is formed. The composition of the thin film of semiconductor material (hereinafter sometimes simply referred to as “thermoelectric thin film”) and the composition of the raw material hardly change, and the ionized vapor-deposited particles are formed at a high output. Thus, the adhesion between the thin film of the thermoelectric semiconductor material and the substrate is improved. In addition, since there is little scattering of material, residue of unevaporated material, etc., thermoelectric semiconductor materials can be deposited efficiently and accurately, and heat loss due to heat conduction of the substrate occurs by using a porous substrate. Therefore, it is possible to provide a method for easily and inexpensively manufacturing a thin-film thermoelectric conversion material having improved thermoelectric characteristics and excellent thermoelectric conversion efficiency by crystal growth of the thermoelectric thin film by heat treatment.
［熱電変換材料の製造方法］
本発明の熱電変換材料の製造方法は、多孔質基板上に、２種以上の元素を含有する熱電半導体材料の薄膜が形成された熱電変換材料の製造方法において、アークプラズマ蒸着法を用いて、前記熱電半導体材料を前記多孔質基板上に成膜する工程、かつ該成膜工程時及び／又は該成膜工程後に熱処理を施す工程を含むことを特徴とする。
なお、本発明においては、熱電変換材料は、多孔質基板上に、原材料である熱電半導体材料が成膜されてなるものをいう。[Method for producing thermoelectric conversion material]
The method for producing a thermoelectric conversion material of the present invention is a method for producing a thermoelectric conversion material in which a thin film of a thermoelectric semiconductor material containing two or more elements is formed on a porous substrate, using an arc plasma deposition method, The method includes a step of forming the thermoelectric semiconductor material on the porous substrate and a step of performing a heat treatment during and / or after the film formation step.
In the present invention, the thermoelectric conversion material refers to a material obtained by forming a thermoelectric semiconductor material as a raw material on a porous substrate.
（多孔質基板）
本発明で用いる多孔質基板は、非常に微細な空孔を有し、前記微細な空孔が所定の形状、間隔で互いに独立して配列されている構造（以下、「ナノ構造」ということがある。）を有するものであり、ナノ構造が形成されていることにより、熱電変換材料の熱伝導率を低下させることができる。本発明で用いる多孔質基板の材質は、特に限定されないが、酸化アルミナ、シリカ，ジルコニア等のセラミックス基板、ガラス基板、シリコン基板、樹脂基板等が挙げられる。なかでも、柔軟性があり、熱伝導率が低いという点から樹脂基板であることが好ましい。(Porous substrate)
The porous substrate used in the present invention has very fine pores, and the fine pores are arranged independently of each other at a predetermined shape and interval (hereinafter referred to as “nanostructure”). And the nanostructure is formed, the thermal conductivity of the thermoelectric conversion material can be reduced. The material of the porous substrate used in the present invention is not particularly limited, and examples thereof include ceramic substrates such as alumina oxide, silica, and zirconia, glass substrates, silicon substrates, and resin substrates. Among these, a resin substrate is preferable from the viewpoint of flexibility and low thermal conductivity.
前記樹脂基板としては、特に限定されず、例えば、熱硬化性樹脂；エネルギー線硬化型樹脂；ポリイミド、ポリアミド、ポリアミドイミド、ポリフェニレンエーテル、ポリエーテルケトン、ポリエーテルエーテルケトン、ポリエチレンテレフタレート、ポリエチレン等のポリオレフィン、ポリスチレン、ポリエステル、ポリカーボネート、ポリスルフォン、ポリエーテルスルフォン、ポリフェニレンスルフィド、ポリアリレート、アクリル系樹脂、シクロオレフィン系ポリマー、芳香族系重合体等の熱可塑性樹脂、さらに、親水性ユニットと疎水性ユニットから構成されているブロックコポリマー等が挙げられる。 The resin substrate is not particularly limited. For example, a thermosetting resin; an energy ray curable resin; a polyolefin such as polyimide, polyamide, polyamideimide, polyphenylene ether, polyetherketone, polyetheretherketone, polyethylene terephthalate, and polyethylene. , Polystyrene, polyester, polycarbonate, polysulfone, polyethersulfone, polyphenylene sulfide, polyarylate, acrylic resins, cycloolefin polymers, aromatic polymers, and other thermoplastic resins, and hydrophilic units and hydrophobic units The block copolymer etc. which are comprised are mentioned.
前記ブロックコポリマーの親水性ユニットとしては、メタクリレート、ブタジエン、ビニールアセテート、アクリレート、アクリルアミド、アクリロニトリル、アクリル酸等が挙げられ、疎水性ユニットとしては、スチレン、キシリレン、エチレン、ヘドラルオリゴメリックシルセスキオキサン含有ポリメタクリレート等が挙げられる。 Examples of the hydrophilic unit of the block copolymer include methacrylate, butadiene, vinyl acetate, acrylate, acrylamide, acrylonitrile, and acrylic acid. Examples of the hydrophobic unit include styrene, xylylene, ethylene, and helical oligomeric silsesquioxane. Examples thereof include polymethacrylate containing.
前記多孔質基板は、公知の方法により作製すればよい。例えば、空孔を有さない基板をエッチング等により多孔質を形成する方法、また、アルミニウム基板等の陽極酸化により多孔質を形成する方法、さらに、インプリント法により多孔質を形成する方法等が挙げられる。特に、多孔質基板として樹脂基板を用いる場合は、前記ブロックコポリマーの自己組織化を利用した方法により多孔質を形成する方法が挙げられる。 What is necessary is just to produce the said porous substrate by a well-known method. For example, there are a method for forming a porous layer by etching or the like on a substrate having no pores, a method for forming a porous layer by anodizing such as an aluminum substrate, and a method for forming a porous layer by imprinting. Can be mentioned. In particular, when a resin substrate is used as the porous substrate, a method of forming a porous layer by a method utilizing self-organization of the block copolymer can be mentioned.
上記の多孔質基板の中で、ブロックコポリマーの自己組織化を利用した多孔質基板の形成方法を説明する。ブロックコポリマー多孔質基板は、ブロックコポリマー層を形成する工程、該ブロックコポリマー層を溶媒雰囲気下でアニーリングしミクロ相分離させる相分離工程、及びミクロ相分離したブロックコポリマー層の親水性ユニット相の一部又はすべてを除去してナノ構造を形成するエッチング工程を経ることにより形成することができる。ブロックコポリマー層形成工程では、親水性ユニットと疎水性ユニットとの組み合わせ及び各ユニットの分子量を、相分離工程では、溶媒及びアニーリング条件を、エッチング工程ではエッチング方法及びエッチング条件を適宜選択又は調整することにより、所望のナノ構造を有する多孔質基板を形成することができる。 Among the above porous substrates, a method for forming a porous substrate using self-organization of a block copolymer will be described. The block copolymer porous substrate comprises a step of forming a block copolymer layer, a phase separation step in which the block copolymer layer is annealed in a solvent atmosphere to perform microphase separation, and a part of the hydrophilic unit phase of the block copolymer layer subjected to microphase separation. Or it can form by passing through the etching process which removes all and forms nanostructure. In the block copolymer layer forming step, the combination of hydrophilic units and hydrophobic units and the molecular weight of each unit, the solvent and annealing conditions in the phase separation step, and the etching method and etching conditions in the etching step are appropriately selected or adjusted. Thus, a porous substrate having a desired nanostructure can be formed.
図１は、本発明で用いた多孔質基板の一例を示す断面図である。
図１において、１は支持体、２は多孔質基板、３はナノ構造である。なお、多孔質基板２がブロックコポリマーの自己組織化を利用して形成される場合は、図１において、４は疎水性ユニット相、５は親水性ユニット相である。多孔質基板２が自立性を有していない場合は、図１に示すように、支持体１に積層されていてもよい。なお、多孔質基板２が自立性を有していれば、支持体１は無くてもよい。本発明で用いる支持体１としては、電気伝導率や熱伝導率に悪影響を及ぼさないものであれば、特に制限されず、例えば、ガラス、シリコン、プラスチック基板等が挙げられる。FIG. 1 is a cross-sectional view showing an example of a porous substrate used in the present invention.
In FIG. 1, 1 is a support, 2 is a porous substrate, and 3 is a nanostructure. In the case where the porous substrate 2 is formed by utilizing the self-organization of the block copolymer, in FIG. 1, 4 is a hydrophobic unit phase and 5 is a hydrophilic unit phase. When the porous substrate 2 does not have self-supporting properties, it may be laminated on the support 1 as shown in FIG. In addition, if the porous substrate 2 has a self-supporting property, the support 1 may be omitted. The support 1 used in the present invention is not particularly limited as long as it does not adversely affect the electrical conductivity and thermal conductivity, and examples thereof include glass, silicon, and a plastic substrate.
多孔質基板２のナノ構造３の孔の平均孔径は、好ましくは５〜１０００ｎｍ、より好ましくは１０〜３００ｎｍ、さらに好ましくは、３０〜１５０ｎｍである。平均孔径が５ｎｍ以上であると、例えば、後述する熱電半導体材料を前記多孔質基板上に成膜した後も、熱電半導体材料が孔を塞ぐことがなく、平均孔径が１０００ｎｍ以下であると、熱電変換材料の機械的強度が確保でき、さらに熱伝導率が十分に低下するため好ましい。なお、孔の平均孔径は、測定倍率３万倍でのＳＥＭ写真から、視野内に存在する独立した孔の個々の孔径の最大径、最小径を読み取り、独立した孔の個々の孔径の中心値を求め、次いで、測定した全数にわたり単純平均することにより算出することができる。 The average pore diameter of the pores of the nanostructure 3 of the porous substrate 2 is preferably 5 to 1000 nm, more preferably 10 to 300 nm, and still more preferably 30 to 150 nm. When the average pore diameter is 5 nm or more, for example, after the thermoelectric semiconductor material described later is deposited on the porous substrate, the thermoelectric semiconductor material does not block the pores, and the average pore diameter is 1000 nm or less. It is preferable because the mechanical strength of the conversion material can be secured and the thermal conductivity is sufficiently lowered. The average hole diameter is determined by reading the maximum and minimum diameters of the individual holes present in the field of view from the SEM photograph at a measurement magnification of 30,000 times. And then simple averaging over the total number measured.
孔の深さは、好ましくは５〜１０００ｎｍ、より好ましくは１０〜３００ｎｍである。
また、孔の配列する平均間隔（隣接する孔と孔との中心間距離の平均値）は、好ましくは１０〜１５００ｎｍであり、より好ましくは１０〜３００ｎｍであり、さらに好ましくは１０〜１５０ｎｍである。平均間隔が１０ｎｍ以上であると、電子の平均自由行程より長くなり、電子の散乱因子となりにくくなるため、電気伝導率が維持され好ましい。平均間隔が１５００ｎｍ以下であると、フォノンの平均自由行程より短くなり、フォノンの散乱因子となりやすくなるため、熱伝導率が低減され好ましい。
ナノ構造３の孔の形状は、特に限定されず、例えば、円柱状、角柱状等の柱状；逆円錐、逆角錐等の逆錐状；逆角錐台、逆円錐台等の逆錐台状；溝状等が挙げられ、これらの組み合わせであってもよい。
多孔質基板２におけるナノ構造３の占有割合（多孔質基板２上のナノ構造３の孔の開口部面積の総和と孔の開口部以外の面積との和に対するナノ構造３の孔の開口部面積の総和）は、一般的には、５〜９０％であり、１０〜５０％となることが好ましい。ナノ構造３の占有割合が上記範囲であれば、熱伝導率の十分な低減が期待されるため好ましい。
また、多孔質基板２の厚みは、好ましくは０．１〜５００μｍ、より好ましくは０．１〜１００μｍである。厚みが上記範囲であれば、基板の熱伝導率が低く、熱損失を抑制でき、また、扱い易いため好ましい。The depth of the hole is preferably 5 to 1000 nm, more preferably 10 to 300 nm.
Moreover, the average interval (an average value of the distance between the centers of adjacent holes) is preferably 10 to 1500 nm, more preferably 10 to 300 nm, and still more preferably 10 to 150 nm. . When the average interval is 10 nm or more, it becomes longer than the mean free path of electrons, and it becomes difficult to become an electron scattering factor. When the average interval is 1500 nm or less, it becomes shorter than the mean free path of phonons and becomes a phonon scattering factor, which is preferable because the thermal conductivity is reduced.
The shape of the hole of the nanostructure 3 is not particularly limited, and is, for example, a columnar shape such as a columnar shape or a prismatic shape; an inverted conical shape such as an inverted cone or an inverted pyramid; an inverted frustum shape such as an inverted pyramid or an inverted truncated cone; Groove shape etc. are mentioned and these combinations may be sufficient.
Occupation ratio of the nanostructure 3 in the porous substrate 2 (the opening area of the holes of the nanostructure 3 relative to the sum of the area of the openings of the holes of the nanostructure 3 on the porous substrate 2 and the area other than the openings of the holes) Is generally 5 to 90%, preferably 10 to 50%. If the occupation ratio of the nanostructure 3 is within the above range, it is preferable because a sufficient reduction in thermal conductivity is expected.
The thickness of the porous substrate 2 is preferably 0.1 to 500 μm, more preferably 0.1 to 100 μm. A thickness within the above range is preferable because the thermal conductivity of the substrate is low, heat loss can be suppressed, and handling is easy.
（熱電半導体材料）
本発明で用いる熱電半導体材料は、熱電性能を有する２種以上の元素を含有するものである。このような熱電半導体材料としては、具体的には、ｐ型ビスマステルライド（ＢｉXＴｅ3Ｓｂ2-X（０＜Ｘ≦０．６））、ｎ型ビスマステルライド（Ｂｉ2Ｔｅ3-YＳｅY（０＜Ｙ≦３））、Ｂｉ2Ｔｅ3等のビスマス−テルル系熱電半導体材料；ＧｅＴｅ、ＰｂＴｅ等のテルライド系熱電半導体材料；アンチモン−テルル系熱電半導体材料；ＺｎＳｂ、Ｚｎ3Ｓｂ2、Ｚｎ4Ｓｂ3等の亜鉛−アンチモン系熱電半導体材料；ＳｉＧｅ等のシリコン−ゲルマニウム系熱電半導体材料；Ｂｉ2Ｓｅ3等のビスマスセレナイド系熱電半導体材料；β―ＦｅＳｉ2、ＣｒＳｉ2、ＭｎＳｉ1.73、Ｍｇ2Ｓｉ等のシリサイド系熱電半導体材料；酸化物系熱電半導体材料；Ｆｅ2ＶＡｌ、ＦｅＶＡｌＳｉ、ＦｅＶＴｉＡｌ等のホイスラー材料等が用いられる。(Thermoelectric semiconductor material)
The thermoelectric semiconductor material used in the present invention contains two or more elements having thermoelectric performance. Such thermoelectric semiconductor material, specifically, p-type bismuth telluride (Bi X Te 3 Sb 2- X (0 <X ≦ 0.6)), n -type bismuth telluride (Bi 2 Te 3-Y Se Y (0 <Y ≦ 3)), Bi 2 Te 3 and other bismuth-tellurium-based thermoelectric semiconductor materials; GeTe, PbTe and other telluride-based thermoelectric semiconductor materials; Antimony-tellurium-based thermoelectric semiconductor materials; ZnSb, Zn 3 Sb 2 , Zinc-antimony thermoelectric semiconductor materials such as Zn 4 Sb 3 ; Silicon-germanium thermoelectric semiconductor materials such as SiGe; Bismuth selenide thermoelectric semiconductor materials such as Bi 2 Se 3 ; β-FeSi 2 , CrSi 2 , MnSi 1.73 , silicide-based thermoelectric semiconductor materials, such as mg 2 Si; oxide based thermoelectric semiconductor material; Fe 2 VAl, FeVAlSi, Heusler materials such as FeVTiAl are used .
次に、本発明の熱電変換材料の製造方法を図を用いて説明する。
図２は、本発明の製造方法に従い製造した熱電変換材料の一例を示し、図１の多孔質基板にアークプラズマ蒸着法により成膜した薄膜（以下、熱電薄膜）を有する熱電変換材料の断面図である。
図２において、６は多孔質基板２のナノ構造３の上部に形成された熱電薄膜、７は多孔質基板２のナノ構造３の内底部に形成された熱電薄膜である。Next, the manufacturing method of the thermoelectric conversion material of this invention is demonstrated using figures.
FIG. 2 shows an example of a thermoelectric conversion material manufactured according to the manufacturing method of the present invention, and is a cross-sectional view of a thermoelectric conversion material having a thin film (hereinafter referred to as a thermoelectric thin film) formed on the porous substrate of FIG. 1 by an arc plasma deposition method. It is.
In FIG. 2, 6 is a thermoelectric thin film formed on the top of the nanostructure 3 of the porous substrate 2, and 7 is a thermoelectric thin film formed on the inner bottom of the nanostructure 3 of the porous substrate 2.
（１）熱電半導体材料成膜工程
成膜工程は、前述した多孔質基板上に、２種以上の元素を含有する熱電半導体材料をアークプラズマ蒸着法により成膜して熱電半導体材料の薄膜を形成する工程である。(1) Thermoelectric semiconductor material film forming process The film forming process forms a thin film of thermoelectric semiconductor material by depositing a thermoelectric semiconductor material containing two or more elements on the porous substrate described above by arc plasma deposition. It is a process to do.
アークプラズマ蒸着法とは、詳細は後述するが、パルスのアーク放電により、蒸着源となる原材料を、瞬時にプラズマにしてイオン化された蒸着粒子を基板上に付着させる成膜方法である。
前記アークプラズマ蒸着法を用いることにより、熱電半導体材料を瞬時にプラズマにして、多孔質基板にイオン化した蒸着粒子が付着し、しかも、原材料の飛散や、未蒸発物の残留等も少ないため、従来より用いられているフラッシュ蒸着法と比べ、成膜された膜の組成の精度が良く、原材料の組成からほとんど変化することがない均一な薄膜が形成され、ゼーベック係数や電気伝導率の低下を抑制することができる。
また、前記アークプラズマ蒸着法は、プラズマを発生させるためにアルゴンガス等を使用する必要もなく、さらに、基板の温度上昇も殆どないため、樹脂基板やフィルムへの成膜方法として好適である。
さらに、アークプラズマ蒸着法においては、所定の範囲内では、蒸着時の材料の直進性が保たれるため、特に、多孔質基板へ成膜する場合、他の蒸着方法に比べてナノ構造内の壁面に材料が蒸着されにくく、熱電性能が低下しにくい。The arc plasma vapor deposition method, which will be described in detail later, is a film formation method in which ionized vapor deposition particles are deposited on a substrate by using a pulsed arc discharge as a raw material, which is a vapor deposition source, instantaneously converted into plasma.
By using the arc plasma deposition method, the thermoelectric semiconductor material is instantaneously converted into plasma, and the ionized deposition particles adhere to the porous substrate, and the raw material scatters and the residual non-evaporated material is small. Compared with the more commonly used flash vapor deposition method, the composition of the deposited film is more accurate, and a uniform thin film that hardly changes from the composition of the raw material is formed, suppressing the decrease in Seebeck coefficient and electrical conductivity. can do.
The arc plasma deposition method is suitable as a method for forming a film on a resin substrate or film because it does not require the use of argon gas or the like to generate plasma and the temperature of the substrate hardly increases.
Furthermore, in the arc plasma vapor deposition method, the straightness of the material during vapor deposition is maintained within a predetermined range. Therefore, in particular, when a film is formed on a porous substrate, the inner structure of the nanostructure is smaller than other vapor deposition methods. The material is difficult to deposit on the wall surface, and the thermoelectric performance is unlikely to deteriorate.
アークプラズマ蒸着装置について具体的に説明する。
図３は、本発明の実施例で用いた同軸型真空アークプラズマ蒸着装置の一例であり、（ａ）は蒸着装置の概略図であり、（ｂ）はアークプラズマ蒸着源の動作を説明するための概念図である。
図３（ａ）、（ｂ）において、１１は多孔質基板、１２は真空排気口、１３はカソード電極（蒸着源；ターゲット）、１４はトリガ電極、１５は電源ユニット、１６はアノード電極、１７はトリガ電源、１８はアーク電源、１９はコンデンサー、２０は絶縁碍子、２１はアークプラズマである。
前記アークプラズマ蒸着装置内における同軸型真空アークプラズマ蒸着源は、図３（ｂ）に示すように、円筒状のトリガ電極１４と、先端部が熱電半導体材料の原材料で構成された蒸着源である円柱状のカソード電極１３とが、円板状の絶縁碍子２０を挟んで隣接して配置されてなり、前記カソード電極１３とトリガ電極１４との周りに同軸状に円筒状のアノード電極１６が配置されている。
なお、前記カソード電極１３は、上述した熱電半導体材料をホットプレス法等の公知の方法により、円柱状に成形したものを用いる。
実際の蒸着は、前記同軸型真空アークプラズマ蒸着源を備えている同軸型真空アークプラズマ蒸着装置を用い、前記トリガ電極１４とアノード電極１６との間にアーク放電をパルス的に発生させて、熱電半導体材料を瞬時にプラズマにして、前記カソード電極１３とアノード電極１６との間にアークプラズマ２１を断続的に誘起させ、アークプラズマ２１の真上に配置した多孔質基板１１上に、イオン化した蒸着粒子を付着させることにより、成膜が行われる。なお、多孔質基板１１は、常温であっても加熱されていてもよい。The arc plasma deposition apparatus will be specifically described.
FIG. 3 is an example of a coaxial vacuum arc plasma deposition apparatus used in the embodiment of the present invention, (a) is a schematic view of the deposition apparatus, and (b) is for explaining the operation of the arc plasma deposition source. FIG.
3 (a) and 3 (b), 11 is a porous substrate, 12 is a vacuum exhaust port, 13 is a cathode electrode (evaporation source; target), 14 is a trigger electrode, 15 is a power supply unit, 16 is an anode electrode, 17 Is a trigger power source, 18 is an arc power source, 19 is a capacitor, 20 is an insulator, and 21 is an arc plasma.
As shown in FIG. 3B, the coaxial vacuum arc plasma deposition source in the arc plasma deposition apparatus is a deposition source in which a cylindrical trigger electrode 14 and a tip portion are made of a raw material of a thermoelectric semiconductor material. A cylindrical cathode electrode 13 is arranged adjacent to each other with a disc-shaped insulator 20 interposed therebetween, and a cylindrical anode electrode 16 is coaxially arranged around the cathode electrode 13 and the trigger electrode 14. Has been.
The cathode electrode 13 is formed by forming the above-described thermoelectric semiconductor material into a cylindrical shape by a known method such as a hot press method.
The actual vapor deposition uses a coaxial vacuum arc plasma vapor deposition apparatus equipped with the coaxial vacuum arc plasma vapor deposition source, and generates an arc discharge between the trigger electrode 14 and the anode electrode 16 in a pulsed manner to produce thermoelectric power. The semiconductor material is instantly turned into plasma, and the arc plasma 21 is intermittently induced between the cathode electrode 13 and the anode electrode 16, and ionized deposition is performed on the porous substrate 11 disposed immediately above the arc plasma 21. Film formation is performed by attaching particles. The porous substrate 11 may be at room temperature or heated.
本発明において、アークプラズマ２１を発生させるアーク電圧、放電用のコンデンサー１９の容量、及びアークプラズマ２１の発生回数を制御することにより、粒子径が揃った蒸着粒子を得ることができ、これにより、多孔質基板と熱電薄膜の密着性が良好な膜を得ることが出来る。
アークプラズマ２１を発生させるアーク電圧は、通常５０〜４００Ｖ、好ましくは７０〜１００Ｖであり、放電用のコンデンサー１９の容量は、通常３６０〜８８００μＦ、好ましくは３６０〜１０８０μＦである。また、アークプラズマ２１の発生回数は、通常５０〜５００００回である。
さらに、多孔質基板１１とアークプラズマ２１からの距離を適宜調整することで、蒸着範囲を制御することができる。例えば、後述する実施例においては、カソード電極（蒸着源；ターゲット）と多孔質基板との距離は１５０ｍｍとした。チャンバ内の真空度は、１０-2Ｐａ以下が好ましい。チャンバ内の多孔質基板１１の温度は、成膜工程後に熱処理を施すのであれば、常温であってもよく、成膜工程時に熱処理を施す場合は、多孔質基板１１を通常５０〜１０００℃、好ましくは５０〜６００℃、より好ましくは１００〜２５０℃で加熱して、蒸着を行えばよい。成膜工程時に後述する熱処理を施すことより、多孔質基板１１に熱電半導体材料を蒸着すると同時に、熱電半導体材料からなる薄膜を結晶成長させ安定化させることができるため、後述の熱処理を省略して製造時間を短縮することができる。温度が低すぎると熱処理効果が十分に得られず、温度が高すぎると構成元素の揮散により組成が変動したり、多孔質基板がプラスチック基板である場合には、熱変形するなどの問題が生じるため好ましくない。In the present invention, by controlling the arc voltage for generating the arc plasma 21, the capacity of the discharge capacitor 19, and the number of times the arc plasma 21 is generated, vapor-deposited particles having a uniform particle diameter can be obtained. A film having good adhesion between the porous substrate and the thermoelectric thin film can be obtained.
The arc voltage for generating the arc plasma 21 is usually 50 to 400 V, preferably 70 to 100 V, and the capacity of the discharging capacitor 19 is usually 360 to 8800 μF, preferably 360 to 1080 μF. Moreover, the frequency | count of generation | occurrence | production of the arc plasma 21 is 50-500000 normally.
Furthermore, the deposition range can be controlled by appropriately adjusting the distance between the porous substrate 11 and the arc plasma 21. For example, in the examples described later, the distance between the cathode electrode (deposition source; target) and the porous substrate was 150 mm. The degree of vacuum in the chamber is preferably 10 −2 Pa or less. The temperature of the porous substrate 11 in the chamber may be room temperature as long as the heat treatment is performed after the film formation step. When the heat treatment is performed during the film formation step, the porous substrate 11 is usually 50 to 1000 ° C., Deposition may be performed by heating at 50 to 600 ° C., more preferably 100 to 250 ° C. By performing the heat treatment described later during the film forming step, the thermoelectric semiconductor material can be deposited on the porous substrate 11 and at the same time, a thin film made of the thermoelectric semiconductor material can be grown and stabilized. Manufacturing time can be shortened. If the temperature is too low, a sufficient heat treatment effect cannot be obtained, and if the temperature is too high, the composition may change due to volatilization of the constituent elements, and if the porous substrate is a plastic substrate, problems such as thermal deformation may occur. Therefore, it is not preferable.
上記した方法によって形成される熱電半導体材料の膜厚は、多孔質基板１１の孔を熱電半導体材料で埋めてしまうことがないように、通常１０ｎｍ〜１０μｍであり、より好ましくは１０ｎｍ〜１μｍ、さらに好ましくは５０〜５００ｎｍである。膜厚が上記範囲であれば、熱電性能及び屈曲性に優れる薄膜が得られる。 The film thickness of the thermoelectric semiconductor material formed by the above-described method is usually 10 nm to 10 μm, more preferably 10 nm to 1 μm, more preferably so as not to fill the holes of the porous substrate 11 with the thermoelectric semiconductor material. Preferably it is 50-500 nm. When the film thickness is in the above range, a thin film having excellent thermoelectric performance and flexibility can be obtained.
（２）熱電変換材料の熱処理工程
熱処理工程は、（１）における成膜工程時及び／又は成膜工程後、熱電変換材料を構成する熱電薄膜に熱処理を施すことにより該熱電薄膜を結晶成長させる工程である。熱電薄膜を結晶成長させ安定化させることで、熱電特性の高い熱電半導体材料の薄膜を得ることができる。(2) Heat treatment step of thermoelectric conversion material The heat treatment step is a step of crystal-growing the thermoelectric thin film by performing heat treatment on the thermoelectric thin film constituting the thermoelectric conversion material during and / or after the film formation step in (1). It is a process. By growing and stabilizing the thermoelectric thin film, a thin film of thermoelectric semiconductor material having high thermoelectric characteristics can be obtained.
成膜工程時に熱処理を施す場合は、上述したように、多孔質基板１１を加熱して蒸着を行えばよく、成膜工程後に熱処理を施す場合、熱処理方法は、特に限定されず、公知の手法を用いることができる。また、成膜工程時および成膜工程後の両方で熱処理を施してもよいが、熱電薄膜の結晶成長を容易にできるという点から、成膜工程後に熱処理を施すことが好ましい。さらに、熱電半導体材料の組成の変動を限りなく少なく成膜し、熱電特性の高い熱電変換材料が得られるという点から、成膜工程後にのみ熱処理を施すことがより好ましい。
例えば、真空排気、ガス導入等可能な熱処理装置はもとより、半導体プロセスで使用される熱ストレスを抑えながら対象物を急速に昇降温でき、短時間の高温処理に適したランプ・アニール装置等を使用してもよい。
図４は、本発明の実施例及び比較例で用いた熱処理装置の一例を示す概略図である。図４において、３１は熱電変換材料、３２はヒーター、３３は熱電対、３４は真空排気口、３５は導入ガス排気口、３６は水素ガス導入口、３７はアルゴンガス導入口である。
前記熱処理は、用いる材料及び処理装置の種類によって、温度、時間等の処理条件が異なるが、通常、本発明で用いた熱処理装置では、組成変化が生じない温度範囲内、すなわち、通常、５０〜１０００℃で１〜２時間程度行うことが好ましい。好ましくは５０〜６００℃、より好ましくは１００〜２５０℃である。温度が低すぎると熱処理効果が十分に得られず、温度が高すぎると熱電半導体材料の結晶状態が崩れたり、構成元素の揮散により組成が変動するなど問題が生じるため好ましくない。熱処理は、不活性ガスの大気圧雰囲気下又は真空条件下で行うことが好ましい。不活性ガス雰囲気下であれば、熱電半導体材料の酸化による組成の変動がなく、高性能な薄膜の作製が容易となる。When the heat treatment is performed during the film forming process, the porous substrate 11 may be vapor-deposited by heating as described above. When the heat treatment is performed after the film forming process, the heat treatment method is not particularly limited, and a publicly known method is used. Can be used. Further, although heat treatment may be performed both during and after the film formation step, it is preferable to perform the heat treatment after the film formation step because crystal growth of the thermoelectric thin film can be facilitated. Furthermore, it is more preferable to perform the heat treatment only after the film-forming process from the viewpoint that a thermoelectric conversion material having high thermoelectric characteristics can be obtained by forming a film with as little variation in the composition of the thermoelectric semiconductor material.
For example, in addition to heat treatment equipment that can evacuate, introduce gas, etc., use a lamp / annealing device that can quickly raise and lower the temperature while suppressing thermal stress used in semiconductor processes and is suitable for short-time high-temperature treatment. May be.
FIG. 4 is a schematic view showing an example of a heat treatment apparatus used in Examples and Comparative Examples of the present invention. In FIG. 4, 31 is a thermoelectric conversion material, 32 is a heater, 33 is a thermocouple, 34 is a vacuum exhaust port, 35 is an introduction gas exhaust port, 36 is a hydrogen gas introduction port, and 37 is an argon gas introduction port.
The heat treatment has different processing conditions such as temperature and time depending on the material used and the type of processing apparatus. Usually, in the heat processing apparatus used in the present invention, the temperature does not change in composition, that is, usually 50 to 50. It is preferable to carry out at 1000 degreeC about 1-2 hours. Preferably it is 50-600 degreeC, More preferably, it is 100-250 degreeC. If the temperature is too low, a sufficient heat treatment effect cannot be obtained, and if the temperature is too high, the crystal state of the thermoelectric semiconductor material may be lost, or the composition may change due to volatilization of the constituent elements. The heat treatment is preferably performed under an atmospheric pressure atmosphere of an inert gas or under vacuum conditions. Under an inert gas atmosphere, the composition of the thermoelectric semiconductor material does not vary due to oxidation, and a high-performance thin film can be easily produced.
本発明の製造方法によれば、多孔質構造体からなる基板に精度良く所望の組成を有する熱電薄膜を成膜することができる。 According to the production method of the present invention, a thermoelectric thin film having a desired composition can be accurately formed on a substrate composed of a porous structure.
次に、本発明を実施例によりさらに詳細に説明するが、本発明は、これらの例によってなんら限定されるものではない。 EXAMPLES Next, although an Example demonstrates this invention further in detail, this invention is not limited at all by these examples.
実施例、比較例で作製した熱電変換材料の熱伝導率、電気伝導率及びゼーベック係数等に関する測定は以下の方法で実施した。
（ａ）熱伝導率
実施例、比較例で作製した熱電変換材料の熱伝導率の測定には３ω法を用いた。
（ｂ）電気伝導率
表面抵抗測定装置（三菱化学社製、商品名：ロレスタＧＰ ＭＣＰ−Ｔ６００）により、四端子法で試料の表面抵抗値を測定し、電気伝導率を算出した。
（ｃ）ゼーベック係数
作製した試料の一端を加熱して、試料の両端に生じる温度差をクロメル−アルメル熱電対を使用し測定し、熱電対設置位置に隣接した電極から熱起電力を測定した。具体的には、温度差と起電力を測定する試料の両端間距離を２５ｍｍとし、一端を２０℃に保ち、他端を２５℃から５０℃まで１℃刻みで加熱し、その際の熱起電力を測定して、傾きからゼーベック係数を算出した。熱電対及び電極の設置位置は、薄膜の中心線に対し、互いに対称の位置にあり、熱電対と電極の距離は１ｍｍである。
なお、熱電性能指数Ｚは、上記で得られた、ゼーベック係数Ｓ、電気伝導率σ及び熱伝導率λの値を用いて、既述した関係式（Ｚ＝σＳ2／λ）により算出した。
また、無次元熱電性能指数は、上記で算出した熱電性能指数Ｚと絶対温度Ｔとの積で定義され、本発明においては、常温（Ｔ：３００Ｋ）での値として算出した。
（ｄ）薄膜元素分析
作製した熱電薄膜の組成は、エネルギー分散型Ｘ線分析装置ＥＤＳ（エリオニクス社製、ＥＭＲ−８８００）により分析を行い求めた。
（ｅ）密着性試験（クロスカット法）
作製した熱電薄膜の密着性はＪＩＳ Ｋ５６００クロスカット法により行い、評価は、剥がれたマス数に応じて、すなわち、剥がれが全く見られない場合を◎、剥がれた数が１％以上５％未満である場合を○、剥がれた数が５％以上５０％未満である場合を△、剥がれた数が５０％以上の場合を×として、行った。Measurements relating to thermal conductivity, electrical conductivity, Seebeck coefficient, and the like of the thermoelectric conversion materials prepared in Examples and Comparative Examples were performed by the following methods.
(A) Thermal conductivity The 3omega method was used for the measurement of the thermal conductivity of the thermoelectric conversion material produced by the Example and the comparative example.
(B) Electric conductivity The surface resistance value of the sample was measured by a four-terminal method using a surface resistance measuring device (trade name: Loresta GP MCP-T600, manufactured by Mitsubishi Chemical Corporation), and the electric conductivity was calculated.
(C) Seebeck coefficient One end of the prepared sample was heated, a temperature difference generated between both ends of the sample was measured using a chromel-alumel thermocouple, and a thermoelectromotive force was measured from an electrode adjacent to the thermocouple installation position. Specifically, the distance between both ends of the sample for measuring the temperature difference and the electromotive force is 25 mm, one end is kept at 20 ° C., and the other end is heated from 25 ° C. to 50 ° C. in 1 ° C. increments. The power was measured and the Seebeck coefficient was calculated from the slope. The positions of the thermocouple and the electrode are symmetrical with respect to the center line of the thin film, and the distance between the thermocouple and the electrode is 1 mm.
The thermoelectric figure of merit Z was calculated according to the relational expression (Z = σS 2 / λ) described above using the values of Seebeck coefficient S, electrical conductivity σ, and thermal conductivity λ obtained above.
The dimensionless thermoelectric figure of merit is defined as the product of the thermoelectric figure of merit Z calculated above and the absolute temperature T. In the present invention, the dimensionless thermoelectric figure of merit was calculated as a value at room temperature (T: 300K).
(D) Thin Film Elemental Analysis The composition of the produced thermoelectric thin film was determined by analyzing with an energy dispersive X-ray analyzer EDS (manufactured by Elionix, EMR-8800).
(E) Adhesion test (cross-cut method)
The adhesion of the produced thermoelectric thin film is determined by the JIS K5600 cross-cut method, and the evaluation is according to the number of peeled masses, that is, when no peeling is observed at all, the number of peeling is 1% or more and less than 5%. In some cases, ◯ was given, Δ was given when the number of peeled pieces was 5% or more and less than 50%, and x was given when the number of peeled pieces was 50% or more.
（実施例１）
（多孔質基板の作製）
ポリマーとして、親水性ユニット（メチルメタクリレート）と疎水性ユニット（ヘドラルオリゴメリックシルセスキオキサン含有ポリメタクリレート）から構成されているブロックコポリマー（ｐｏｌｙｍｅｒ ｓｏｕｒｃｅ社製、製品名「Ｐ９６９５−ＭＭＡＰＯＳＳＭＡ」メチルメタクリレートユニットの分子量（８０００)、ヘドラルオリゴメリックシルセスキオキサン含有ポリメタクリレートの分子量（２８０００））を用い、まず、シクロペンタノン（東京化成工業株式会社製）に溶解し、溶液濃度３質量%のポリマー溶液を調製した。調製したポリマー溶液を、スピンコート法により、ガラス基板（支持体１）上に塗布し、厚さが２００ｎｍのブロックコポリマー層を作製した。作製した該ブロックコポリマー層を、硫化炭素溶媒雰囲気下で２０時間かけアニーリングすることで、ヘドラルオリゴメリックシルセスキオキサン含有ポリメタクリレート相とポリメチルメタクリレート相にミクロ相分離させた。その後、反応性イオンエッチング装置（Ｓａｍｃｏ社製、ＵＶ-Ｏｚｏｎｅ ｄｒｙ ｓｔｒｉｐｐｅｒ）を用いて、ポリメチルメタクリレート相をエッチングし、多孔質基板２（平均孔径：８０ｎｍ、孔の深さ：１２０ｎｍ）を得た。
一方、２種以上の元素を含有する熱電半導体材料として、ｐ型ビスマステルライド（Ｂｉ0.4Ｔｅ3.0Ｓｂ1.6、元素組成：Ｂｉ：Ｔｅ：Ｓｂ＝９：６０：３１）の原料粒子をステンレス製の金型に入れ、ホットプレス法により、焼結温度２００℃で１時間保持し、同軸型真空アークプラズマ蒸着源となる熱電半導体材料の円柱状のカソード電極（蒸着源；ターゲット：φ１０×１７ｍｍ）を得た。
次いで、図３（ａ）、（ｂ）の同軸型真空アークプラズマ蒸着装置を用いて、チャンバ内の真空度が５．０×１０-3Ｐａ以下に到達した時点で、アーク電圧を８０Ｖ、成膜レート０．３３ｎｍ／回（１秒につき１回の放電）で３００回放電を行い、多孔質基板２（１１）上に、ｐ型ビスマステルライドの薄膜（１００ｎｍ）を形成した。なお、チャンバ内の多孔質基板２（１１）は加熱せずに、常温で蒸着を行った。
その後、得られた熱電変換材料を、図４に示す熱処理装置の中央に設置し、ロータリポンプにより１．０Ｐａまで排気し、アルゴンガスで３回パージを行った後、水素、アルゴン混合ガスを大気圧になるまで導入し、熱処理装置内が大気圧になった時点で、フロー弁を開き０．１Ｌ／ｍｉｎの流量で、水素とアルゴンの混合ガス（水素：アルゴン＝５：９５）を装置内に供給した。さらに、加温速度５℃／ｍｉｎで昇温し、熱処理温度２３０℃で１時間保持することで、熱電薄膜を結晶成長させた熱電変換材料を作製した。Example 1
(Preparation of porous substrate)
As a polymer, a block copolymer composed of a hydrophilic unit (methyl methacrylate) and a hydrophobic unit (polymethacrylate containing a helical oligomeric silsesquioxane) (manufactured by polymer source, product name “P9695-MMAPOSSMA” methyl methacrylate unit) First, a polymer having a concentration of 3% by mass in cyclopentanone (manufactured by Tokyo Chemical Industry Co., Ltd.). A solution was prepared. The prepared polymer solution was applied onto a glass substrate (support 1) by a spin coating method to produce a block copolymer layer having a thickness of 200 nm. The produced block copolymer layer was annealed in a carbon sulfide solvent atmosphere for 20 hours, thereby microphase-separating into a poly (methacrylate) phase and a polymethyl methacrylate phase containing a helical oligomeric silsesquioxane. Then, using a reactive ion etching apparatus (Samco, UV-zone dry stripper), the polymethylmethacrylate phase was etched to obtain a porous substrate 2 (average pore diameter: 80 nm, pore depth: 120 nm). .
On the other hand, as thermoelectric semiconductor materials containing two or more elements, raw material particles of p-type bismuth telluride (Bi 0.4 Te 3.0 Sb 1.6 , element composition: Bi: Te: Sb = 9: 60: 31) are made of stainless steel gold. A cylindrical cathode electrode (deposition source; target: φ10 × 17 mm) of a thermoelectric semiconductor material to be a coaxial vacuum arc plasma deposition source is obtained by placing in a mold and holding at a sintering temperature of 200 ° C. for 1 hour by hot pressing. It was.
Next, when the degree of vacuum in the chamber reaches 5.0 × 10 −3 Pa or less using the coaxial vacuum arc plasma deposition apparatus shown in FIGS. 3 (a) and 3 (b), the arc voltage is set to 80V. Discharge was performed 300 times at a film rate of 0.33 nm / discharge (one discharge per second) to form a thin film (100 nm) of p-type bismuth telluride on the porous substrate 2 (11). The porous substrate 2 (11) in the chamber was deposited at room temperature without heating.
After that, the obtained thermoelectric conversion material is installed in the center of the heat treatment apparatus shown in FIG. 4, evacuated to 1.0 Pa by a rotary pump, purged with argon gas three times, and then mixed with hydrogen and argon mixed gas. When the pressure inside the heat treatment apparatus reaches atmospheric pressure, the flow valve is opened and a mixed gas of hydrogen and argon (hydrogen: argon = 5: 95) is supplied at a flow rate of 0.1 L / min. Supplied to. Furthermore, the temperature was increased at a heating rate of 5 ° C./min, and the heat treatment temperature was maintained at 230 ° C. for 1 hour to produce a thermoelectric conversion material in which a thermoelectric thin film was grown.
（比較例１）
フラッシュ蒸着法でｐ型ビスマステルライドを成膜した以外、実施例１と同様に、熱電変換材料を作製した。
実施例１及び比較例１で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の評価結果を表１に示す。(Comparative Example 1)
A thermoelectric conversion material was produced in the same manner as in Example 1 except that p-type bismuth telluride was formed by flash vapor deposition.
Table 1 shows the evaluation results of the thermal conductivity, electrical conductivity, Seebeck coefficient, element composition, and adhesion test of the thermoelectric conversion materials obtained in Example 1 and Comparative Example 1.
（実施例２）
熱電半導体材料として、ｎ型ビスマステルライド（Ｂｉ2.0Ｔｅ2.7Ｓｅ0.3、元素組成：Ｂｉ：Ｔｅ：Ｓｅ＝４０：５４：６）を使用した以外は、実施例１と同様にして、熱電変換材料を作製した。(Example 2)
A thermoelectric conversion material was obtained in the same manner as in Example 1 except that n-type bismuth telluride (Bi 2.0 Te 2.7 Se 0.3 , elemental composition: Bi: Te: Se = 40: 54: 6) was used as the thermoelectric semiconductor material. Produced.
（比較例２）
熱電半導体材料として、ｎ型ビスマステルライド（Ｂｉ2.0Ｔｅ2.7Ｓｅ0.3、元素組成：Ｂｉ：Ｔｅ：Ｓｅ＝４０：５４：６）を使用した以外は、比較例１と同様にして、熱電変換材料を作製した。
実施例２及び比較例２で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。(Comparative Example 2)
A thermoelectric conversion material was prepared in the same manner as in Comparative Example 1 except that n-type bismuth telluride (Bi 2.0 Te 2.7 Se 0.3 , elemental composition: Bi: Te: Se = 40: 54: 6) was used as the thermoelectric semiconductor material. Produced.
Table 1 shows the thermal conductivity, electrical conductivity, Seebeck coefficient, elemental composition, and adhesion test results of the thermoelectric conversion materials obtained in Example 2 and Comparative Example 2.
（実施例３）
熱電半導体材料として、ｐ型Ｆｅ2ＶＡｌ（元素組成：Ｆｅ：Ｖ：Ａｌ＝５２．５：２２．５：２５）を使用した以外は、実施例１と同様にして、熱電変換材料を作製した。(Example 3)
A thermoelectric conversion material was produced in the same manner as in Example 1 except that p-type Fe 2 VAl (element composition: Fe: V: Al = 52.5: 22.5: 25) was used as the thermoelectric semiconductor material. .
（比較例３）
熱電半導体材料として、ｐ型Ｆｅ2ＶＡｌ（元素組成：Ｆｅ：Ｖ：Ａｌ＝５２．５：２２．５：２５）を使用した以外は、比較例１と同様にして、熱電変換材料を作製した。
実施例３及び比較例３で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。(Comparative Example 3)
A thermoelectric conversion material was produced in the same manner as in Comparative Example 1 except that p-type Fe 2 VAl (element composition: Fe: V: Al = 52.5: 22.5: 25) was used as the thermoelectric semiconductor material. .
Table 1 shows the results of thermal conductivity, electrical conductivity, Seebeck coefficient, element composition, and adhesion test of the thermoelectric conversion materials obtained in Example 3 and Comparative Example 3.
（実施例４）
熱電半導体材料として、ｎ型Ｆｅ2ＶＡｌ（元素組成：Ｆｅ：Ｖ：Ａｌ＝５２．５：２２．５：２５）を使用した以外は、実施例１と同様にして、熱電変換材料を作製した。Example 4
A thermoelectric conversion material was produced in the same manner as in Example 1 except that n-type Fe 2 VAl (element composition: Fe: V: Al = 52.5: 22.5: 25) was used as the thermoelectric semiconductor material. .
（比較例４）
熱電半導体材料として、ｎ型Ｆｅ2ＶＡｌ（元素組成：Ｆｅ：Ｖ：Ａｌ＝５２．５：２２．５：２５）を使用した以外は、比較例１と同様にして、熱電変換材料を作製した。
実施例４及び比較例４で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。(Comparative Example 4)
A thermoelectric conversion material was produced in the same manner as in Comparative Example 1 except that n-type Fe 2 VAl (element composition: Fe: V: Al = 52.5: 22.5: 25) was used as the thermoelectric semiconductor material. .
Table 1 shows the results of thermal conductivity, electrical conductivity, Seebeck coefficient, element composition, and adhesion test of the thermoelectric conversion materials obtained in Example 4 and Comparative Example 4.
（実施例５）
熱電半導体材料として、ｐ型ＭｎＳｉ1.73（元素組成：Ｍｎ：Ｓｉ＝３７：６３）を使用した以外は、実施例１と同様にして、熱電変換材料を作製した。(Example 5)
A thermoelectric conversion material was produced in the same manner as in Example 1 except that p-type MnSi 1.73 (element composition: Mn: Si = 37: 63) was used as the thermoelectric semiconductor material.
（比較例５）
熱電半導体材料として、ｐ型ＭｎＳｉ1.73（元素組成：Ｍｎ：Ｓｉ＝３７：６３）を使用した以外は、比較例１と同様にして、熱電変換素子を作製した。
実施例５及び比較例５で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成、及び密着性試験の結果を表１に示す。(Comparative Example 5)
A thermoelectric conversion element was produced in the same manner as in Comparative Example 1 except that p-type MnSi 1.73 (element composition: Mn: Si = 37: 63) was used as the thermoelectric semiconductor material.
Table 1 shows the thermal conductivity, electrical conductivity, Seebeck coefficient, element composition, and adhesion test results of the thermoelectric conversion materials obtained in Example 5 and Comparative Example 5.
（実施例６）
熱電半導体材料として、ｎ型Ｍｇ2Ｓｉ（元素組成：Ｍｇ：Ｓｉ＝６７：３３）を使用した以外は、実施例１と同様にして、熱電変換材料を作製した。(Example 6)
A thermoelectric conversion material was produced in the same manner as in Example 1 except that n-type Mg 2 Si (element composition: Mg: Si = 67: 33) was used as the thermoelectric semiconductor material.
（比較例６）
熱電半導体材料として、ｎ型Ｍｇ2Ｓｉ（元素組成：Ｍｇ：Ｓｉ＝６７：３３）を使用した以外は、比較例１と同様にして、熱電変換材料を作製した。
実施例６及び比較例６で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。(Comparative Example 6)
A thermoelectric conversion material was produced in the same manner as in Comparative Example 1 except that n-type Mg 2 Si (element composition: Mg: Si = 67: 33) was used as the thermoelectric semiconductor material.
Table 1 shows the results of thermal conductivity, electrical conductivity, Seebeck coefficient, element composition and adhesion test of the thermoelectric conversion materials obtained in Example 6 and Comparative Example 6.
（実施例７）
（多孔質基板の作製）
アルミニウム基体（株式会社ニラコ製、１０×１００×０．５ｍｍ、純度９９．９％）を陽極酸化し、多孔質のアルミナ基板（多孔質基板、平均孔径：８０ｎｍ、孔の深さ：１２０ｎｍ）を作製した。
得られた多孔質基板を用いた以外は、実施例１と同様にして、熱電変換材料を作製した。(Example 7)
(Preparation of porous substrate)
An aluminum substrate (manufactured by Nilaco Corporation, 10 × 100 × 0.5 mm, purity 99.9%) is anodized to form a porous alumina substrate (porous substrate, average pore diameter: 80 nm, pore depth: 120 nm). Produced.
A thermoelectric conversion material was produced in the same manner as in Example 1 except that the obtained porous substrate was used.
（比較例７）
上記多孔質基板を用いた以外は、比較例１と同様にして、熱電変換材料を作製した。
実施例７及び比較例７で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。(Comparative Example 7)
A thermoelectric conversion material was produced in the same manner as in Comparative Example 1 except that the porous substrate was used.
Table 1 shows the thermal conductivity, electrical conductivity, Seebeck coefficient, element composition, and adhesion test results of the thermoelectric conversion materials obtained in Example 7 and Comparative Example 7.
（実施例８）
実施例１において、成膜工程後の熱処理を施さず、代わりに成膜工程時に施した以外は、すなわち、真空チャンバ内の多孔質基板２（１１）を２３０℃に加熱しながら、成膜レートを０．０８ｎｍ／回（１秒につき１回の放電）で１２００回放電を行った以外は、実施例１と同様にして、多孔質基板２（１１）上に、ｐ型ビスマステルライドの薄膜（１００ｎｍ）を形成し、熱電変換材料を作製した。
実施例８で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。(Example 8)
In Example 1, the heat treatment after the film forming process was not performed, but instead it was performed at the time of the film forming process, that is, while the porous substrate 2 (11) in the vacuum chamber was heated to 230 ° C., the film forming rate P-type bismuth telluride thin film on the porous substrate 2 (11) in the same manner as in Example 1 except that the discharge was performed 1200 times at 0.08 nm / discharge (one discharge per second). 100 nm) to form a thermoelectric conversion material.
Table 1 shows the thermal conductivity, electrical conductivity, Seebeck coefficient, elemental composition, and adhesion test results of the thermoelectric conversion material obtained in Example 8.
（実施例９）
実施例１において、成膜工程時にも熱処理を施した以外は、すなわち、真空チャンバ内の多孔質基板２（１１）を２３０℃に加熱しながら、成膜レートを０．０８ｎｍ／回（１秒につき１回の放電）で１２００回放電を行った以外は、実施例１と同様にして、多孔質基板２（１１）上に、ｐ型ビスマステルライドの薄膜（１００ｎｍ）を形成し、熱電変換材料を作製した。
実施例９で得られた熱電変換材料の熱伝導率、電気伝導率、ゼーベック係数、元素組成及び密着性試験の結果を表１に示す。Example 9
In Example 1, except that heat treatment was also performed during the film formation process, that is, the film formation rate was 0.08 nm / time (1 second while heating the porous substrate 2 (11) in the vacuum chamber to 230 ° C. A p-type bismuth telluride thin film (100 nm) was formed on the porous substrate 2 (11) in the same manner as in Example 1 except that the discharge was performed 1200 times per discharge). Was made.
Table 1 shows the thermal conductivity, electrical conductivity, Seebeck coefficient, elemental composition, and adhesion test results of the thermoelectric conversion material obtained in Example 9.
アークプラズマ蒸着法を用い熱電半導体材料を成膜し、熱処理を施した実施例１〜９の熱電変換材料は、熱電薄膜の組成比が、原材料からなる蒸着源とほぼ変わらぬ組成比に制御され、同一原材料を用いたフラッシュ蒸着法により成膜をした比較例１〜７の熱電変換材料に比べ、熱電性能が大きく向上した。特に、成膜後にのみ熱処理を施した実施例１の熱電変換材料は、無次元熱電性能指数の値が優れていた。
さらに、実施例１〜９のすべてにおいて、多孔質基板と熱電薄膜との密着性が優れていた。In the thermoelectric conversion materials of Examples 1 to 9, in which a thermoelectric semiconductor material was formed by using an arc plasma deposition method and subjected to heat treatment, the composition ratio of the thermoelectric thin film was controlled to a composition ratio that was almost the same as that of the evaporation source made of the raw material. Compared with the thermoelectric conversion materials of Comparative Examples 1 to 7 formed by flash vapor deposition using the same raw materials, the thermoelectric performance was greatly improved. In particular, the thermoelectric conversion material of Example 1 that was heat-treated only after film formation had an excellent dimensionless thermoelectric performance index.
Furthermore, in all of Examples 1 to 9, the adhesion between the porous substrate and the thermoelectric thin film was excellent.
本発明の製造方法によれば、加工性に優れ、屈曲性が付与でき、製造コストが低減でき、かつ小型化が可能である高効率な熱電変換材料が得られるため、熱電変換素子にして、モジュールに組み込み、工場や廃棄物燃焼炉、セメント燃焼炉等の各種燃焼炉からの排熱、自動車の燃焼ガス排熱及び電子機器の排熱を電気に変換する用途をはじめ、多くの分野への適用が考えられる。 According to the production method of the present invention, a highly efficient thermoelectric conversion material that is excellent in workability, can be imparted flexibility, can be produced at a low cost, and can be reduced in size can be obtained. Incorporated into a module and used in many fields, including applications that convert exhaust heat from various combustion furnaces such as factories, waste combustion furnaces, cement combustion furnaces, automobile combustion gas exhaust heat, and electronic equipment exhaust heat Applicable.
１：支持体
２：多孔質基板
３：ナノ構造
４：疎水性ユニット相
５：親水性ユニット相
６：熱電薄膜（上部）
７：熱電薄膜（内底部）
１１：多孔質基板
１２：真空排気口
１３：カソード電極（蒸着源；ターゲット）
１４：トリガ電極
１５：電源ユニット
１６：アノード電極
１７：トリガ電源
１８：アーク電源
１９：コンデンサー
２０：絶縁碍子
２１：アークプラズマ
３１：熱電変換材料
３２：ヒーター
３３：熱電対
３４：真空排気口
３５：導入ガス排気口
３６：水素ガス導入口
３７：アルゴンガス導入口1: Support 2: Porous substrate 3: Nanostructure 4: Hydrophobic unit phase 5: Hydrophilic unit phase 6: Thermoelectric thin film (upper part)
7: Thermoelectric thin film (inner bottom)
11: Porous substrate 12: Vacuum exhaust port 13: Cathode electrode (deposition source; target)
14: Trigger electrode 15: Power supply unit 16: Anode electrode 17: Trigger power supply 18: Arc power supply 19: Capacitor 20: Insulator 21: Arc plasma 31: Thermoelectric conversion material 32: Heater 33: Thermocouple 34: Vacuum exhaust port 35: Introduction gas exhaust port 36: Hydrogen gas introduction port 37: Argon gas introduction port
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| JP3032826B2 (en) * | 1998-03-05 | 2000-04-17 | 工業技術院長 | Thermoelectric conversion material and method for producing the same |
| JP4304272B2 (en) * | 2002-11-12 | 2009-07-29 | 独立行政法人産業技術総合研究所 | Thermoelectric conversion material thin film, sensor element and manufacturing method thereof |
| JP2005191040A (en) * | 2003-12-24 | 2005-07-14 | Kyocera Corp | Method of manufacturing thermoelectric module and positioning jig used therefor |
| US7309830B2 (en) * | 2005-05-03 | 2007-12-18 | Toyota Motor Engineering & Manufacturing North America, Inc. | Nanostructured bulk thermoelectric material |
| JP2006287000A (en) * | 2005-04-01 | 2006-10-19 | Toshiba Ceramics Co Ltd | Thermoelectric device and substrate therefor |
| JP2007179963A (en) * | 2005-12-28 | 2007-07-12 | Kasatani:Kk | Manufacturing method of catalyst for fuel cell, and method for carrying catalyst |
| US7867636B2 (en) * | 2006-01-11 | 2011-01-11 | Murata Manufacturing Co., Ltd. | Transparent conductive film and method for manufacturing the same |
| US20070277866A1 (en) * | 2006-05-31 | 2007-12-06 | General Electric Company | Thermoelectric nanotube arrays |
| JP2011035117A (en) * | 2009-07-31 | 2011-02-17 | Sumitomo Chemical Co Ltd | Thermoelectric conversion material |
| JP5201691B2 (en) * | 2009-12-04 | 2013-06-05 | 独立行政法人産業技術総合研究所 | Oxygen-containing intermetallic compound thermoelectric conversion material and thermoelectric conversion element to thermoelectric conversion module |
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