JP6061590B2 - 表面保護部材および加工方法 - Google Patents
表面保護部材および加工方法 Download PDFInfo
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- JP6061590B2 JP6061590B2 JP2012214123A JP2012214123A JP6061590B2 JP 6061590 B2 JP6061590 B2 JP 6061590B2 JP 2012214123 A JP2012214123 A JP 2012214123A JP 2012214123 A JP2012214123 A JP 2012214123A JP 6061590 B2 JP6061590 B2 JP 6061590B2
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- 238000000034 method Methods 0.000 claims description 4
- 238000010521 absorption reaction Methods 0.000 description 8
- 230000001681 protective effect Effects 0.000 description 8
- 239000000463 material Substances 0.000 description 4
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- 239000004065 semiconductor Substances 0.000 description 4
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- 229910003460 diamond Inorganic materials 0.000 description 2
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- 238000010438 heat treatment Methods 0.000 description 2
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- 230000001678 irradiating effect Effects 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
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- 230000005068 transpiration Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/977—Thinning or removal of substrate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Description
(1)ウェーハ
図1は、一実施形態に係る半導体ウェーハ等のウェーハ1を示している。ウェーハ1は例えば700μm程度の一定厚さを有しており、その表面1aには複数のデバイス2が形成されている。これらデバイス2は、表面1aに格子状に設定された複数の分割予定ラインで区画された複数の矩形領域に、LSI等の電子回路を設けることで形成されている。
図2は、一実施形態に係る表面保護部材10を示している。表面保護部材10は、厚さおよび直径がウェーハ1と同じ程度の円板状のベース11を主体とするものである。ベース11の表面側には、ウェーハ1のデバイス領域3よりも大きく、かつ、ウェーハ1のサイズ(直径)よりは小さいサイズを有する円形状の一定深さの凹部12が形成されている。凹部12はベース11の外周縁と同心状に形成されており、凹部12の周囲には、環状の外周凸部13が形成されている。ベース11の材料としては、例えばシリコン、ガラス、セラミック等のハード部材の他、シート状の樹脂等が用いられる。
次に、上記表面保護部材10を用いてウェーハ1の裏面1bを研削する一実施形態の加工方法について説明する。
図3に示すように、表面保護部材10のベース11における環状の外周凸部13の表面に、接着剤20を配設する。接着剤20は、ベース11がウェーハ1に接着して固定される特性を有するものが用いられ、外周凸部13の表面の全周にわたって塗布されるか、あるいは破線状、もしくは所定間隔をおいた複数箇所(例えば4箇所、8箇所など)に塗布されて配設される。
次に、図6に示すように、表面保護部材10側を保持テーブル21で保持してウェーハ1の裏面1bを露出させるとともに、ウェーハ1を研削手段22で研削してウェーハ1を所定の厚さ(例えば50〜100μm程度)へと薄化する研削ステップを行う。
次に、表面保護部材10をウェーハ1上から除去する除去ステップを行う。例えば接着剤20が、加熱されることで接着力が低下する熱軟化タイプであった場合には、図7に示すように、表面保護部材10側をホットプレート30上に載置することで接着剤20を加熱して軟化させ、接着力が低下したら、図8に示すように研削ステップで裏面1b側が研削されて薄化されたウェーハ1を、表面保護部材10から剥離させる。これにより、表面保護部材10をウェーハ1上から除去し、裏面研削後のウェーハ1を得る。
固定ステップの他の形態として、接着剤20を外周凸部13の表面ではなく、図10(a)に示すように、重ね合わせたウェーハ1と表面保護部材10の、双方の外周側面に接着剤20を塗布して配設し、両者を固定する形態が挙げられる。この場合、接着剤20は、必要に応じて外周面の全周にわたって塗布したり、周方向に間隔をおいて間欠的に配設する。
図10(a)に示した接着剤20が紫外線照射によって接着力が低下するタイプのものである場合には、研削ステップ後の除去ステップにおいては、図10(b)に示すように外周側面の接着剤20に紫外線照射手段50から紫外線(外的刺激)51を照射することで接着剤20の接着力を低下させ、ウェーハ1を表面保護部材10から剥離させて表面保護部材10をウェーハ1上から除去し、裏面研削後のウェーハ1を得ることができる。
上記一実施形態によれば、デバイス領域3の外側といった局所的な部分に配設する接着剤20によって表面保護部材10とウェーハ1とを固定し、その固定状態においてデバイス領域3は凹凸吸収部材14に対面させている。このため、ウェーハ1の裏面研削後に表面保護部材10をウェーハ1上から剥離して除去する作業が容易であるとともに、接着剤20はデバイス1の表面1aに残存しない。
1a…ウェーハの表面
1b…ウェーハの裏面
2…デバイス
3…デバイス領域
4…外周余剰領域
10…表面保護部材
11…円板状ベース
12…凹部
14…凹凸吸収部材
20…接着剤
21…保持テーブル
22…研削手段
51…紫外線(外的刺激)
Claims (4)
- 表面に複数のデバイスが形成されたデバイス領域と該デバイス領域を囲繞する外周余剰領域とを備えたウェーハの表面を保護する表面保護部材であって、
ウェーハの前記デバイス領域よりも大きくウェーハサイズより小さいサイズの凹部を表面に有し、ウェーハの直径を含む直径を有したハード部材からなる円板状ベースと、
前記凹部に配設された凹凸吸収部材と、
を備えることを特徴とする表面保護部材。 - 請求項1に記載の表面保護部材を用いて、表面に複数のデバイスが形成されたデバイス領域と該デバイス領域を囲繞する外周余剰領域とを備えたウェーハを加工する加工方法であって、
ウェーハの前記デバイス領域と前記表面保護部材の前記凹凸吸収部材とを対応させてウェーハを該表面保護部材上に配設するとともに該デバイス領域の外側に接着剤を配設して該表面保護部材とウェーハとを固定する固定ステップと、
該固定ステップを実施した後、前記表面保護部材側を保持テーブルで保持してウェーハの裏面を露出させるとともにウェーハを研削手段で研削して所定の厚さへと薄化する研削ステップと、
該研削ステップを実施した後、前記表面保護部材をウェーハ上から除去する除去ステップと、
を備えることを特徴とする加工方法。 - 前記接着剤は、外的刺激によって接着力が低下する接着剤であり、
前記除去ステップでは、該接着剤に外的刺激を付与して該接着剤の接着力を低下させた後、前記表面保護部材をウェーハ上から除去すること
を特徴とする請求項2に記載の加工方法。 - 前記除去ステップでは、前記デバイス領域と前記接着剤との間で少なくともウェーハを完全切断した後、前記表面保護部材をウェーハ上から除去すること
を特徴とする請求項2に記載の加工方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012214123A JP6061590B2 (ja) | 2012-09-27 | 2012-09-27 | 表面保護部材および加工方法 |
KR1020130106731A KR102024390B1 (ko) | 2012-09-27 | 2013-09-05 | 표면 보호 부재 및 가공 방법 |
US14/029,162 US9006085B2 (en) | 2012-09-27 | 2013-09-17 | Adhesive and protective member used in a wafer processing method |
DE102013219271.1A DE102013219271B4 (de) | 2012-09-27 | 2013-09-25 | Schutzelement und Waferbearbeitungsverfahren |
CN201310446641.5A CN103700584B (zh) | 2012-09-27 | 2013-09-25 | 表面保护部件以及加工方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2012214123A JP6061590B2 (ja) | 2012-09-27 | 2012-09-27 | 表面保護部材および加工方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2014067970A JP2014067970A (ja) | 2014-04-17 |
JP6061590B2 true JP6061590B2 (ja) | 2017-01-18 |
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Application Number | Title | Priority Date | Filing Date |
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JP2012214123A Active JP6061590B2 (ja) | 2012-09-27 | 2012-09-27 | 表面保護部材および加工方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US9006085B2 (ja) |
JP (1) | JP6061590B2 (ja) |
KR (1) | KR102024390B1 (ja) |
CN (1) | CN103700584B (ja) |
DE (1) | DE102013219271B4 (ja) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5921473B2 (ja) * | 2013-03-21 | 2016-05-24 | 株式会社東芝 | 半導体装置の製造方法 |
JP6004100B2 (ja) * | 2013-05-24 | 2016-10-05 | 富士電機株式会社 | 半導体装置の製造方法 |
JP2015119085A (ja) * | 2013-12-19 | 2015-06-25 | 株式会社ディスコ | デバイスウェーハの加工方法 |
JP6385133B2 (ja) * | 2014-05-16 | 2018-09-05 | 株式会社ディスコ | ウェーハの加工方法及び中間部材 |
JP6344971B2 (ja) * | 2014-05-16 | 2018-06-20 | 株式会社ディスコ | サポートプレート、サポートプレートの形成方法及びウェーハの加工方法 |
JP2016051779A (ja) * | 2014-08-29 | 2016-04-11 | 株式会社ディスコ | ウエーハの貼り合わせ方法及び貼り合わせワークの剥離方法 |
FR3030880B1 (fr) | 2014-12-19 | 2018-05-11 | Commissariat Energie Atomique | Procede de transformation d'un dispositif electronique |
KR102341732B1 (ko) | 2015-01-30 | 2021-12-23 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
JP6313251B2 (ja) * | 2015-03-12 | 2018-04-18 | 東芝メモリ株式会社 | 半導体装置の製造方法 |
DE102015216619B4 (de) * | 2015-08-31 | 2017-08-10 | Disco Corporation | Verfahren zum Bearbeiten eines Wafers |
WO2017036512A1 (en) * | 2015-08-31 | 2017-03-09 | Karl Heinz Priewasser | Method of processing wafer and protective sheeting for use in this method |
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JP6906843B2 (ja) * | 2017-04-28 | 2021-07-21 | 株式会社ディスコ | ウェーハの加工方法 |
JP6925714B2 (ja) * | 2017-05-11 | 2021-08-25 | 株式会社ディスコ | ウェーハの加工方法 |
JP6837717B2 (ja) * | 2017-05-11 | 2021-03-03 | 株式会社ディスコ | ウェーハの加工方法 |
DE102017208405B4 (de) | 2017-05-18 | 2024-05-02 | Disco Corporation | Verfahren zum Bearbeiten eines Wafers und Schutzfolie |
JP6914587B2 (ja) * | 2017-05-25 | 2021-08-04 | 株式会社ディスコ | ウェーハの加工方法 |
JP7157301B2 (ja) * | 2017-11-06 | 2022-10-20 | 株式会社東京精密 | ウェーハの加工方法 |
WO2019133457A1 (en) * | 2017-12-28 | 2019-07-04 | Rudolph Technologies, Inc. | Conformal stage |
DE102018200656A1 (de) * | 2018-01-16 | 2019-07-18 | Disco Corporation | Verfahren zum Bearbeiten eines Wafers |
JP2019212803A (ja) * | 2018-06-06 | 2019-12-12 | 信越ポリマー株式会社 | ウェーハ用スペーサ |
JP7187112B2 (ja) * | 2018-08-13 | 2022-12-12 | 株式会社ディスコ | キャリア板の除去方法 |
CN110890306A (zh) * | 2018-09-10 | 2020-03-17 | 山东浪潮华光光电子股份有限公司 | 一种简便的半导体器件用衬底减薄后的下片方法 |
FR3085957B1 (fr) * | 2018-09-14 | 2021-01-29 | Commissariat Energie Atomique | Procede de collage temporaire avec adhesif thermoplastique incorporant une couronne rigide |
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JPH01268131A (ja) * | 1988-04-20 | 1989-10-25 | Nitto Denko Corp | 半導体ウエハの保護部材 |
JPH0562950A (ja) * | 1991-08-29 | 1993-03-12 | Nitto Denko Corp | 半導体ウエハへの保護テープ貼り付けおよび剥離方法 |
JPH05198542A (ja) | 1991-09-02 | 1993-08-06 | Mitsui Toatsu Chem Inc | 半導体ウエハの裏面研削方法および該方法に用いる粘着テープ |
JP2001196404A (ja) * | 2000-01-11 | 2001-07-19 | Fujitsu Ltd | 半導体装置及びその製造方法 |
US6520844B2 (en) * | 2000-08-04 | 2003-02-18 | Sharp Kabushiki Kaisha | Method of thinning semiconductor wafer capable of preventing its front from being contaminated and back grinding device for semiconductor wafers |
JP3906962B2 (ja) * | 2000-08-31 | 2007-04-18 | リンテック株式会社 | 半導体装置の製造方法 |
JP2004207606A (ja) | 2002-12-26 | 2004-07-22 | Disco Abrasive Syst Ltd | ウェーハサポートプレート |
JP4447280B2 (ja) * | 2003-10-16 | 2010-04-07 | リンテック株式会社 | 表面保護用シートおよび半導体ウエハの研削方法 |
JP2005109433A (ja) * | 2004-03-31 | 2005-04-21 | Disco Abrasive Syst Ltd | 半導体ウエーハの切削方法および研削用のバンプ保護部材 |
US20060046433A1 (en) * | 2004-08-25 | 2006-03-02 | Sterrett Terry L | Thinning semiconductor wafers |
SG126885A1 (en) * | 2005-04-27 | 2006-11-29 | Disco Corp | Semiconductor wafer and processing method for same |
JP2008060361A (ja) | 2006-08-31 | 2008-03-13 | Nitto Denko Corp | 半導体ウェハの加工方法、及びそれに用いる半導体ウェハ加工用粘着シート |
JP2010062269A (ja) * | 2008-09-02 | 2010-03-18 | Three M Innovative Properties Co | ウェーハ積層体の製造方法、ウェーハ積層体製造装置、ウェーハ積層体、支持層剥離方法、及びウェーハの製造方法 |
FR2935536B1 (fr) | 2008-09-02 | 2010-09-24 | Soitec Silicon On Insulator | Procede de detourage progressif |
JP5508108B2 (ja) | 2010-04-15 | 2014-05-28 | 株式会社ディスコ | 半導体装置の製造方法 |
JP5997477B2 (ja) * | 2012-03-30 | 2016-09-28 | リンテック株式会社 | 表面保護用シート |
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