JP6042028B2 - 高周波パッケージ - Google Patents
高周波パッケージ Download PDFInfo
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- JP6042028B2 JP6042028B2 JP2016507171A JP2016507171A JP6042028B2 JP 6042028 B2 JP6042028 B2 JP 6042028B2 JP 2016507171 A JP2016507171 A JP 2016507171A JP 2016507171 A JP2016507171 A JP 2016507171A JP 6042028 B2 JP6042028 B2 JP 6042028B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0224—Patterned shielding planes, ground planes or power planes
- H05K1/0225—Single or multiple openings in a shielding, ground or power plane
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6683—High-frequency adaptations for monolithic microwave integrated circuit [MMIC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
- H01L2224/81815—Reflow soldering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15192—Resurf arrangement of the internal vias
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/1579—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0219—Printed shielding conductors for shielding around or between signal conductors, e.g. coplanar or coaxial printed shielding conductors
- H05K1/0221—Coaxially shielded signal lines comprising a continuous shielding layer partially or wholly surrounding the signal lines
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Geometry (AREA)
- Structure Of Printed Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Waveguides (AREA)
Description
図1は、本実施の形態に係る高周波パッケージの樹脂基板の上面図である。図2は、本実施の形態に係る高周波パッケージの断面図であって、図1中の線A−A’に沿った断面構造を示している。尚、説明を分かりやすくするため、図1において、樹脂基板の内層に形成されているいくつかの構成要素も破線で示されている。
Claims (4)
- 樹脂基板と、
前記樹脂基板の第1表面側に搭載された高周波デバイスと、
前記樹脂基板の前記第1表面と反対側の第2表面上に形成された、グランド電位のグランド面導体と、
前記樹脂基板の内層に形成された、高周波信号の伝送線路と、
前記樹脂基板の内部に形成された、グランド電位のグランドビアと
を備え、
前記グランド面導体には貫通穴が形成され、
前記グランドビアは、前記伝送線路と前記貫通穴との間に配置されている
ことを特徴とする高周波パッケージ。 - 前記グランドビアの数は複数であり、
前記複数のグランドビアは、前記伝送線路に沿って配置されている
ことを特徴とする請求項1に記載の高周波パッケージ。 - 前記貫通穴の直径は、前記高周波信号の波長の1/2未満である
ことを特徴とする請求項1又は2に記載の高周波パッケージ。 - 樹脂基板と、
前記樹脂基板の第1表面側に搭載された高周波デバイスと、
前記樹脂基板の前記第1表面と反対側の第2表面上に形成された、グランド電位のグランド面導体と、
前記樹脂基板の内層に形成された、高周波信号の伝送線路と
を備え、
前記グランド面導体には貫通穴が形成され、
前記貫通穴の直径は、前記高周波信号の波長の1/2未満である
ことを特徴とする高周波パッケージ。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2014/056370 WO2015136629A1 (ja) | 2014-03-11 | 2014-03-11 | 高周波パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP6042028B2 true JP6042028B2 (ja) | 2016-12-14 |
JPWO2015136629A1 JPWO2015136629A1 (ja) | 2017-04-06 |
Family
ID=54071109
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016507171A Active JP6042028B2 (ja) | 2014-03-11 | 2014-03-11 | 高周波パッケージ |
Country Status (5)
Country | Link |
---|---|
US (1) | US9685418B2 (ja) |
EP (1) | EP3118927B9 (ja) |
JP (1) | JP6042028B2 (ja) |
CN (1) | CN106104911B (ja) |
WO (1) | WO2015136629A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10396005B2 (en) | 2017-12-14 | 2019-08-27 | Samsung Electronics Co., Ltd. | Fan-out semiconductor package |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019098011A1 (ja) * | 2017-11-16 | 2019-05-23 | 株式会社村田製作所 | 樹脂多層基板、電子部品およびその実装構造 |
CN213522492U (zh) * | 2017-11-16 | 2021-06-22 | 株式会社村田制作所 | 树脂多层基板、电子部件及其安装构造 |
US11270953B2 (en) * | 2018-08-31 | 2022-03-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of chip package with shielding structure |
WO2020230778A1 (ja) * | 2019-05-15 | 2020-11-19 | 株式会社村田製作所 | 樹脂多層基板及び電子部品 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6163233A (en) * | 1998-07-30 | 2000-12-19 | Harris Corporation | Waveguide with signal track cross-over and variable features |
JP2005191903A (ja) * | 2003-12-25 | 2005-07-14 | Ngk Spark Plug Co Ltd | メッシュホールグランドストリップライン構造を有する積層体基板 |
JP2013126029A (ja) * | 2011-12-13 | 2013-06-24 | Mitsubishi Electric Corp | 高周波伝送線路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6018125A (en) | 1996-11-15 | 2000-01-25 | Collins; Pat Eliot | High frequency EMI shield with air flow for electronic device enclosure |
US6057600A (en) * | 1997-11-27 | 2000-05-02 | Kyocera Corporation | Structure for mounting a high-frequency package |
EP0961321B1 (en) * | 1998-05-29 | 2008-03-05 | Kyocera Corporation | High-frequency module |
JP3664443B2 (ja) * | 2002-12-05 | 2005-06-29 | 松下電器産業株式会社 | 高周波回路および高周波パッケージ |
US8040286B2 (en) * | 2006-02-06 | 2011-10-18 | Mitsubishi Electric Corporation | High frequency module |
US8168891B1 (en) | 2007-10-26 | 2012-05-01 | Force10 Networks, Inc. | Differential trace profile for printed circuit boards |
US8304659B2 (en) * | 2007-10-26 | 2012-11-06 | Force 10 Networks, Inc. | Differential trace profile for printed circuit boards |
JP4329884B2 (ja) * | 2007-11-20 | 2009-09-09 | 株式会社村田製作所 | 部品内蔵モジュール |
US8222976B2 (en) * | 2008-03-17 | 2012-07-17 | Mitsubishi Electric Corporation | Multilayer dielectric substrate and semiconductor package |
EP3598484B1 (en) * | 2008-09-05 | 2021-05-05 | Mitsubishi Electric Corporation | High-frequency circuit package and sensor module |
JP5366645B2 (ja) * | 2009-05-07 | 2013-12-11 | 日本電信電話株式会社 | 高周波基板 |
-
2014
- 2014-03-11 CN CN201480076901.7A patent/CN106104911B/zh active Active
- 2014-03-11 WO PCT/JP2014/056370 patent/WO2015136629A1/ja active Application Filing
- 2014-03-11 US US15/119,494 patent/US9685418B2/en active Active
- 2014-03-11 EP EP14885156.1A patent/EP3118927B9/en active Active
- 2014-03-11 JP JP2016507171A patent/JP6042028B2/ja active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6163233A (en) * | 1998-07-30 | 2000-12-19 | Harris Corporation | Waveguide with signal track cross-over and variable features |
JP2005191903A (ja) * | 2003-12-25 | 2005-07-14 | Ngk Spark Plug Co Ltd | メッシュホールグランドストリップライン構造を有する積層体基板 |
JP2013126029A (ja) * | 2011-12-13 | 2013-06-24 | Mitsubishi Electric Corp | 高周波伝送線路 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10396005B2 (en) | 2017-12-14 | 2019-08-27 | Samsung Electronics Co., Ltd. | Fan-out semiconductor package |
Also Published As
Publication number | Publication date |
---|---|
EP3118927A1 (en) | 2017-01-18 |
JPWO2015136629A1 (ja) | 2017-04-06 |
CN106104911A (zh) | 2016-11-09 |
WO2015136629A1 (ja) | 2015-09-17 |
EP3118927B1 (en) | 2021-05-19 |
US9685418B2 (en) | 2017-06-20 |
EP3118927B9 (en) | 2021-08-04 |
EP3118927A4 (en) | 2017-11-15 |
US20170012008A1 (en) | 2017-01-12 |
CN106104911B (zh) | 2019-03-26 |
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