JP6020317B2 - 半導体素子 - Google Patents
半導体素子 Download PDFInfo
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- JP6020317B2 JP6020317B2 JP2013079847A JP2013079847A JP6020317B2 JP 6020317 B2 JP6020317 B2 JP 6020317B2 JP 2013079847 A JP2013079847 A JP 2013079847A JP 2013079847 A JP2013079847 A JP 2013079847A JP 6020317 B2 JP6020317 B2 JP 6020317B2
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- 239000004065 semiconductor Substances 0.000 title claims description 93
- 239000000758 substrate Substances 0.000 claims description 44
- 230000005684 electric field Effects 0.000 description 14
- 230000015556 catabolic process Effects 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 6
- 239000012535 impurity Substances 0.000 description 6
- 230000002093 peripheral effect Effects 0.000 description 5
- 239000012141 concentrate Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000020169 heat generation Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8611—Planar PN junction diodes
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
図1Aは、本発明の実施の形態1に係る半導体素子のうち主としてp型の領域を概念的に示す平面図である。この図では説明の便宜上、半導体基板主面(半導体基板上面)上の絶縁膜および電極パターンを省略している。本発明の実施の形態1に係る半導体素子はトレンチゲートを有するIGBTである。この半導体素子は、シリコンなどの半導体基板10をベースとして構成され、n型(以後、第1導電型という)の半導体基板を使用することで、半導体基板10の一部はn型のドリフト領域として機能する。
図11は、本発明の実施の形態2に係る半導体素子の断面図である。本発明の実施の形態2に係る半導体素子はダイオードである。第1導電型の半導体基板200の下面側に第1導電型のカソード領域202が形成されている。半導体基板200の上面側にアノード領域として機能する第2導電型の活性領域204が形成されている。
本発明の実施の形態3に係る半導体素子は、実施の形態1との共通点が多いので実施の形態1との相違点を中心に説明する。図12Aは、本発明の実施の形態3に係る半導体素子の平面図である。本発明の実施の形態3に係る半導体素子は、内側VLD領域14Aを部分的に形成した点において実施の形態1と異なっている。
Claims (5)
- 第1導電型の半導体基板と、
前記半導体基板の上面側に形成された第2導電型の活性領域と、
前記半導体基板の上面側に平面視で前記活性領域と接するように形成された第2導電型の内側VLD領域と、
前記半導体基板の上面側に平面視で前記内側VLD領域の前記活性領域と接する部分と反対側の部分と接するように形成された第2導電型のウェル領域と、を備え、
前記ウェル領域は前記活性領域よりも深く形成され、
前記内側VLD領域は、前記活性領域と接する部分では前記活性領域と同じ深さであり、前記活性領域から前記ウェル領域に向かって深さが漸増し、前記ウェル領域と接する部分では前記ウェル領域と同じ深さとなることを特徴とする半導体素子。 - 前記活性領域の一部に前記活性領域より浅く形成された第1導電型のエミッタ領域と、
平面視で前記活性領域から前記内側VLD領域又は前記ウェル領域まで伸び、前記活性領域よりも深くかつ前記ウェル領域よりも浅く形成されたトレンチゲートと、
前記半導体基板の下面側に形成された第2導電型のコレクタ領域と、を備え、
前記活性領域はベース領域であり、
前記トレンチゲートの端部は、前記内側VLD領域又は前記ウェル領域に覆われることで、前記半導体基板と接しないことを特徴とする請求項1に記載の半導体素子。 - 前記半導体基板の下面側に形成された第1導電型のカソード領域を備え、
前記活性領域はアノード領域であり、
ダイオードを構成する請求項1に記載の半導体素子。 - 前記内側VLD領域は、平面視で複数の点状の領域が重なるもの、又は平面視で複数のストライプ状の領域が重なるものであることを特徴とする請求項1乃至3のいずれか1項に記載の半導体素子。
- 第1導電型の半導体基板と、
前記半導体基板の上面側に形成された第2導電型の活性領域と、
平面視で角部を有し、前記半導体基板の上面側に前記角部以外の部分で前記活性領域に接するように形成された第2導電型のウェル領域と、
前記半導体基板の上面側に、平面視で前記角部と前記活性領域に接するように形成された第2導電型の内側VLD領域と、を備え、
前記ウェル領域は前記活性領域よりも深く形成され、
前記内側VLD領域は、前記活性領域と接する部分では前記活性領域と同じ深さであり、前記活性領域から前記角部に向かって深さが漸増し、前記角部と接する部分では前記角部と同じ深さとなることを特徴とする半導体素子。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2013079847A JP6020317B2 (ja) | 2013-04-05 | 2013-04-05 | 半導体素子 |
US14/150,477 US9105486B2 (en) | 2013-04-05 | 2014-01-08 | Semiconductor device |
DE102014202652.0A DE102014202652B4 (de) | 2013-04-05 | 2014-02-13 | Halbleitervorrichtung |
KR1020140039113A KR101534104B1 (ko) | 2013-04-05 | 2014-04-02 | 반도체 소자 |
CN201410136784.0A CN104103676B (zh) | 2013-04-05 | 2014-04-04 | 半导体元件 |
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JP2013079847A JP6020317B2 (ja) | 2013-04-05 | 2013-04-05 | 半導体素子 |
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JP2014204007A JP2014204007A (ja) | 2014-10-27 |
JP6020317B2 true JP6020317B2 (ja) | 2016-11-02 |
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US (1) | US9105486B2 (ja) |
JP (1) | JP6020317B2 (ja) |
KR (1) | KR101534104B1 (ja) |
CN (1) | CN104103676B (ja) |
DE (1) | DE102014202652B4 (ja) |
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JP2019054170A (ja) * | 2017-09-15 | 2019-04-04 | 株式会社東芝 | 半導体装置 |
JP7051641B2 (ja) * | 2018-08-24 | 2022-04-11 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
Family Cites Families (20)
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EP0176778B1 (de) | 1984-09-28 | 1991-01-16 | Siemens Aktiengesellschaft | Verfahren zum Herstellen eines pn-Übergangs mit hoher Durchbruchsspannung |
EP0310836A3 (de) | 1987-10-08 | 1989-06-14 | Siemens Aktiengesellschaft | Halbleiterbauelement mit einem planaren pn-Übergang |
EP0360036B1 (de) | 1988-09-20 | 1994-06-01 | Siemens Aktiengesellschaft | Planarer pn-Übergang hoher Spannungsfestigkeit |
JPH07105485B2 (ja) | 1988-11-22 | 1995-11-13 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
JPH07273325A (ja) | 1994-03-31 | 1995-10-20 | Fuji Electric Co Ltd | プレーナ型半導体素子およびその製造方法 |
US6215168B1 (en) * | 1999-07-21 | 2001-04-10 | Intersil Corporation | Doubly graded junction termination extension for edge passivation of semiconductor devices |
JP3673231B2 (ja) * | 2002-03-07 | 2005-07-20 | 三菱電機株式会社 | 絶縁ゲート型半導体装置及びゲート配線構造の製造方法 |
DE10316222B3 (de) * | 2003-04-09 | 2005-01-20 | eupec Europäische Gesellschaft für Leistungshalbleiter mbH | Verfahren zur Herstellung eines robusten Halbleiterbauelements und damit hergestelltes Halbleiterbauelement |
JP4794545B2 (ja) * | 2005-01-31 | 2011-10-19 | 新電元工業株式会社 | 半導体装置 |
DE102005004355B4 (de) * | 2005-01-31 | 2008-12-18 | Infineon Technologies Ag | Halbleitereinrichtung und Verfahren zu deren Herstellung |
JP4704283B2 (ja) * | 2005-06-28 | 2011-06-15 | 住友化学株式会社 | 過酸化物分解触媒 |
JP2007096006A (ja) * | 2005-09-29 | 2007-04-12 | Nippon Inter Electronics Corp | ガードリングの製造方法および半導体装置 |
JP4356764B2 (ja) * | 2007-04-18 | 2009-11-04 | 株式会社デンソー | 炭化珪素半導体装置 |
JP5092610B2 (ja) * | 2007-08-01 | 2012-12-05 | トヨタ自動車株式会社 | 半導体装置 |
US7951676B2 (en) * | 2008-08-29 | 2011-05-31 | Infineon Technologies Ag | Semiconductor device and method for the production of a semiconductor device |
JP2010186893A (ja) * | 2009-02-12 | 2010-08-26 | Toshiba Corp | 半導体装置 |
JP5517688B2 (ja) | 2010-03-24 | 2014-06-11 | 三菱電機株式会社 | 半導体装置 |
JP5515922B2 (ja) * | 2010-03-24 | 2014-06-11 | 富士電機株式会社 | 半導体装置 |
JP5656608B2 (ja) * | 2010-12-17 | 2015-01-21 | 三菱電機株式会社 | 半導体装置 |
JP5928771B2 (ja) | 2011-10-03 | 2016-06-01 | オリンパス株式会社 | 基板検査装置および基板検査方法 |
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2013
- 2013-04-05 JP JP2013079847A patent/JP6020317B2/ja active Active
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2014
- 2014-01-08 US US14/150,477 patent/US9105486B2/en active Active
- 2014-02-13 DE DE102014202652.0A patent/DE102014202652B4/de active Active
- 2014-04-02 KR KR1020140039113A patent/KR101534104B1/ko active IP Right Grant
- 2014-04-04 CN CN201410136784.0A patent/CN104103676B/zh active Active
Also Published As
Publication number | Publication date |
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JP2014204007A (ja) | 2014-10-27 |
CN104103676A (zh) | 2014-10-15 |
KR101534104B1 (ko) | 2015-07-06 |
CN104103676B (zh) | 2017-05-17 |
DE102014202652A1 (de) | 2014-10-09 |
US20140299917A1 (en) | 2014-10-09 |
KR20140121348A (ko) | 2014-10-15 |
DE102014202652B4 (de) | 2018-10-11 |
US9105486B2 (en) | 2015-08-11 |
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