JP5876312B2 - Ceramic wiring board, semiconductor element mounting board, semiconductor device - Google Patents

Ceramic wiring board, semiconductor element mounting board, semiconductor device Download PDF

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JP5876312B2
JP5876312B2 JP2012018398A JP2012018398A JP5876312B2 JP 5876312 B2 JP5876312 B2 JP 5876312B2 JP 2012018398 A JP2012018398 A JP 2012018398A JP 2012018398 A JP2012018398 A JP 2012018398A JP 5876312 B2 JP5876312 B2 JP 5876312B2
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insulating substrate
convex portion
ceramic wiring
semiconductor element
wiring board
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JP2013157533A (en
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征憲 岡本
征憲 岡本
崇介 西浦
崇介 西浦
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Kyocera Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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Description

本発明は、高放熱性のセラミック配線基板、半導体素子実装基板および半導体装置に関する。   The present invention relates to a high heat dissipation ceramic wiring substrate, a semiconductor element mounting substrate, and a semiconductor device.

例えば、電気自動車における駆動用モータのコントローラ等のように、電力を制御する電気回路には、MOS−FETやIGBT等に代表されるパワー半導体素子が用いられている。このようなパワー半導体素子は、大電流の制御を行うことから、動作時に比較的多量の熱が発生する。このため、パワー半導体素子を搭載する配線基板としては、従来より、放熱性に優れるとともに、機械的強度が高いという理由からセラミック配線基板が好適なものとされ、さらに放熱性を改善した種々のセラミック配線基板が提案されている(例えば、特許文献1、2を参照)。   For example, a power semiconductor element typified by a MOS-FET, an IGBT, or the like is used in an electric circuit that controls electric power, such as a controller for a drive motor in an electric vehicle. Since such a power semiconductor device controls a large current, a relatively large amount of heat is generated during operation. For this reason, ceramic wiring boards are preferred as wiring boards for mounting power semiconductor elements because of their excellent heat dissipation and high mechanical strength, and various ceramics with improved heat dissipation. A wiring board has been proposed (see, for example, Patent Documents 1 and 2).

例えば、特許文献1には、半導体素子の搭載面の直下に、絶縁基板を厚み方向に貫通する複数のサーマルビアを設けるようにしたセラミック製の回路基板が示されている。   For example, Patent Document 1 discloses a ceramic circuit board in which a plurality of thermal vias penetrating an insulating substrate in the thickness direction are provided immediately below a semiconductor element mounting surface.

なお、このようなセラミック製の回路基板は、コントローラ等の半導体装置に組み込まれる場合には、パワー半導体素子から発生する熱を外部へも逃がすことができるように、アルミニウム等の金属製のケースに接着剤などにより固定された構成となっている。   In addition, when such a ceramic circuit board is incorporated in a semiconductor device such as a controller, the case is made of a metal case such as aluminum so that heat generated from the power semiconductor element can be released to the outside. The structure is fixed by an adhesive or the like.

特開2002−198660号公報JP 2002-198660 A

ところが、特許文献1に開示されたセラミック配線基板は、絶縁基板の内部に多数のサーマルビアを有していることから放熱性に優れているものの、このようなセラミック配線基板をケースに組み込み、半導体素子を動作させたり、温度サイクル試験などの信頼性試験を行うと、加熱冷却の繰り返しにより、回路基板と接着剤との間の熱膨張係数差に起因して、サーマルビア(以下、ビア導体という。)のある付近の絶縁基板と接着剤との間に剥離が発生しやすいという問題があった。   However, although the ceramic wiring substrate disclosed in Patent Document 1 has a large number of thermal vias inside the insulating substrate and is excellent in heat dissipation, such a ceramic wiring substrate is incorporated in a case to provide a semiconductor. When a device is operated or a reliability test such as a temperature cycle test is performed, a thermal via (hereinafter referred to as a via conductor) is caused by a difference in thermal expansion coefficient between the circuit board and the adhesive due to repeated heating and cooling. There was a problem that peeling was likely to occur between the insulating substrate in the vicinity of.

従って、本発明は、ビア導体のある付近の絶縁基板と接着剤との間の剥離の発生を抑制できるセラミック配線基板と、このセラミック配線基板に半導体素子を実装した半導体素子実装基板、および、この半導体素子実装基板を収容した半導体装置を提供することを目的とする。   Accordingly, the present invention provides a ceramic wiring board that can suppress the occurrence of peeling between an insulating substrate in the vicinity of a via conductor and an adhesive, a semiconductor element mounting board in which a semiconductor element is mounted on the ceramic wiring board, and this An object is to provide a semiconductor device containing a semiconductor element mounting substrate.

本発明のセラミック配線基板は、セラミック製の絶縁基板と、該絶縁基板の一方の表面に一体的に形成され、前記絶縁基板と材質を同じくし、前記絶縁基板の表面に設けられた凸部とを備え、前記絶縁基板および前記凸部の内部に、これら前記絶縁基板および前記凸部を厚み方向に貫通するビア導体を有しているとともに、前記凸部は前記絶縁基板よりも気孔率が高く、かつ前記凸部の側面から前記絶縁基板の前記表面にかけての連続箇所が曲面を成していることを特徴とする。
Ceramic wiring substrate of the present invention includes a ceramic insulating substrate is integrally formed on one surface of the insulating substrate, the insulating substrate and also the material and, the convex portion provided on the front surface of the insulating substrate And a via conductor that penetrates through the insulating substrate and the convex portion in the thickness direction, and the convex portion has a porosity higher than that of the insulating substrate. high rather, and wherein the continuous portion from the side of the convex portion to the surface of the insulating substrate forms a curved surface.

本発明の半導体素子実装基板は、上記のセラミック配線基板の表面に半導体素子を搭載してなる半導体素子実装基板であって、前記半導体素子が前記凸部とは反対側の前記絶縁
基板の表面の前記ビア導体の露出した面に搭載されていることを特徴とする。
The semiconductor element mounting board of the present invention is a semiconductor element mounting board in which a semiconductor element is mounted on the surface of the ceramic wiring board, and the semiconductor element is formed on the surface of the insulating substrate opposite to the convex portion. It is mounted on the exposed surface of the via conductor.

本発明の半導体装置は、上記の半導体素子実装基板がケース内に固定されていることを特徴とする。   The semiconductor device of the present invention is characterized in that the semiconductor element mounting substrate is fixed in a case.

本発明によれば、ビア導体のある付近の絶縁基板と接着剤との間の剥離の発生を抑制できるセラミック配線基板と、このセラミック配線基板に半導体素子を実装した半導体素子実装基板、および、この半導体素子実装基板を収容した半導体装置を得ることができる。   According to the present invention, a ceramic wiring substrate that can suppress the occurrence of peeling between an insulating substrate in the vicinity of a via conductor and an adhesive, a semiconductor element mounting substrate in which a semiconductor element is mounted on the ceramic wiring substrate, and this A semiconductor device containing a semiconductor element mounting substrate can be obtained.

本発明のセラミック配線基板の一実施形態を示す断面模式図である。It is a cross-sectional schematic diagram which shows one Embodiment of the ceramic wiring board of this invention. 本発明の半導体装置の一実施形態を示す断面模式図である。It is a cross-sectional schematic diagram which shows one Embodiment of the semiconductor device of this invention. 本実施形態のセラミック配線基板の製造工程を示す模式図である。It is a schematic diagram which shows the manufacturing process of the ceramic wiring board of this embodiment.

図1は本発明のセラミック配線基板の一実施形態を示す断面模式図である。図2は、本発明の半導体装置の一実施形態を示す断面模式図である。   FIG. 1 is a schematic sectional view showing an embodiment of a ceramic wiring board according to the present invention. FIG. 2 is a schematic cross-sectional view showing an embodiment of the semiconductor device of the present invention.

本実施形態のセラミック配線基板Aは、セラミック製の絶縁基板1と、この絶縁基板1の一方の表面1Aに一体的に形成され、絶縁基板1と材質を同じくし、絶縁基板1の表面付近に埋設するように設けられた凸部3とを備えており、これら絶縁基板1および凸部3を厚み方向に貫通するビア導体5を有している。   The ceramic wiring board A of this embodiment is formed integrally with a ceramic insulating substrate 1 and one surface 1A of the insulating substrate 1, and is made of the same material as that of the insulating substrate 1 and near the surface of the insulating substrate 1. And a via conductor 5 penetrating the insulating substrate 1 and the convex portion 3 in the thickness direction.

また、このセラミック配線基板Aでは、凸部3は絶縁基板1よりも気孔率が高くなっている。これによりビア導体5のある付近の絶縁基板(凸部)と接着剤14との間の剥離の発生を抑制できるセラミック配線基板Aを得ることができる。   Further, in this ceramic wiring substrate A, the convex portion 3 has a higher porosity than the insulating substrate 1. Thereby, it is possible to obtain the ceramic wiring board A that can suppress the occurrence of peeling between the insulating substrate (convex portion) in the vicinity of the via conductor 5 and the adhesive 14.

すなわち、本実施形態のセラミック配線基板Aは、図1からわかるように、ビア導体5が凸部3とともに絶縁基板1の表面から突き出ている構成となっている。ビア導体5が凸部3内に埋設されているとはいえ、凸部3が絶縁基板1の表面から突出しているために、ビア導体5が絶縁基板1の表面よりも下側に埋設された状態に比べると、ビア導体5の放熱性を高められるという利点を有する。   That is, as can be seen from FIG. 1, the ceramic wiring board A of the present embodiment has a configuration in which the via conductor 5 protrudes from the surface of the insulating substrate 1 together with the convex portion 3. Although the via conductor 5 is embedded in the protrusion 3, the via conductor 5 is embedded below the surface of the insulating substrate 1 because the protrusion 3 protrudes from the surface of the insulating substrate 1. Compared to the state, there is an advantage that the heat dissipation of the via conductor 5 can be improved.

また、本実施形態のセラミック配線基板Aでは、ビア導体5の突き出た部分は、絶縁基板1と材質が同じである凸部3により囲まれているが、絶縁基板1の表面から突き出た凸部3(図1の破線で囲った領域)の気孔率を絶縁基板1側よりも高くしているために、凸部3は絶縁基板1(例えば、図1の一点鎖線で囲った領域)よりもヤング率が低くなっている。   Further, in the ceramic wiring board A of the present embodiment, the protruding portion of the via conductor 5 is surrounded by the protruding portion 3 made of the same material as the insulating substrate 1, but the protruding portion protruding from the surface of the insulating substrate 1. 3 (region surrounded by a broken line in FIG. 1) has a higher porosity than the insulating substrate 1 side, so that the convex portion 3 is higher than the insulating substrate 1 (for example, a region surrounded by a one-dot chain line in FIG. 1). Young's modulus is low.

セラミック配線基板Aを電気自動車における駆動用モータのコントローラ等として適用するために接着剤14を用いてケースなどの筐体に固定し、半導体素子を動作させたり、温度サイクル試験を行うなど環境の温度を変化させると、接着剤14の熱膨張係数が絶縁基板1の熱膨張係数よりも大きいことに起因して、絶縁基板1の表面において接着剤14は寸法が変化し、これにより絶縁基板1の表面から突き出たビア導体5とそれを囲んでいる凸部3には絶縁基板1の表面に平行な方向に応力が発生する。   In order to apply the ceramic wiring board A as a controller or the like for a drive motor in an electric vehicle, the temperature of the environment is fixed by using an adhesive 14 to a housing such as a case to operate a semiconductor element or perform a temperature cycle test. , The size of the adhesive 14 changes on the surface of the insulating substrate 1 due to the fact that the thermal expansion coefficient of the adhesive 14 is larger than the thermal expansion coefficient of the insulating substrate 1. Stress is generated in the direction parallel to the surface of the insulating substrate 1 in the via conductor 5 protruding from the surface and the convex portion 3 surrounding the via conductor 5.

ところが、本実施形態のセラミック配線基板Aでは、ビア導体5を囲んでいる凸部3の気孔率を絶縁基板1の気孔率よりも高くしてヤング率を低くしているために、絶縁基板1の表面において接着剤14に熱膨張による寸法の変化が発生しても凸部3に付加される応
力を軽減することができ、これによりビア導体5のある付近の絶縁基板(凸部)と接着剤14との間の剥離の発生を抑制できる。
However, in the ceramic wiring board A of the present embodiment, since the porosity of the projections 3 surrounding the via conductor 5 is made higher than the porosity of the insulating board 1 and the Young's modulus is lowered, the insulating board 1 Even if a change in size due to thermal expansion occurs in the adhesive 14 on the surface of the surface, the stress applied to the convex portion 3 can be reduced, and thereby the adhesive 14 is bonded to an insulating substrate (convex portion) near the via conductor 5. Generation | occurrence | production of peeling between the agents 14 can be suppressed.

この場合、絶縁基板1の気孔率を1としたとき、凸部3の気孔率が1.2〜3倍の比で大きいことが望ましい。絶縁基板1の気孔率を1としたとき、凸部3の気孔率が1.2〜3倍の比であると、凸部3付近のクラックや凸部の先端部の欠けの発生し難い強固なセラミック配線基板Aを得ることができる。   In this case, when the porosity of the insulating substrate 1 is 1, it is desirable that the porosity of the convex portion 3 is large at a ratio of 1.2 to 3 times. When the porosity of the insulating substrate 1 is 1, and the porosity of the convex portion 3 is a ratio of 1.2 to 3 times, cracks in the vicinity of the convex portion 3 and chipping at the tip of the convex portion are difficult to occur. A ceramic wiring board A can be obtained.

なお、絶縁基板1の気孔率は5%以下であるのがよく、凸部3の気孔率は16%以下であるのが好ましい。絶縁基板1の気孔率は5%以下であるとセラミック配線基板Aの機械的強度を高めることができる。また、凸部3の気孔率が16%以下であると、凸部3をケース等に当てたときにも欠けなど発生を防止できる。   Note that the porosity of the insulating substrate 1 is preferably 5% or less, and the porosity of the convex portion 3 is preferably 16% or less. When the porosity of the insulating substrate 1 is 5% or less, the mechanical strength of the ceramic wiring substrate A can be increased. Moreover, when the porosity of the convex part 3 is 16% or less, it is possible to prevent the occurrence of chipping or the like even when the convex part 3 is applied to a case or the like.

ここで、気孔率に差を有するというのは、以下の方法により求められる気孔率が0.2%以上異なる場合をいう。絶縁基板1および凸部3の気孔率は、断面研磨した試料の電子顕微鏡写真を用いて、まず、写真上に認められる気孔の総面積を画像解析により求め、次に、その気孔の総面積を写真の面積で除して求めた後、凸部3の気孔率を絶縁基板の気孔率で除して求める。この場合、気孔は最大径が0.1μm以上であるものを選択することとし、それ以下の気孔は除くようにする。   Here, having a difference in porosity means a case where the porosity determined by the following method differs by 0.2% or more. The porosity of the insulating substrate 1 and the convex portion 3 is obtained by first obtaining the total area of pores found on the photograph by image analysis using an electron micrograph of the cross-section polished sample, and then calculating the total area of the pores. After obtaining by dividing by the area of the photograph, it is obtained by dividing the porosity of the convex portion 3 by the porosity of the insulating substrate. In this case, pores having a maximum diameter of 0.1 μm or more are selected, and pores smaller than that are excluded.

また、このようなセラミック配線基板Aでは、絶縁基板1の表面から突出したビア導体5が絶縁基板1と同じ材料に取り囲まれていることから、ビア導体5の根元の部分と絶縁基板1との間の界面に隙間の無い構造となっている。このためビア導体5の根元の部分と絶縁基板1との間の界面に水分等が浸入し難くなり、絶縁不良等の不具合の発生を防止することが可能になる。   Further, in such a ceramic wiring substrate A, the via conductor 5 protruding from the surface of the insulating substrate 1 is surrounded by the same material as the insulating substrate 1, so that the base portion of the via conductor 5 and the insulating substrate 1 The structure has no gap at the interface between them. For this reason, it becomes difficult for moisture or the like to enter the interface between the base portion of the via conductor 5 and the insulating substrate 1, and it is possible to prevent the occurrence of defects such as defective insulation.

なお、セラミック配線基板Aとして、下記に示す半導体素子実装基板Bのような高機能のセラミック配線基板Aを形成する場合には、絶縁基板1として、複数のセラミック絶縁層1a〜1eを積層したものを適用することが望ましい。この場合には、セラミック絶縁層1a〜1eの層間にパターン配線層やグランド層等の導体層2が設けられる。   When a ceramic wiring board A having a high function such as the semiconductor element mounting board B shown below is formed as the ceramic wiring board A, a plurality of ceramic insulating layers 1a to 1e are laminated as the insulating board 1. It is desirable to apply. In this case, a conductor layer 2 such as a pattern wiring layer or a ground layer is provided between the ceramic insulating layers 1a to 1e.

セラミック配線基板が、複数のセラミック絶縁層1a〜1eにより構成される絶縁基板1を有する場合には、図1に示すように、符号1eのセラミック絶縁層1a〜1eの表面側を向いた面に凸部3を有するものとなる。   When the ceramic wiring board has an insulating substrate 1 composed of a plurality of ceramic insulating layers 1a to 1e, as shown in FIG. 1, the surface facing the surface side of the ceramic insulating layers 1a to 1e denoted by reference numeral 1e. It has the convex part 3.

ここで、凸部3が絶縁基板1の表面に一体的に形成されるというのは、絶縁基板1と凸部3、またはセラミック絶縁層1eと凸部3とが同時焼成されて焼結されたものという意味である。   Here, the convex portion 3 is integrally formed on the surface of the insulating substrate 1 because the insulating substrate 1 and the convex portion 3 or the ceramic insulating layer 1e and the convex portion 3 are simultaneously fired and sintered. It means stuff.

絶縁基板1と材質を同じくするというのは、絶縁基板1および凸部3に含まれる主成分のセラミック成分が同じであるという意味である。ここで、主成分とは、絶縁基板1またはセラミック絶縁層1a〜1eに含まれるセラミック成分の含有量が80質量%以上である場合をいう。   The same material as that of the insulating substrate 1 means that the ceramic components of the main components contained in the insulating substrate 1 and the convex portion 3 are the same. Here, the main component refers to a case where the content of the ceramic component contained in the insulating substrate 1 or the ceramic insulating layers 1a to 1e is 80% by mass or more.

なお、絶縁基板1、セラミック絶縁層1a〜1eおよび凸部3は、高い熱伝導性を有し、かつ高強度であるという点でアルミナを主成分とし、これにSi、MnおよびMgなどの添加剤を含有するものが望ましい。   The insulating substrate 1, the ceramic insulating layers 1a to 1e, and the protrusions 3 are mainly composed of alumina in terms of having high thermal conductivity and high strength, and addition of Si, Mn, Mg, and the like thereto. Those containing an agent are desirable.

また、ビア導体5が、絶縁基板1および凸部3の内部にて、これら絶縁基板1および凸部3を厚み方向に貫通するとは、図1に示すような絶縁基板1の表面に対して垂直な方向
にビア導体5が配置されているものばかりではなく、絶縁基板1および凸部3の内部において、ビア導体5が電気的に接続され、熱伝導性を確保できる形状であれば、多少、曲がっている場合や層間においてずれているものまで含む意である。
Further, the fact that the via conductor 5 penetrates the insulating substrate 1 and the convex portion 3 in the thickness direction inside the insulating substrate 1 and the convex portion 3 is perpendicular to the surface of the insulating substrate 1 as shown in FIG. As long as the via conductor 5 is electrically connected to the inside of the insulating substrate 1 and the convex portion 3 and the thermal conductivity can be secured, Including the case where it is bent and the one that is shifted between layers.

ここで、ビア導体5、導体層2の材料としては、絶縁基板1との同時焼成を可能とする融点を有するものが好適なものとされ、絶縁基板1、凸部3に、例えば、アルミナを主成分とする材料を適用する場合には、タングステンおよびモリブデンのいずれか1種に銅または銀を含ませたものが望ましい。   Here, the material of the via conductor 5 and the conductor layer 2 is preferably a material having a melting point that enables simultaneous firing with the insulating substrate 1, and the insulating substrate 1 and the protrusion 3 are made of, for example, alumina. In the case where a material having a main component is applied, it is desirable that one of tungsten and molybdenum contains copper or silver.

なお、絶縁基板1の表面に形成された導体層2(凸部3に露出したビア導体3の表面にも導体層2が形成される場合も含む。)については、導体層2の酸化や腐食を抑え、ハンダによる接合性を向上できるという理由から、それらの表面にはニッケルや金のめっき膜をこの順に形成しておくことが望ましい。   For the conductor layer 2 formed on the surface of the insulating substrate 1 (including the case where the conductor layer 2 is also formed on the surface of the via conductor 3 exposed to the convex portion 3), the conductor layer 2 is oxidized or corroded. Therefore, it is desirable to form a plating film of nickel or gold in this order on the surfaces thereof because the solderability can be suppressed and the bondability by solder can be improved.

本実施形態のセラミック配線基板Aでは、絶縁基板1と凸部3の端部の連続箇所3bは、テーパー状で凸部3の周囲から絶縁基板1の表面へなだらかに連なる曲面を有している(以下、アール形状という場合がある。)ことが望ましい。凸部3の周囲から絶縁基板1の表面へなだらかに連なる曲面がない場合、実装工程等での基板取り扱い時や、ケース11への基板組み付け時に突起部に応力がかかった際、応力は絶縁基板1と凸部3の垂直な接合部に集中してしまう。その結果、絶縁基板1と凸部3との交点付近を起点としたクラックの発生する恐れがある。凸部3の周囲から絶縁基板1の表面へなだらかに連なる曲面とすることにより、実装工程等に突起部に加わった応力に対する抗力が増加し、絶縁基板1と凸部との交点付近起点とするクラックの発生や、凸部の欠け等を防止することができる。この場合、凸部3の周囲から絶縁基板1の表面へなだらかに連なる曲面の半径は20〜100μmであることが望ましい。20μm未満ではクラック防止効果が十分ではなく、クラックや欠けが発生する可能性があり、100μmを超えると隣のビアやパターン等と干渉し、パターン設計の自由度が低下するからである。また、絶縁基板1と凸部3の端部の連続箇所3bをアール形状にすると、絶縁基板1と凸部3の端部の連続箇所3b付近への接着剤14の未充填による空隙の発生を抑えることができる。   In the ceramic wiring board A of the present embodiment, the continuous portion 3b between the end portions of the insulating substrate 1 and the convex portion 3 is tapered and has a curved surface that extends smoothly from the periphery of the convex portion 3 to the surface of the insulating substrate 1. (Hereinafter, it may be referred to as a round shape.) When there is no gently curved surface from the periphery of the convex portion 3 to the surface of the insulating substrate 1, the stress is applied to the insulating substrate when a stress is applied to the protruding portion when handling the substrate in the mounting process or when assembling the substrate to the case 11. 1 and the convex portion 3 are concentrated at the vertical joint portion. As a result, there is a risk of cracks starting from the vicinity of the intersection between the insulating substrate 1 and the protrusion 3. By forming a curved surface that is smoothly connected from the periphery of the convex portion 3 to the surface of the insulating substrate 1, the resistance against stress applied to the protruding portion in the mounting process or the like is increased, and the starting point is near the intersection of the insulating substrate 1 and the convex portion. Generation of cracks, chipping of convex portions, etc. can be prevented. In this case, it is desirable that the radius of the curved surface that extends smoothly from the periphery of the convex portion 3 to the surface of the insulating substrate 1 is 20 to 100 μm. If the thickness is less than 20 μm, the crack prevention effect is not sufficient, and cracks and chips may occur. If the thickness exceeds 100 μm, it interferes with adjacent vias and patterns, and the degree of freedom in pattern design decreases. Moreover, if the continuous part 3b of the edge part of the insulated substrate 1 and the convex part 3 is made into a round shape, generation | occurrence | production of the space | gap by the unfilling of the adhesive agent 14 to the continuous part 3b vicinity of the insulating substrate 1 and the edge part of the convex part 3 will be produced. Can be suppressed.

本実施形態の半導体素子実装基板Bは、上記のセラミック配線基板Aの表面に半導体素子13が搭載されたものであり、半導体素子13が凸部3とは反対側の絶縁基板1の表面のビア導体5の露出した面に搭載されている構成を有している。本実施形態の構成によれば、絶縁基板1および凸部3を厚み方向に貫通するビア導体5の直上にパワー半導体素子等の機能素子を搭載でき、しかも、そのビア導体5がサーマルビアとして優れた放熱性を有することから、放熱性に優れた半導体素子実装基板Bを得ることができる。   The semiconductor element mounting board B of the present embodiment is one in which the semiconductor element 13 is mounted on the surface of the ceramic wiring board A, and the semiconductor element 13 is a via on the surface of the insulating substrate 1 on the side opposite to the convex portion 3. It has a configuration that is mounted on the exposed surface of the conductor 5. According to the configuration of the present embodiment, a functional element such as a power semiconductor element can be mounted immediately above the via conductor 5 that penetrates the insulating substrate 1 and the protrusion 3 in the thickness direction, and the via conductor 5 is excellent as a thermal via. Therefore, the semiconductor element mounting substrate B having excellent heat dissipation can be obtained.

また、図2に示すように、本実施形態の半導体装置Cは、上記の半導体素子実装基板Bがケース11内に固定されているものである。本実施形態の構成によれば、半導体素子実装基板Bを構成するセラミック配線基板Aのビア導体5をケース11内に直接接触させて固定することが可能となるために、半導体素子13から発生する熱をセラミック配線基板Aやケース11を介して効率良く外部へ逃がすことができる。   In addition, as shown in FIG. 2, the semiconductor device C of the present embodiment has the semiconductor element mounting substrate B fixed in the case 11. According to the configuration of the present embodiment, the via conductor 5 of the ceramic wiring board A constituting the semiconductor element mounting board B can be directly contacted and fixed in the case 11, and thus is generated from the semiconductor element 13. Heat can be efficiently released to the outside through the ceramic wiring board A and the case 11.

すなわち、本実施形態の半導体装置Cでは、ビア導体5がセラミック配線基板Aの表面に突出した凸部3の表面に現れていることから、セラミック配線基板Aをケース11に接着剤14を介して固定する場合においても、接着剤14が凸部3の表面3aと部材との間に残ることなく、凸部3の表面3aに露出したビア導体5とケース11などの部材とを直接接着させることができる。また、ケース11などの部材が金属であれば、ビア導体5を接地(アース)端子として共用することも可能となり、ワイヤーボンディング等を用いてセラミック配線基板A上の表面配線層と部材との間で、別途、接地端子を取ることを必要
としない構造にすることもできる。
That is, in the semiconductor device C of the present embodiment, the via conductor 5 appears on the surface of the convex portion 3 protruding from the surface of the ceramic wiring board A, so the ceramic wiring board A is attached to the case 11 via the adhesive 14. Even in the case of fixing, the adhesive 14 does not remain between the surface 3a of the convex portion 3 and the member, and the via conductor 5 exposed on the surface 3a of the convex portion 3 and the member such as the case 11 are directly bonded. Can do. In addition, if the member such as the case 11 is a metal, the via conductor 5 can be shared as a ground (ground) terminal. Between the surface wiring layer on the ceramic wiring board A and the member using wire bonding or the like. Thus, it is possible to make a structure that does not require a separate ground terminal.

この場合、絶縁基板1の表面からの凸部3の高さhは、セラミック配線基板Aの凸部3の表面とケース11などの部材との接着力を確保しつつ、放熱性を高められるという理由から50〜300μmであることが望ましい。なお、凸部3の高さhが50μmよりも低い場合には、セラミック配線基板Aのケースなどの部材との接着性が低下するおそれがあり、一方、凸部3の高さhが300μmを超える場合には、ビア導体5の長さが長くなるために、ビア導体5自体の熱抵抗が増加することに起因して放熱性が低下する場合がある。   In this case, the height h of the convex portion 3 from the surface of the insulating substrate 1 can improve heat dissipation while ensuring the adhesive force between the surface of the convex portion 3 of the ceramic wiring board A and the member such as the case 11. It is desirable that it is 50-300 micrometers for a reason. In addition, when the height h of the convex part 3 is lower than 50 μm, the adhesiveness with a member such as a case of the ceramic wiring board A may be lowered, while the height h of the convex part 3 is 300 μm. When exceeding, since the length of the via conductor 5 becomes long, the heat dissipation may decrease due to an increase in the thermal resistance of the via conductor 5 itself.

次に、本発明のセラミック配線基板、半導体素子実装基板および半導体装置の製造方法について説明する。図3は、本実施形態のセラミック配線基板の製造工程を示す模式図である。   Next, a method for manufacturing a ceramic wiring board, a semiconductor element mounting board, and a semiconductor device according to the present invention will be described. FIG. 3 is a schematic view showing a manufacturing process of the ceramic wiring board of the present embodiment.

まず、絶縁基板1を形成するためのシート状成形体21を作製する。その組成は、Al粉末を主成分とし、これにSiO粉末、Mn粉末およびMgO粉末を所定量添加した混合粉末を用いる。なお、絶縁基板1を着色させる場合にはMoO粉末を添加する場合がある。 First, a sheet-like molded body 21 for forming the insulating substrate 1 is produced. The composition used is a mixed powder in which Al 2 O 3 powder is a main component and a predetermined amount of SiO 2 powder, Mn 2 O 3 powder and MgO powder is added thereto. Incidentally, in the case of coloring the insulating substrate 1 is sometimes added MoO 3 powder.

次に、この混合粉末に対して、有機バインダを溶媒とともに添加してスラリーや混練物を調製した後、これをプレス法、ドクターブレード法、圧延法、射出法などの成形方法を用いてシート状成形体21を形成する。   Next, an organic binder is added to the mixed powder together with a solvent to prepare a slurry or a kneaded product, which is then formed into a sheet shape using a molding method such as a press method, a doctor blade method, a rolling method, or an injection method. Formed body 21 is formed.

次に、このシート状成形体21に貫通孔を形成し、次いで、この貫通孔内にスクリーン印刷法やディスペンサ等を用いて導体ペーストを注入してビア導体22を形成し、さらに、必要に応じて、この貫通孔の表面を含むシート状成形体21の表面の特定の箇所に導体層2となる導体パターン27を形成する。次に、金型を用いたプレス成形を行って凸部25を有するシート状成形体21を形成する。   Next, a through hole is formed in the sheet-like molded body 21, and then a conductor paste is injected into the through hole using a screen printing method, a dispenser, or the like to form a via conductor 22, and further if necessary. Then, the conductor pattern 27 to be the conductor layer 2 is formed at a specific location on the surface of the sheet-like molded body 21 including the surface of the through hole. Next, press molding using a mold is performed to form the sheet-like molded body 21 having the convex portions 25.

本実施形態のセラミック配線基板Aを構成する絶縁基板1は凸部3を有するものであるが、このような凸部25を有するシート状成形体21を作製する場合には、成形用の樹脂として、高分子材料からなるバインダと結晶性の樹脂とを混合したものを用い、これらの有機樹脂を添加した混練物を、次に、金型を用いたプレス成形を行って凸部25を有するシート状成形体21を形成するのがよい。   The insulating substrate 1 constituting the ceramic wiring board A of the present embodiment has the convex portion 3, but when producing the sheet-like molded body 21 having such a convex portion 25, as the molding resin Then, using a mixture of a binder made of a polymer material and a crystalline resin, a kneaded product to which these organic resins are added is then subjected to press molding using a mold, and a sheet having convex portions 25 The shaped molded body 21 is preferably formed.

なお、凸部25の周囲からシート状成形体21の表面へなだらかに連なる曲面を有する形状を有する構造のシート状成形体21を作製する場合には、図3(b)に示すような専用の金型を用いる。   In addition, when producing the sheet-like molded body 21 having a structure having a curved surface that gently leads from the periphery of the convex portion 25 to the surface of the sheet-like molded body 21, a dedicated one as shown in FIG. Use a mold.

次に、貫通孔に導体ペーストを充填してビア導体22を形成し、かつ表面に導体パターン27を形成したシート状成形体21を所定の温度条件で焼成することによりセラミック配線基板Aを作製する。   Next, the ceramic wiring board A is manufactured by firing the sheet-like molded body 21 in which the through-holes are filled with the conductive paste to form the via conductors 22 and the conductive pattern 27 is formed on the surface at a predetermined temperature condition. .

本実施形態のセラミック配線基板Aを作製する場合、プレス成形の工程において、シート状成形体21は、金型の凸部25によって加圧された部分と、凸部25の周囲の部分とで、加圧処理されたシート状成形体21の密度が異なるように成形する。   In the case of producing the ceramic wiring board A of the present embodiment, in the press molding step, the sheet-like molded body 21 includes a portion pressed by the convex portion 25 of the mold and a portion around the convex portion 25. It shape | molds so that the density of the press-processed sheet-like molded object 21 may differ.

すなわち、図3(b)に示すように、金型の凸部25の周囲の部分で加圧された領域28(凸部3となる)は、凸部25の部分で加圧された領域29(凸部3以外の絶縁基板1の表面)に比較してシート状成形体21の厚みの変化が小さいことから、領域28は領域
29に比較してシート状成形体21における生密度が低くなる。つまり、領域29は領域28よりも生密度が高くなっている。
That is, as shown in FIG. 3B, the region 28 (becomes the convex portion 3) that is pressurized in the portion around the convex portion 25 of the mold is the region 29 that is pressurized in the convex portion 25 portion. Since the change in the thickness of the sheet-like molded body 21 is small compared to (the surface of the insulating substrate 1 other than the convex portion 3), the green density in the sheet-shaped molded body 21 is lower in the region 28 than in the region 29. . That is, the density of the region 29 is higher than that of the region 28.

次に、加圧処理されたシート状成形体21を所定の温度条件で焼成する。こうして得られたセラミック配線基板Aは、加圧処理されたシート状成形体21における領域28(低密度)と領域29(領域28よりも高密度)のそれぞれの生密度に依存して焼成後において焼結状態が異なってくる。   Next, the pressure-treated sheet-like molded body 21 is fired under a predetermined temperature condition. The ceramic wiring board A obtained in this way is subjected to firing depending on the green density of the region 28 (low density) and the region 29 (higher density than the region 28) in the pressed sheet-like molded body 21. The sintering state is different.

生密度が低くなっている領域28は、加圧処理されたシート状成形体21の状態で、領域29よりもセラミック粉末の接し方が弱いために、焼成過程においてもセラミック粉末の成分の拡散が領域29のセラミック粉末に比べて遅く、このため、この領域28のセラミック粉末は領域29のセラミック粉末よりも粒成長が遅くなる。   The area 28 where the green density is low is a state of the sheet-like molded body 21 that has been subjected to pressure treatment, and since the manner of contact with the ceramic powder is weaker than that of the area 29, diffusion of the components of the ceramic powder also occurs during the firing process. The ceramic powder in region 29 is slower than the ceramic powder in region 29, so that the ceramic powder in region 28 has a slower grain growth than the ceramic powder in region 29.

一方、生密度の高い領域29は、加圧処理されたシート状成形体21の状態で領域28の部分に比較してセラミック粉末が強固に接していることから、焼成過程においてセラミック粉末の成分が拡散しやすく、このためセラミック粉末は粒成長しやすくなる。   On the other hand, the high-density region 29 is in contact with the ceramic powder in the state of the pressure-processed sheet-like molded body 21 as compared with the region 28. It is easy to diffuse and, therefore, the ceramic powder tends to grow.

その結果、加圧処理されたシート状成形体21を高密度になるように焼結させても、加圧処理されたシート状成形体21の密度の低い方の領域28はセラミック粉末の粒成長の度合いが小さいために、気孔率が高くなり、一方、加圧処理されたシート状成形体21の密度の高い方の領域29はセラミック粉末の粒成長の度合いが大きいために、気孔率を低くすることができる。なお、凸部3の気孔率を変化させる場合には、例えば、金型の凹部の深さを変えてプレス成形を行う。   As a result, even if the pressure-treated sheet-like molded body 21 is sintered to a high density, the lower-density region 28 of the pressure-treated sheet-like molded body 21 has grain growth of ceramic powder. The porosity of the sheet-shaped formed body 21 that has been subjected to pressure treatment is high, and the porosity of the region 29 in the higher density of the pressed sheet-like molded body 21 is low because the degree of grain growth of the ceramic powder is large. can do. In addition, when changing the porosity of the convex part 3, for example, it press-molds by changing the depth of the recessed part of a metal mold | die.

こうして、絶縁基板1と凸部3との間で気孔率が異なり、凸部3における気孔率が絶縁基板1の気孔率よりも高いセラミック配線基板Aを得ることができる。   Thus, the ceramic wiring board A can be obtained in which the porosity is different between the insulating substrate 1 and the convex portion 3 and the porosity in the convex portion 3 is higher than the porosity of the insulating substrate 1.

なお、セラミック絶縁層1a〜1dとなるシート状成形体21を作製する場合には、混合粉末に有機バインダと溶媒とを加えて調製したスラリーをドクターブレード法などの成形方法を用いて、別途作製する。シート状成形体に対しても、シート状成形体21と同様の方法により貫通孔25に導体ペーストを充填し、その表面に導体パターン27を形成する。導体ペーストとしては、タングステンおよびモリブデンのいずれか1種に銅または銀を含ませたものに有機バインダを混合したものを用いるのがよい。   In addition, when manufacturing the sheet-like molded object 21 used as the ceramic insulating layers 1a-1d, the slurry prepared by adding an organic binder and a solvent to mixed powder is separately produced using shaping methods, such as a doctor blade method. To do. Also for the sheet-like molded body, a conductive paste is filled in the through holes 25 by the same method as that for the sheet-like molded body 21, and a conductor pattern 27 is formed on the surface. As the conductive paste, it is preferable to use an organic binder mixed with copper or silver contained in any one of tungsten and molybdenum.

その後、焼成して得られたセラミック配線基板A上の導体層2の表面に必要に応じてめき膜を形成する。   Thereafter, a plating film is formed on the surface of the conductor layer 2 on the ceramic wiring board A obtained by firing, if necessary.

次に、セラミック配線基板Aの導体層2の表面に半導体素子13を実装して本実施形態の半導体素子実装基板Bを作製する。この場合、半導体素子実装基板Bの所望とする機能性に応じてコンデンサなどの受動部品やコイル等を実装することもある。   Next, the semiconductor element 13 is mounted on the surface of the conductor layer 2 of the ceramic wiring board A to produce the semiconductor element mounting board B of the present embodiment. In this case, a passive component such as a capacitor, a coil, or the like may be mounted according to the desired functionality of the semiconductor element mounting board B.

次に、作製したセラミック配線基板Aまたは半導体素子実装基板Bを、例えば、アルミニウム製のケース11内に接着剤14を介して固定する。この場合、本実施形態においては、セラミック配線基板Aをケース11に接着剤14を介して固定する場合においても、接着剤14が凸部3の表面3aとケース11との間に残ることなく、凸部3の表面3aに露出したビア導体5とケース11などの部材とを直接接着させることができる。こうして、放熱性に優れた半導体装置Cを得ることができる。   Next, the produced ceramic wiring board A or semiconductor element mounting board B is fixed, for example, in an aluminum case 11 with an adhesive 14. In this case, in the present embodiment, even when the ceramic wiring board A is fixed to the case 11 via the adhesive 14, the adhesive 14 does not remain between the surface 3a of the convex portion 3 and the case 11, The via conductor 5 exposed on the surface 3a of the convex portion 3 and the member such as the case 11 can be directly bonded. In this way, the semiconductor device C excellent in heat dissipation can be obtained.

Al粉末90質量%に対して、SiO粉末を4質量%、Mn粉末を4質
量%、MgO粉末を1.5質量%、MoO粉末を0.5質量%の割合で混合した後、さらに、有機バインダーとしてアクリル系バインダーを19質量%、ワックスとしてパラフィンワックスを3質量%、有機溶媒としてトルエンを混合してスラリーを調製した後、ドクターブレード法にて平均厚みが185μmシート状成形体を作製した。
A ratio of 4% by mass of SiO 2 powder, 4% by mass of Mn 2 O 3 powder, 1.5% by mass of MgO powder and 0.5% by mass of MoO 3 powder with respect to 90% by mass of Al 2 O 3 powder. In addition, a slurry was prepared by mixing 19% by weight of an acrylic binder as an organic binder, 3% by weight of paraffin wax as a wax, and toluene as an organic solvent, and an average thickness of 185 μm by a doctor blade method. A sheet-like molded body was produced.

次に、このシート状成形体に対してレーザー加工によって打抜き加工を施し、直径が175μmの貫通孔を形成した。   Next, this sheet-like molded body was punched by laser processing to form a through-hole having a diameter of 175 μm.

次に、モリブデン粉末を95質量%と、アルミナ粉末を5質量%とを混合した粉末に対し、アクリル系バインダーとアセトンを溶媒として混合し、ビア導体用の導体ペーストを調製し、このビア導体用の導体ペーストをスクリーン印刷法によって上記のシート状成形体の貫通孔内に充填した。   Next, 95 mass% of molybdenum powder and 5 mass% of alumina powder are mixed with an acrylic binder and acetone as a solvent to prepare a conductor paste for via conductor. The conductor paste was filled into the through-holes of the sheet-like molded body by a screen printing method.

次に、銅粉末を35質量%と、タングステン粉末を65質量%とを混合した粉末に対し、アクリル系バインダーとアセトンを溶媒として混合し、導体層用の導体ペーストを調製し、ビア導体用の導体ペーストを充填したシート状成形体の表面にスクリーン印刷法によって導体層となる導体パターンを形成した。   Next, an acrylic binder and acetone are mixed as a solvent to a powder obtained by mixing 35% by mass of copper powder and 65% by mass of tungsten powder to prepare a conductor paste for a conductor layer. A conductor pattern serving as a conductor layer was formed on the surface of the sheet-like molded body filled with the conductor paste by a screen printing method.

得られた成形体に対し、金型による加熱プレスを行い、凸部の形状を形成した。この時、金型の凹部の深さを変えることにより絶縁基板および凸部の気孔率を変化させた。   The resulting molded body was heated and pressed with a mold to form a convex shape. At this time, the porosity of the insulating substrate and the convex portion was changed by changing the depth of the concave portion of the mold.

次に、露点+25℃の窒素水素混合雰囲気にて脱脂を行なった後、引き続き、1000℃から焼成温度の1350℃までを50℃/時間の昇温速度で昇温し、焼成温度にて露点+25℃の窒素水素混合雰囲気にて1時間保持した後、1000℃までを100℃/時間の降温速度で冷却した。   Next, after degreasing in a nitrogen-hydrogen mixed atmosphere at a dew point of + 25 ° C., the temperature was raised from 1000 ° C. to a firing temperature of 1350 ° C. at a heating rate of 50 ° C./hour, and the dew point +25 at the firing temperature. After maintaining for 1 hour in a nitrogen-hydrogen mixed atmosphere at 0 ° C., the temperature was lowered to 1000 ° C. at a temperature decreasing rate of 100 ° C./hour.

その後、得られたセラミック配線基板の導体層の表面に平均厚みが4.5μmの無電解ニッケルめっき膜と平均厚みが0.05μmの無電解Auめっき膜を形成した。   Thereafter, an electroless nickel plating film having an average thickness of 4.5 μm and an electroless Au plating film having an average thickness of 0.05 μm were formed on the surface of the conductor layer of the obtained ceramic wiring board.

このようにして得られたセラミック配線基板を各2枚準備し、1枚をケースを模擬したアルミニウム板に組み付けた。まずアルミニウム板に対し、セラミック配線基板の凸部を避けるようにエポキシ系の接着剤を塗布した。この試料サンプルを用いて、−40〜150℃、4000サイクルの熱衝撃評価を実施した。その後、セラミック配線基板を取り外し、凸部と接着剤との界面の剥離の有無を40倍の顕微鏡にて観察した。   Two ceramic wiring boards thus obtained were prepared, and one was assembled to an aluminum plate simulating a case. First, an epoxy adhesive was applied to the aluminum plate so as to avoid the convex portions of the ceramic wiring board. Using this sample sample, thermal shock evaluation was performed at −40 to 150 ° C. and 4000 cycles. Thereafter, the ceramic wiring board was removed, and the presence or absence of peeling at the interface between the convex portion and the adhesive was observed with a 40 × microscope.

次に、2枚目は、ケースに対し、セラミック配線基板が傾いた状態で圧力がかかる場合を想定し、アルミニウム板に対して10度の角度で、100Nの強さでセラミック配線基板を押し付けた。その後、セラミック配線基板を取り外し、凸部のクラック、欠けの有無を40倍の顕微鏡にて観察した。   Next, for the second sheet, assuming that pressure is applied to the case while the ceramic wiring board is inclined, the ceramic wiring board is pressed at an angle of 10 degrees with respect to the aluminum plate with a strength of 100 N. . Then, the ceramic wiring board was removed, and the presence or absence of cracks and chips on the convex portions was observed with a 40 × microscope.

絶縁基板および凸部の気孔率は、断面研磨した試料の電子顕微鏡写真を用いて、まず、写真上に認められる気孔の総面積を画像解析により求め、次に、その気孔の総面積を写真の面積で除して求めた後、凸部の気孔率を絶縁基板の気孔率で除して求めた。この場合、気孔は最大径が0.1μm以上であるものを選択することとし、それ以下の気孔は除くようにした。   The porosity of the insulating substrate and the convex portion is determined by image analysis of the total area of pores found on the photograph, using an electron micrograph of the cross-sectionally polished sample, and then the total area of the pores is determined from the photograph. After dividing by the area, the porosity of the convex portion was divided by the porosity of the insulating substrate. In this case, pores having a maximum diameter of 0.1 μm or more were selected, and pores smaller than that were excluded.

比較例として、シート状成形体の全体を、上記した凸部を有する金型を用いた成形時の凸部の領域が受ける圧力と同じ圧力で加圧した後(試料No.2に用いた金型)、焼成し、ビア導体および凸部となる領域を除く部分を切削加工して、絶縁基板の表面に凸部が埋設した構造のセラミック配線基板を作製した。結果を表1に示す。   As a comparative example, after pressurizing the entire sheet-like molded body with the same pressure as the pressure received by the convex region during molding using the mold having the convex portion described above (the gold used for sample No. 2) Mold), firing, and cutting a portion excluding a region to be a via conductor and a convex portion, thereby producing a ceramic wiring board having a structure in which the convex portion is embedded in the surface of the insulating substrate. The results are shown in Table 1.

表1から明らかなように、試料No.2〜6では、ビア導体のある付近の絶縁基板と接着剤との間の剥離が無かった。また、試料No.2〜5では、アルミニウム板に対して10度の角度で、100Nの強さでセラミック配線基板を押し付けた後にも、セラミック配線基板の凸部に欠けが認められなかった。   As is clear from Table 1, sample No. In Nos. 2 to 6, there was no peeling between the insulating substrate in the vicinity of the via conductor and the adhesive. Sample No. In Nos. 2 to 5, no chipping was observed on the convex portions of the ceramic wiring board even after the ceramic wiring board was pressed at an angle of 10 degrees with respect to the aluminum plate at a strength of 100 N.

これに対し、比較例である試料No.1では、ビア導体のある付近の絶縁基板と接着剤との間の剥離が見られた。   On the other hand, sample No. which is a comparative example. In No. 1, peeling between the insulating substrate in the vicinity of the via conductor and the adhesive was observed.

1・・・・・・・絶縁基板
1a〜1e・・・セラミック絶縁層
2・・・・・・・導体層
3、25・・・・凸部
5・・・・・・・ビア導体
11・・・・・・ケース
13・・・・・・半導体素子
14・・・・・・接着剤
21・・・・・・シート状成形体
23・・・・・・貫通孔
27・・・・・・導体パターン
A・・・・・・・セラミック配線基板
B・・・・・・・半導体素子実装基板
C・・・・・・・半導体装置
1... Insulating substrates 1 a to 1 e... Ceramic insulating layer 2... Conductor layers 3 and 25... Projection 5. ... Case 13 ... Semiconductor element 14 ... Adhesive 21 ... Sheet-like molded body 23 ... Through hole 27 ...・ Conductor pattern A ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Ceramic wiring board B ・ ・ ・ ・ ・ ・ Semiconductor element mounting board C ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ Semiconductor device

Claims (4)

セラミック製の絶縁基板と、該絶縁基板の一方の表面に一体的に形成され、前記絶縁基板と材質を同じくし、前記絶縁基板の表面に設けられた凸部とを備え、前記絶縁基板および前記凸部の内部に、これら前記絶縁基板および前記凸部を厚み方向に貫通するビア導体を有しているとともに、前記凸部は前記絶縁基板よりも気孔率が高く、かつ前記凸部の側面から前記絶縁基板の前記表面にかけての連続箇所が曲面を成していることを特徴とするセラミック配線基板。 And ceramic insulating substrate is integrally formed on one surface of the insulating substrate, the insulating substrate and material and also, a protrusion provided on the front surface of the insulating substrate, the insulating substrate and inside of the convex portion, the insulating substrate and the convex portion together with and a via conductor extending through in the thickness direction, the convex portion is rather porosity higher than that of the insulating substrate, and the convex portion thereof A ceramic wiring substrate , wherein a continuous portion from a side surface to the surface of the insulating substrate forms a curved surface . 前記絶縁基板の気孔率を1としたとき、前記凸部の気孔率が1.2〜3であることを特徴とする請求項1に記載のセラミック配線基板。   2. The ceramic wiring board according to claim 1, wherein the porosity of the convex portion is 1.2 to 3 when the porosity of the insulating substrate is 1. 3. 請求項1または2に記載のセラミック配線基板の表面に半導体素子を搭載してなる半導体素子実装基板であって、前記半導体素子が前記凸部とは反対側の前記絶縁基板の表面の前記ビア導体の露出した面に搭載されていることを特徴とする半導体素子実装基板。   3. A semiconductor element mounting board in which a semiconductor element is mounted on the surface of the ceramic wiring board according to claim 1 or 2, wherein the semiconductor element is the via conductor on the surface of the insulating substrate opposite to the convex portion. A semiconductor element mounting board, which is mounted on an exposed surface of the semiconductor element. 請求項3に記載の半導体素子実装基板がケース内に固定されていることを特徴とする半導体装置。   4. A semiconductor device, wherein the semiconductor element mounting substrate according to claim 3 is fixed in a case.
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