JP5752111B2 - マルチプロセッサ・コンピューティング装置 - Google Patents
マルチプロセッサ・コンピューティング装置 Download PDFInfo
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- JP5752111B2 JP5752111B2 JP2012505124A JP2012505124A JP5752111B2 JP 5752111 B2 JP5752111 B2 JP 5752111B2 JP 2012505124 A JP2012505124 A JP 2012505124A JP 2012505124 A JP2012505124 A JP 2012505124A JP 5752111 B2 JP5752111 B2 JP 5752111B2
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
- G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
- G06F9/4893—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues taking into account power or heat criteria
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Software Systems (AREA)
- Power Sources (AREA)
Description
Claims (10)
- 第1のプロセッサと、
前記第1のプロセッサよりも低い電圧で動作し得る第2のプロセッサと、
スピンロックに作用している間にスピンしたか或いはスリーパ・ボーナスを含んでいたかに関する履歴記録に基づいて、プロセスがスピンロック・プロセス、又はスリープ・ボーナスを伴うプロセスであると判断される場合、前記プロセスを前記第2のプロセッサに割り当てるように構成されたスケジューラと
を含む、コンピューティング装置。 - 前記第1のプロセッサは汎用命令のセットを含み、前記第2のプロセッサは汎用命令のサブセットを含む、請求項1に記載のコンピューティング装置。
- 前記第2のプロセッサは、アトミック・テスト・アンド・セット命令のような、前記第2のプロセッサにおいて実行されるプロセスのタイプを最小限サポートするに適した汎用命令のサブセットを含む、請求項1乃至請求項2のいずれかに記載のコンピューティング装置。
- 前記プロセスのうちの1つ又は複数個は、当該プロセスが前記第2のプロセッサに割り当てられるべきであるという表示を含み、前記スケジューラはそのようなプロセスを前記第2のプロセッサに割り当てる、請求項1乃至請求項3のいずれかに記載のコンピューティング装置。
- マルチプロセッサにおける第1のプロセッサまたは第2のプロセッサにプロセスを割り当てる方法であって、前記第2のプロセッサは、前記第1のプロセッサよりも低い電圧で動作し得、前記方法は、
プロセスがスピンロック・プロセス、スリープ・ボーナスを伴うプロセス、または他のタイプのプロセスのいずれかとして現在動作することになっているかまたは動作し続けているかを、スピンロックに作用している間にスピンしたか或いはスリーパ・ボーナスを含んでいたかに関する履歴記録に基づいて決定するステップと、
前記プロセスがスピンロック・プロセス又はスリーパ・ボーナスを伴うプロセスである場合、前記プロセスを前記第2のプロセッサに割り当て、そうでない場合には前記プロセスを第1のプロセッサに割り当てるステップと、
を含む、方法。 - 前記決定するステップは、作動中の前記プロセスの監視結果に基づいて、又は前記プロセスの作動中の電力消費量に基づいて決定するステップとを含む、請求項5に記載の方法。
- 前記決定するステップは、コンパイラ・プログラムから入力を受け取るステップを含む、請求項5または請求項6に記載の方法。
- 前記第1のプロセッサは汎用命令セットを含み、前記第2のプロセッサは前記汎用命令セットのサブセットを含む、請求項5乃至請求項7のいずれかに記載の方法。
- 前記第2のプロセッサは、レジスタと、アトミック・テスト・アンド・セット命令とを含む、請求項5乃至請求項8のいずれかに記載の方法。
- コンピュータ・プログラムであって、請求項5乃至請求項9のいずれかに記載のステップを前記第1のプロセッサ及び前記第2のプロセッサに接続されたスケジューラに実行させるためのコンピュータ・プログラム。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/410,893 | 2009-04-14 | ||
US12/410,893 US20100262966A1 (en) | 2009-04-14 | 2009-04-14 | Multiprocessor computing device |
PCT/EP2010/054440 WO2010118966A1 (en) | 2009-04-14 | 2010-04-01 | Multiprocessor computing device |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012523637A JP2012523637A (ja) | 2012-10-04 |
JP5752111B2 true JP5752111B2 (ja) | 2015-07-22 |
Family
ID=42246357
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012505124A Expired - Fee Related JP5752111B2 (ja) | 2009-04-14 | 2010-04-01 | マルチプロセッサ・コンピューティング装置 |
Country Status (4)
Country | Link |
---|---|
US (2) | US20100262966A1 (ja) |
EP (1) | EP2362953B1 (ja) |
JP (1) | JP5752111B2 (ja) |
WO (1) | WO2010118966A1 (ja) |
Families Citing this family (14)
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KR101664108B1 (ko) * | 2010-04-13 | 2016-10-11 | 삼성전자주식회사 | 멀티 코어의 동기화를 효율적으로 처리하기 위한 하드웨어 가속 장치 및 방법 |
US20120102503A1 (en) * | 2010-10-20 | 2012-04-26 | Microsoft Corporation | Green computing via event stream management |
US9104410B2 (en) * | 2011-01-04 | 2015-08-11 | Alcatel Lucent | Power saving hardware |
US20130007322A1 (en) | 2011-06-29 | 2013-01-03 | International Business Machines Corporation | Hardware Enabled Lock Mediation |
EP2798467A4 (en) * | 2011-12-30 | 2016-04-27 | Intel Corp | CONFIGURABLE CORE WITH RESTRICTED COMMAND SET |
US8984200B2 (en) * | 2012-08-21 | 2015-03-17 | Lenovo (Singapore) Pte. Ltd. | Task scheduling in big and little cores |
US9619282B2 (en) * | 2012-08-21 | 2017-04-11 | Lenovo (Singapore) Pte. Ltd. | Task scheduling in big and little cores |
US9378069B2 (en) | 2014-03-05 | 2016-06-28 | International Business Machines Corporation | Lock spin wait operation for multi-threaded applications in a multi-core computing environment |
EP2937783B1 (en) * | 2014-04-24 | 2018-08-15 | Fujitsu Limited | A synchronisation method |
US10083068B2 (en) * | 2016-03-29 | 2018-09-25 | Microsoft Technology Licensing, Llc | Fast transfer of workload between multiple processors |
EP3351905B1 (en) * | 2017-01-19 | 2020-03-11 | Melexis Technologies NV | Sensor with self diagnostic function |
CN107608797B (zh) * | 2017-09-30 | 2021-03-02 | Oppo广东移动通信有限公司 | 文件处理方法、装置、存储介质及电子设备 |
JP2020144527A (ja) * | 2019-03-05 | 2020-09-10 | 富士ゼロックス株式会社 | 情報処理装置および半導体装置 |
WO2023232127A1 (zh) * | 2022-06-02 | 2023-12-07 | 华为技术有限公司 | 任务调度方法、装置、***及相关设备 |
Family Cites Families (24)
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JPH0496856A (ja) * | 1990-08-13 | 1992-03-30 | Matsushita Electric Ind Co Ltd | 情報処理装置 |
JPH04215168A (ja) * | 1990-12-13 | 1992-08-05 | Nec Corp | コンピュータシステム |
JPH07114518A (ja) * | 1993-10-15 | 1995-05-02 | Fujitsu Ltd | マルチプロセッサシステムにおけるタスクスケジューリング方式 |
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-
2009
- 2009-04-14 US US12/410,893 patent/US20100262966A1/en not_active Abandoned
-
2010
- 2010-04-01 JP JP2012505124A patent/JP5752111B2/ja not_active Expired - Fee Related
- 2010-04-01 EP EP10717570.5A patent/EP2362953B1/en active Active
- 2010-04-01 WO PCT/EP2010/054440 patent/WO2010118966A1/en active Application Filing
-
2012
- 2012-11-19 US US13/680,369 patent/US20130081038A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
---|---|
EP2362953A1 (en) | 2011-09-07 |
WO2010118966A1 (en) | 2010-10-21 |
US20100262966A1 (en) | 2010-10-14 |
EP2362953B1 (en) | 2017-08-09 |
US20130081038A1 (en) | 2013-03-28 |
JP2012523637A (ja) | 2012-10-04 |
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