JP5531243B2 - Semiconductor device manufacturing method and solar cell - Google Patents
Semiconductor device manufacturing method and solar cell Download PDFInfo
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- JP5531243B2 JP5531243B2 JP2010012546A JP2010012546A JP5531243B2 JP 5531243 B2 JP5531243 B2 JP 5531243B2 JP 2010012546 A JP2010012546 A JP 2010012546A JP 2010012546 A JP2010012546 A JP 2010012546A JP 5531243 B2 JP5531243 B2 JP 5531243B2
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- SLIUAWYAILUBJU-UHFFFAOYSA-N pentacene Chemical compound C1=CC=CC2=CC3=CC4=CC5=CC=CC=C5C=C4C=C3C=C21 SLIUAWYAILUBJU-UHFFFAOYSA-N 0.000 description 1
- 239000012466 permeate Substances 0.000 description 1
- IEQIEDJGQAUEQZ-UHFFFAOYSA-N phthalocyanine Chemical class N1C(N=C2C3=CC=CC=C3C(N=C3C4=CC=CC=C4C(=N4)N3)=N2)=C(C=CC=C2)C2=C1N=C1C2=CC=CC=C2C4=N1 IEQIEDJGQAUEQZ-UHFFFAOYSA-N 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 229920003207 poly(ethylene-2,6-naphthalate) Polymers 0.000 description 1
- 229920000636 poly(norbornene) polymer Polymers 0.000 description 1
- 229920001230 polyarylate Polymers 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 239000004417 polycarbonate Substances 0.000 description 1
- 229920006393 polyether sulfone Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 239000011112 polyethylene naphthalate Substances 0.000 description 1
- 229920000139 polyethylene terephthalate Polymers 0.000 description 1
- 239000005020 polyethylene terephthalate Substances 0.000 description 1
- 229920002098 polyfluorene Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000002861 polymer material Substances 0.000 description 1
- 238000013087 polymer photovoltaic Methods 0.000 description 1
- 229920000069 polyphenylene sulfide Polymers 0.000 description 1
- 229920000128 polypyrrole Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 229920002635 polyurethane Polymers 0.000 description 1
- 239000004814 polyurethane Substances 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 239000005033 polyvinylidene chloride Substances 0.000 description 1
- 150000004032 porphyrins Chemical class 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- BDERNNFJNOPAEC-UHFFFAOYSA-N propan-1-ol Chemical compound CCCO BDERNNFJNOPAEC-UHFFFAOYSA-N 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 150000003248 quinolines Chemical class 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 150000003967 siloles Chemical class 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000001894 space-charge-limited current method Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
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- 238000000859 sublimation Methods 0.000 description 1
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- 125000001424 substituent group Chemical group 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 238000002366 time-of-flight method Methods 0.000 description 1
- 239000010936 titanium Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- DMTNYYLGEBSTEJ-UHFFFAOYSA-N triphenylene-1,2-diamine Chemical compound C1=CC=C2C3=C(N)C(N)=CC=C3C3=CC=CC=C3C2=C1 DMTNYYLGEBSTEJ-UHFFFAOYSA-N 0.000 description 1
- 238000009736 wetting Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
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Images
Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/549—Organic PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Photovoltaic Devices (AREA)
Description
本発明は、半導体デバイスの製造方法、特に光電変換素子の製造方法及びこの方法に従って製造された光電変換素子を含む太陽電池に関する。 The present invention relates to a method for manufacturing a semiconductor device, in particular, a method for manufacturing a photoelectric conversion element and a solar cell including the photoelectric conversion element manufactured according to this method.
半導体デバイス、とりわけ光電変換素子の製造においては、半導体層及び半導体層の製造方法が性能を決定する上で重要となる。 In the manufacture of semiconductor devices, particularly photoelectric conversion elements, the semiconductor layer and the method for manufacturing the semiconductor layer are important in determining performance.
例えば非特許文献１には、電子供与体である銅フタロシアニンと電子受容体であるペリレン誘導体とを組み合わせた光電変換素子が開示されている。また、非特許文献２及び特許文献１には、電子供与体であるポリフェニレンビニレンと、電子受容体であるフラーレン誘導体とを組み合わせた光電変換素子が開示されている。また非特許文献３には、電子供与体であるベンゾポルフィリンと、電子受容体であるフラーレン誘導体とを組み合わせた光電変換素子を、ベンゾポルフィリンの前駆体を用いることにより塗布法で作製した光電変換素子が開示されている。 For example, Non-Patent Document 1 discloses a photoelectric conversion element in which copper phthalocyanine as an electron donor and a perylene derivative as an electron acceptor are combined. Non-Patent Document 2 and Patent Document 1 disclose a photoelectric conversion element in which polyphenylene vinylene as an electron donor and a fullerene derivative as an electron acceptor are combined. Non-Patent Document 3 discloses a photoelectric conversion element prepared by coating a photoelectric conversion element in which a benzoporphyrin as an electron donor and a fullerene derivative as an electron acceptor are combined by using a precursor of benzoporphyrin. Is disclosed.
半導体デバイスの製造費用を低減するためには、半導体層を塗布法を用いて作製することが好ましい。しかしながら、光電変換素子として利用する際の変換効率はまだまだ低く、実用化に向けて更なる変換効率の向上が求められている。このために、単純にｐ型半導体とｎ型半導体とを順番に塗布して作製してできる半導体デバイスよりも高い性能を持つ半導体デバイスを、塗布法により製造する方法が望まれている。 In order to reduce the manufacturing cost of the semiconductor device, it is preferable to manufacture the semiconductor layer using a coating method. However, the conversion efficiency when used as a photoelectric conversion element is still low, and further improvement in conversion efficiency is required for practical use. Therefore, there is a demand for a method of manufacturing a semiconductor device having a higher performance than a semiconductor device obtained by simply applying a p-type semiconductor and an n-type semiconductor one after another in order.
ｐ型半導体とｎ型半導体との双方を含む半導体層を用いた、いわゆるバルクヘテロ型太陽電池は、単純にｐ型半導体とｎ型半導体とを順番に塗布して作製されるヘテロ型太陽電池と比べて、ｐ型半導体とｎ型半導体との接触面積が大きくなるため、変換効率が向上することが期待される。しかしながら、そのような半導体層を得るために、ｐ型半導体とｎ型半導体との双方を含む溶液を用い、これを塗布してｐ型半導体とｎ型半導体との双方を含む半導体層を作製することは容易ではない。なぜなら、ｐ型半導体やｎ型半導体を含む溶液は酸化等による劣化が起こりやすいからである。さらに、非特許文献２及び特許文献１に開示されているような、ｐ型半導体とｎ型半導体との双方を含む溶液に光が当たった場合、ｐ型半導体からｎ型半導体への電荷の移動が起こることが、ｐ型半導体とｎ型半導体との双方を含む溶液の不安定性を招くものと考えられる。また、元来溶解性の低いｐ型半導体とｎ型半導体とを同時に溶解可能な溶剤の探索も困難である。本発明は、効率よくｐ型半導体とｎ型半導体とを含む半導体層を備える半導体デバイスを製造する方法を提供することを目的とする。 A so-called bulk hetero solar cell using a semiconductor layer including both a p-type semiconductor and an n-type semiconductor is compared with a hetero solar cell that is simply formed by sequentially coating a p-type semiconductor and an n-type semiconductor. Thus, since the contact area between the p-type semiconductor and the n-type semiconductor is increased, the conversion efficiency is expected to be improved. However, in order to obtain such a semiconductor layer, a solution containing both a p-type semiconductor and an n-type semiconductor is used and applied to produce a semiconductor layer containing both a p-type semiconductor and an n-type semiconductor. It is not easy. This is because a solution containing a p-type semiconductor or an n-type semiconductor is likely to deteriorate due to oxidation or the like. Further, when light is applied to a solution containing both a p-type semiconductor and an n-type semiconductor as disclosed in Non-Patent Document 2 and Patent Document 1, charge transfer from the p-type semiconductor to the n-type semiconductor is performed. It is considered that the occurrence of the instability of the solution containing both the p-type semiconductor and the n-type semiconductor. In addition, it is difficult to search for a solvent that can simultaneously dissolve a p-type semiconductor and an n-type semiconductor that are originally low in solubility. An object of this invention is to provide the method of manufacturing a semiconductor device provided with the semiconductor layer containing a p-type semiconductor and an n-type semiconductor efficiently.
本発明の発明者らは、半導体材料である第１の化合物と半導体材料ではない第３の化合物とを含む層に対して、第３の化合物を半導体材料である第２の化合物で置換することで、第１の化合物と第２の化合物とを含む半導体層を得る方法を見出した。そして、この半導体層を用いた半導体デバイス及び光電変換素子の製造方法を見出し、この知見に基づいて本発明を完成した。 The inventors of the present invention replace a third compound with a second compound that is a semiconductor material for a layer that includes a first compound that is a semiconductor material and a third compound that is not a semiconductor material. Thus, a method for obtaining a semiconductor layer containing the first compound and the second compound was found. And the semiconductor device using this semiconductor layer and the manufacturing method of a photoelectric conversion element were discovered, and this invention was completed based on this knowledge.
本発明の目的を達成するために、例えば、本発明の半導体デバイスの製造方法は以下の構成を備える。 In order to achieve the object of the present invention, for example, a method for manufacturing a semiconductor device of the present invention comprises the following arrangement.
すなわち、
その一方がｐ型半導体材料であり他方がｎ型半導体材料である、第１の半導体材料と第２の半導体材料とを含む半導体層を備える半導体デバイスを製造する、半導体デバイスの製造方法であって、
前記第１の半導体材料と第３の材料とを含む層に対して、前記第３の材料を前記第２の半導体材料で置換する置換工程を備え、
前記第３の材料は半導体材料ではない
ことを特徴とする。
That is,
A semiconductor device manufacturing method for manufacturing a semiconductor device including a semiconductor layer including a first semiconductor material and a second semiconductor material, one of which is a p-type semiconductor material and the other is an n-type semiconductor material. ,
A step of replacing the third material with the second semiconductor material for the layer containing the first semiconductor material and the third material;
The third material is not a semiconductor material.
本発明の好ましい態様によれば、効率よくｐ型半導体とｎ型半導体とを含む半導体層を備える半導体デバイスを製造することができる。 According to a preferable aspect of the present invention, a semiconductor device including a semiconductor layer including a p-type semiconductor and an n-type semiconductor can be efficiently manufactured.
本発明は、半導体材料である第１の化合物（Ａ）と半導体材料ではない第３の化合物（Ｃ）とを含む層に対して、第３の化合物（Ｃ）を半導体材料である第２の化合物（Ｂ）で置換することを特徴とする半導体デバイスの製造方法である。 In the present invention, the third compound (C) is a second semiconductor material that is a semiconductor material, with respect to a layer containing the first compound (A) that is a semiconductor material and the third compound (C) that is not a semiconductor material. A method for producing a semiconductor device, comprising substituting with a compound (B).
式１に本発明の概念を示す。また、図１に本発明の一例を示す。 Equation 1 shows the concept of the present invention. FIG. 1 shows an example of the present invention.
Ａ ＋ Ｃ → Ａ ＋ Ｂ ・・・（１）
図１において、Ａは半導体材料である第１の化合物を、Ｂは半導体材料である第２の化合物を、Ｃは半導体材料ではない第３の化合物を示す。本発明の製造方法では、第１の化合物（Ａ）と第３の化合物（Ｃ）とを含む層に対して、第３の化合物（Ｃ）を第２の化合物（Ｂ）で置換する。この結果、第１の化合物（Ａ）と第２の化合物（Ｂ）とを含む層が形成される。
A + C → A + B (1)
In FIG. 1, A represents a first compound that is a semiconductor material, B represents a second compound that is a semiconductor material, and C represents a third compound that is not a semiconductor material. In the production method of the present invention, the third compound (C) is substituted with the second compound (B) for the layer containing the first compound (A) and the third compound (C). As a result, a layer containing the first compound (A) and the second compound (B) is formed.
［１ 本発明に係る半導体デバイスに含まれる半導体材料］
本発明で用いられる化合物Ａ及びＢは各々異なる極性の半導体の材料であり、Ａがｐ型半導体の材料である場合は、Ｂはｎ型半導体の材料であるし、Ａがｎ型半導体の材料である場合は、Ｂはｐ型半導体の材料である。半導体は、ｐ型半導体とｎ型半導体に大きく分けられる。また、ｐ型とｎ型の両極性を示すものが知られているが、特性が強い方の極性を用いて活用されることが望ましい。また、化合物Ａに無機半導体材料を、化合物Ｂに有機半導体材料を用い、ハイブリッド型半導体デバイスとすることも可能である。なお、本発明における半導体とは、成膜した際に移動度が１０−４ｃｍ２／Ｖ・ｓ以上を示すものである。移動度は、ＦＥＴ特性、Ｔｉｍｅ ｏｆ Ｆｌｉｇｈｔ法、ＳＣＬＣ法等によって求める事ができる。
[1 Semiconductor material contained in semiconductor device according to the present invention]
Compounds A and B used in the present invention are semiconductor materials having different polarities. When A is a p-type semiconductor material, B is an n-type semiconductor material, and A is an n-type semiconductor material. In this case, B is a p-type semiconductor material. Semiconductors are broadly divided into p-type semiconductors and n-type semiconductors. Moreover, although what shows both the p-type and n-type polarity is known, it is desirable to utilize the polarity with the stronger characteristic. In addition, an inorganic semiconductor material can be used for compound A, and an organic semiconductor material can be used for compound B, whereby a hybrid semiconductor device can be obtained. Note that the semiconductor in the present invention has a mobility of 10 −4 cm 2 / V · s or more when deposited. The mobility can be obtained by FET characteristics, Time of Flight method, SCLC method, or the like.
［１−１ 本発明に係る半導体デバイスに含まれるｐ型半導体］
本発明に係る半導体デバイスに用いられるｐ型半導体は、電子供与体として機能すれば特に限定されない。なお、本発明に係るｐ型半導体デバイスに用いられる半導体は、一種の化合物により構成されても、複数種の化合物の混合物として構成されてもよい。
[1-1 p-type Semiconductor Included in Semiconductor Device According to the Present Invention]
The p-type semiconductor used for the semiconductor device according to the present invention is not particularly limited as long as it functions as an electron donor. In addition, the semiconductor used for the p-type semiconductor device according to the present invention may be composed of one kind of compound or a mixture of plural kinds of compounds.
本発明で用いられる好ましいｐ型半導体の材料となる化合物は、高分子化合物、ポルフィリン化合物又はフタロシアニン化合物である。ｐ型半導体材料の材料として用いられる高分子化合物としては、例えば、ポリチオフェン、ポリチアゾール、ポリチアジアゾール、ポリセレノフェン、及びこれらの共重合体等の複素環高分子を用いることができる。これらの中でもポリチオフェンは、種々の置換基が結合しているものが存在することで、種々の構造が存在し、多種多様なポリマーを合成できるために好ましい。 A preferable compound used as a material for the p-type semiconductor used in the present invention is a polymer compound, a porphyrin compound, or a phthalocyanine compound. As the polymer compound used as the material of the p-type semiconductor material, for example, heterocyclic polymers such as polythiophene, polythiazole, polythiadiazole, polyselenophene, and copolymers thereof can be used. Among these, polythiophene is preferable because there are various structures to which various substituents are bonded, so that various structures exist and a wide variety of polymers can be synthesized.
ｐ型の半導体的特性を示す低分子材料の例としては、フタロシアニン及びその金属錯体；ポルフィリン及びその金属錯体；テトラセン（ナフタセン）、ペンタセン、ピレン、ペリレン等のポリアセン；セキシチオフェン等のオリゴチオフェン類；及び、これら化合物を骨格として含む誘導体などが挙げられ、高分子材料の例としては、ポリチオフェン、ポリフルオレン、ポリチエニレンビニレン、ポリフェニレンビニレン、ポリフェニレン、ポリアセチレン及び、それらの誘導体等が挙げられる。ｐ型半導体の材料として用いられるポルフィリン化合物（以下の式においてＱがＣＨ）、フタロシアニン化合物（以下の式においてＱがＮ）としては、例えば、以下のような構造の化合物が挙げられる。 Examples of low molecular weight materials exhibiting p-type semiconducting properties include phthalocyanine and metal complexes thereof; porphyrin and metal complexes thereof; polyacenes such as tetracene (naphthacene), pentacene, pyrene and perylene; oligothiophenes such as sexithiophene And derivatives containing these compounds as a skeleton, and examples of the polymer material include polythiophene, polyfluorene, polythienylene vinylene, polyphenylene vinylene, polyphenylene, polyacetylene, and derivatives thereof. Examples of the porphyrin compound (Q is CH in the following formula) and the phthalocyanine compound (Q is N in the following formula) used as a p-type semiconductor material include compounds having the following structures.
［１−２ 本発明に係る半導体デバイスに含まれるｎ型半導体］
本発明に係る半導体デバイスに用いられるｎ型半導体は、電子受容体として機能すれば特に限定されない。ｎ型半導体の材料として例えば、フラーレン及びフラーレン誘導体、ペリレン及びペリレン誘導体、キノリン及びキノリン誘導体、ナフタレン及びナフタレン誘導体、フルオレン誘導体、多環キノン、カーボンナノチューブ等が挙げられる。また、上記骨格を持つオリゴマーやポリマー、シアノポリフェニレンビニレン等のポリマーも挙げられる。なお、本発明に係る半導体デバイスに用いられるｎ型半導体は、一種の化合物で構成されても、複数種の化合物の混合物として構成されてもよい。また、本発明で用いられる好ましいｎ型半導体の材料は、フラーレン誘導体である。
[1-2 n-type semiconductor included in semiconductor device according to the present invention]
The n-type semiconductor used in the semiconductor device according to the present invention is not particularly limited as long as it functions as an electron acceptor. Examples of the n-type semiconductor material include fullerene and fullerene derivatives, perylene and perylene derivatives, quinoline and quinoline derivatives, naphthalene and naphthalene derivatives, fluorene derivatives, polycyclic quinones, and carbon nanotubes. In addition, oligomers and polymers having the above skeleton, and polymers such as cyanopolyphenylene vinylene are also included. In addition, the n-type semiconductor used for the semiconductor device according to the present invention may be composed of one kind of compound or a mixture of plural kinds of compounds. A preferable n-type semiconductor material used in the present invention is a fullerene derivative.
［１−３ 本発明に係る半導体デバイスに含まれる半導体材料の前駆体］
本発明で用いられる半導体材料には、膜を形成した際には半導体特性を示さないが、変換を施すことで半導体特性を示すようになる材料も用いられる。変換を施す前の材料を前駆体と呼ぶ。
[1-3 Precursor of semiconductor material contained in semiconductor device according to the present invention]
As the semiconductor material used in the present invention, a material which does not exhibit semiconductor characteristics when a film is formed, but which exhibits semiconductor characteristics by conversion is also used. The material before conversion is called a precursor.
本発明に係る前駆体は、成膜性に優れるものが好ましい。成膜性が良好でない半導体材料であっても、前駆体の状態で成膜してから半導体材料に変換することにより、成膜時のコストを抑制することができるからである。特に、塗布法を適用できるようにするためには、前駆体が何らかの溶媒に対して溶解性が高く溶液として塗布可能であることが好ましい。溶解性の好適な範囲を挙げると、前駆体の溶媒に対する溶解性は、通常０．１重量％以上、好ましくは０．５重量％以上、より好ましくは１重量％以上である。 The precursor according to the present invention is preferably excellent in film formability. This is because even when the semiconductor material has poor film formability, the cost at the time of film formation can be suppressed by forming the film in a precursor state and then converting the semiconductor material. In particular, in order to be able to apply the coating method, the precursor is preferably highly soluble in some solvent and can be applied as a solution. When a suitable range of solubility is given, the solubility of the precursor in the solvent is usually 0.1% by weight or more, preferably 0.5% by weight or more, more preferably 1% by weight or more.
さらに、本発明に係る前駆体は、容易に半導体材料に変換できることが好ましい。前駆体から半導体材料への変換工程において、どのような外的な刺激を前駆体に与えるかは任意であるが、通常は、熱処理、光照射等を行う。 Furthermore, it is preferable that the precursor according to the present invention can be easily converted into a semiconductor material. In the step of converting the precursor to the semiconductor material, what kind of external stimulus is given to the precursor is arbitrary. Usually, heat treatment, light irradiation, and the like are performed.
また、本発明に係る前駆体は、変換工程を経て、高い収率で半導体材料に変換されることが好ましい。この際、前駆体から変換して得られる半導体材料の収率は半導体デバイスの性能を著しく損なわない限り任意である。収率の好適な範囲を挙げると、前駆体から得られる半導体材料の収率は高いほど好ましく、通常９０％以上、好ましくは９５％以上、より好ましくは９９％以上である。 In addition, the precursor according to the present invention is preferably converted into a semiconductor material with a high yield through a conversion step. Under the present circumstances, the yield of the semiconductor material obtained by converting from a precursor is arbitrary unless the performance of a semiconductor device is impaired remarkably. When the suitable range of yield is given, the yield of the semiconductor material obtained from the precursor is preferably as high as possible, and is usually 90% or more, preferably 95% or more, and more preferably 99% or more.
具体的には、好適な前駆体の例としては、式（Ａ１）で表される化合物が挙げられる。 Specifically, examples of a suitable precursor include a compound represented by the formula (A1).
式（Ａ１）において、Ｘ１及びＸ２の少なくとも一方はπ共役した２価の芳香族環を形成する基を表し、Ｚ１−Ｚ２は熱又は光により脱離可能な基であって、Ｚ１−Ｚ２が脱離して得られるπ共役化合物が半導体材料となるものを表す。また、Ｘ１及びＸ２のうちπ共役した２価の芳香族環を形成する基でないものは、置換又は無置換のエテニレン基を表す。 In the formula (A1), at least one of X 1 and X 2 represents a group that forms a π-conjugated divalent aromatic ring, Z 1 -Z 2 is a group that can be removed by heat or light, A π-conjugated compound obtained by elimination of Z 1 -Z 2 represents a semiconductor material. Further, X 1 and X 2 which are not a group that forms a π-conjugated divalent aromatic ring represent a substituted or unsubstituted ethenylene group.
式（Ａ１）で表される化合物は、式（Ａ２）に示すように、熱又は光によりＺ１−Ｚ２が脱離して、平面性の高いπ共役化合物を生成する。この生成されたπ共役化合物が本発明に係る半導体材料である。 In the compound represented by the formula (A1), as shown in the formula (A2), Z 1 -Z 2 is eliminated by heat or light to generate a π-conjugated compound having high planarity. This produced π-conjugated compound is a semiconductor material according to the present invention.
式（Ａ１）で表される化合物の例としては、式（Ａ３）、式（Ａ４）、式（Ａ５）、又は式（Ａ６）で表される化合物が挙げられる。また、式（Ａ１）で表される前駆体は、例えば式（Ａ７）又は式（Ａ８）で表されるように、半導体材料へと変換される。 Examples of the compound represented by the formula (A1) include a compound represented by the formula (A3), the formula (A4), the formula (A5), or the formula (A6). Moreover, the precursor represented by the formula (A1) is converted into a semiconductor material, for example, as represented by the formula (A7) or the formula (A8).
［１−４ 本発明に係る半導体デバイスの製造に使用される半導体材料ではない化合物Ｃ（第３の化合物）］
本発明に係る半導体デバイスの製造に用いられる化合物Ｃ（第３の化合物）は、化合物Ａ（第１の化合物）との混合溶液を作製する時に使用する溶媒に可溶なものであれば、特に限定されない。ただし、化合物Ｃが半導体材料であると、化合物Ａと化合物Ｃとの混合溶液が不安定で変質しやすくなるため、化合物Ｃとしては半導体材料ではない化合物を用いる。本発明に係る化合物Ｃの第一還元電位は、−１．２Ｖよりマイナス方向にシフトした値であることが好ましい。さらに好ましくは、−１．３Ｖよりマイナス方向にシフトした値である。第一還元電位がプラス方向にシフトした値であると、化合物Ａと化合物Ｃとの混合溶液において化合物Ａからの電子移動が起きやすく、混合溶液の安定性が悪くなる可能性がある。なお還元電位の値は、サイクリックボルタンメトリー法によって測定されることができる。また本明細書における還元電位は、フェロセンの酸化還元電位を基準とした値である。化合物Ｃは有機溶媒に対して０．１重量％以上溶解するものであればよいが、０．５重量％以上の溶解度を有することが好ましい。化合物Ａと化合物Ｃとの混合溶液に使用されうる溶媒の例を挙げると、ヘキサン、ヘプタン、オクタン、イソオクタン、ノナン、デカン等の脂肪族炭化水素類；トルエン、キシレン、クロロベンゼン、オルトジクロロベンゼン等の芳香族炭化水素類；メタノール、エタノール、プロパノール等の低級アルコール類；アセトン、メチルエチルケトン、シクロペンタノン、シクロヘキサノン等のケトン類；酢酸エチル、酢酸ブチル、乳酸メチル等のエステル類；クロロホルム、塩化メチレン、ジクロロエタン、トリクロロエタン、トリクロロエチレン等のハロゲン炭化水素類；エチルエーテル、テトラヒドロフラン、ジオキサン等のエーテル類；ジメチルホルムアミド、ジメチルアセトアミド等のアミド類等が挙げられる。また、化合物Ｃは、常温常圧で固体であることが望ましい。
[1-4 Compound C (Third Compound) that is not a Semiconductor Material Used for Manufacturing a Semiconductor Device According to the Present Invention
The compound C (third compound) used in the manufacture of the semiconductor device according to the present invention is particularly suitable if it is soluble in the solvent used when preparing a mixed solution with the compound A (first compound). It is not limited. However, if the compound C is a semiconductor material, the mixed solution of the compound A and the compound C is unstable and easily deteriorates. Therefore, a compound that is not a semiconductor material is used as the compound C. The first reduction potential of the compound C according to the present invention is preferably a value shifted in the minus direction from -1.2V. More preferably, it is a value shifted in the negative direction from -1.3V. When the first reduction potential is a value shifted in the positive direction, electron transfer from the compound A is likely to occur in the mixed solution of the compound A and the compound C, and the stability of the mixed solution may be deteriorated. The value of the reduction potential can be measured by a cyclic voltammetry method. The reduction potential in this specification is a value based on the oxidation-reduction potential of ferrocene. Compound C may be any compound that dissolves 0.1% by weight or more in an organic solvent, but preferably has a solubility of 0.5% by weight or more. Examples of solvents that can be used in the mixed solution of Compound A and Compound C include aliphatic hydrocarbons such as hexane, heptane, octane, isooctane, nonane, decane; toluene, xylene, chlorobenzene, orthodichlorobenzene, etc. Aromatic hydrocarbons; lower alcohols such as methanol, ethanol and propanol; ketones such as acetone, methyl ethyl ketone, cyclopentanone and cyclohexanone; esters such as ethyl acetate, butyl acetate and methyl lactate; chloroform, methylene chloride and dichloroethane And halogen hydrocarbons such as trichloroethane and trichloroethylene; ethers such as ethyl ether, tetrahydrofuran and dioxane; amides such as dimethylformamide and dimethylacetamide. Compound C is preferably solid at normal temperature and pressure.
以下で述べるように化合物Ｃは、化合物Ａと化合物Ｃとの混合膜を作製した後、化合物Ｂによって置換される。すなわち、後述の化合物Ｂの溶液中の溶媒、後述の化合物Ｂの前駆体の溶液中の溶媒、又は後述の化合物Ｃを洗い流すための溶剤に、化合物Ｃが可溶でなければならない。一方、化合物Ｂの溶液中の溶媒、化合物Ｂの前駆体の溶液中の溶媒、又は化合物Ｃを洗い流すための溶剤に、化合物Ａは難溶又は不溶でなければならない。つまり、化合物Ａと化合物Ｃとの混合膜に対して、化合物Ｂの溶液を塗布して化合物Ｃを置換する場合には、化合物Ａは化合物Ｂの溶液中の溶媒に難溶又は不溶であって、化合物Ｃは化合物Ｂの溶液中の溶媒に可溶でなければならない。また、化合物Ａと化合物Ｃとの混合膜に対して、化合物Ｂの前駆体の溶液を塗布して化合物Ｃを置換する場合には、化合物Ａは化合物Ｂの前駆体の溶液中の溶媒に難溶又は不溶であって、化合物Ｃは化合物Ｂの前駆体の溶液中の溶媒に可溶でなければならない。また、化合物Ａと化合物Ｃとの混合膜に対して、化合物Ｃを化合物Ｃの溶剤で洗い流してから化合物Ｂの溶液又は化合物Ｂの前駆体の溶液を塗布する場合は、もちろん化合物Ｃは化合物Ｃの溶剤に可溶であるが、化合物Ａは化合物Ｃの溶剤に難溶又は不溶でなければならない。ここで、可溶であるとは溶媒又は溶液に対する溶解度が０．１重量％以上であることを示す。溶解度が０．１重量％未満の場合に難溶又は不溶であるものとする。 As will be described below, Compound C is replaced by Compound B after preparing a mixed film of Compound A and Compound C. That is, the compound C must be soluble in the solvent in the solution of the compound B described later, the solvent in the solution of the precursor of the compound B described later, or the solvent for washing out the compound C described later. On the other hand, the compound A must be hardly soluble or insoluble in the solvent in the solution of the compound B, the solvent in the solution of the precursor of the compound B, or the solvent for washing out the compound C. That is, when the compound B is applied to the mixed film of the compound A and the compound C to replace the compound C, the compound A is hardly soluble or insoluble in the solvent in the compound B solution. Compound C must be soluble in the solvent in the solution of Compound B. When the compound B precursor solution is applied to the mixed film of the compound A and the compound C to replace the compound C, the compound A is difficult to be a solvent in the compound B precursor solution. Compound C must be soluble or insoluble and soluble in the solvent in the solution of the precursor of Compound B. In the case of applying a solution of compound B or a precursor solution of compound B after washing compound C with a solvent of compound C on a mixed film of compound A and compound C, of course, compound C is compound C. The compound A must be hardly soluble or insoluble in the solvent of the compound C. Here, being soluble means that the solubility in a solvent or solution is 0.1% by weight or more. When the solubility is less than 0.1% by weight, it is hardly soluble or insoluble.
［１−５ 本発明に係る半導体デバイスの製造に使用される化合物Ａと化合物Ｃとの混合膜の作製］
本発明に係る半導体デバイスの製造に用いられる、化合物Ａと化合物Ｃとを含む層は、湿式の塗布法によって化合物Ａと化合物Ｃとの混合膜として形成すればよい。具体的にはダイコート法、スピンコート法、ディップコート法、ロールコート法、スプレーコート法、インクジェット法等が挙げられる。これらの塗布法を用いて、化合物Ａと化合物Ｃとの混合溶液を塗布することにより、混合膜が作製される。混合膜が薄すぎると混合膜に欠陥が生じる可能性がある。混合膜の好ましい厚みは１０ｎｍから１０００ｎｍであり、さらに好ましくは、５０ｎｍから２００ｎｍである。また、化合物Ａの前駆体を用いる場合は、上記の塗布法により化合物Ａの前駆体と化合物Ｃとの溶液から混合膜を作製する。その後熱処理を施すことによって、化合物Ａと化合物Ｃとの混合膜を作製することができる。この時、化合物Ａと化合物Ｃとの混合膜を作製する際に用いる、化合物Ａと化合物Ｃとの混合溶液は、保存安定性の良好なものである事が好ましい。保存安定性が良好であるとは、有機溶媒中に化合物Ａ及び化合物Ｃを各０．１重量％以上溶解して作製した混合溶液を、窒素下で１週間保管してから本発明の方法に従って塗布して作製した半導体デバイスの光電変換効率が、混合溶液を作製後すぐに塗布して作製した半導体デバイスの光電変換効率の７５％以上となることを示す。化合物Ａの前駆体と化合物Ｃとの混合溶液を用いて、化合物Ａと化合物Ｃとの混合膜を作製する場合も、化合物Ａの前駆体と化合物Ｃとの混合溶液は、保存安定性の良好なものである事が好ましい。化合物Ａの前駆体は、半導体材料である化合物Ａよりも一般には安定であるため、化合物Ａの前駆体と化合物Ｃとの混合溶液の保存安定性はより良好であることが期待される。
[1-5 Preparation of Mixed Film of Compound A and Compound C Used for Manufacturing Semiconductor Device According to the Present Invention]
What is necessary is just to form the layer containing the compound A and the compound C used for manufacture of the semiconductor device which concerns on this invention as a mixed film of the compound A and the compound C by the wet apply | coating method. Specific examples include a die coating method, a spin coating method, a dip coating method, a roll coating method, a spray coating method, and an inkjet method. By applying a mixed solution of Compound A and Compound C using these coating methods, a mixed film is produced. If the mixed film is too thin, defects may occur in the mixed film. The preferable thickness of the mixed film is 10 nm to 1000 nm, and more preferably 50 nm to 200 nm. When a precursor of compound A is used, a mixed film is prepared from a solution of the precursor of compound A and compound C by the above coating method. Thereafter, a heat treatment is performed to produce a mixed film of Compound A and Compound C. At this time, it is preferable that the mixed solution of Compound A and Compound C used for preparing a mixed film of Compound A and Compound C has good storage stability. Satisfactory storage stability means that a mixed solution prepared by dissolving 0.1% by weight or more of each of Compound A and Compound C in an organic solvent is stored for 1 week under nitrogen, and then according to the method of the present invention. It shows that the photoelectric conversion efficiency of the semiconductor device produced by coating is 75% or more of the photoelectric conversion efficiency of the semiconductor device produced by coating immediately after producing the mixed solution. Even when a mixed film of compound A and compound C is prepared using a mixed solution of the precursor of compound A and compound C, the mixed solution of the precursor of compound A and compound C has good storage stability. It is preferable that Since the precursor of Compound A is generally more stable than Compound A, which is a semiconductor material, it is expected that the storage stability of the mixed solution of the precursor of Compound A and Compound C is better.
化合物Ａと化合物Ｃとの混合膜を作製する際に用いる、化合物Ａと化合物Ｃとの混合溶液（又は化合物Ａの前駆体と化合物Ｃとの混合溶液）は、耐久性が高いことが好ましい。ここで耐久性が高いとは、混合溶液の経時変化による不純物の増大が一定以下であることを示す。例えば、不純物量が０．１％以下となるように調製した混合溶液の、耐久性試験後の不純物量は、１％以下であることが好ましく、０．３％以下であることがさらに好ましく、０．１％以下であることが特に好ましい。ここで不純物量は、液体クロマトグラフィー測定を行った場合の、化合物Ａのピーク面積に対する不純物のピーク面積として求めることができる。耐久性試験としては例えば、混合溶液を室内光下かつ大気下において、室温で１１日間放置してさらに６０℃で１２時間３５分加熱し、そして８８ｍＷ／ｃｍ２のＡＭ１．５Ｇの光を２５分間照射する方法を採用することができる。半導体材料の溶液は前述のように劣化しやすいため、半導体化合物ではない化合物Ｃを用いると耐久性を高めることができる。 The mixed solution of Compound A and Compound C (or the mixed solution of the precursor of Compound A and Compound C) used when preparing a mixed film of Compound A and Compound C preferably has high durability. Here, “high durability” indicates that the increase in impurities due to the aging of the mixed solution is below a certain level. For example, the amount of impurities after the durability test of the mixed solution prepared so that the amount of impurities is 0.1% or less is preferably 1% or less, more preferably 0.3% or less, It is especially preferable that it is 0.1% or less. Here, the amount of impurities can be determined as the peak area of impurities with respect to the peak area of compound A when liquid chromatography measurement is performed. As the durability test, for example, the mixed solution is allowed to stand at room temperature for 11 days in room light and in the atmosphere, and further heated at 60 ° C. for 12 hours and 35 minutes, and then, AM1.5G light of 88 mW / cm 2 is applied for 25 minutes. An irradiation method can be adopted. Since the solution of the semiconductor material is easily deteriorated as described above, the durability can be enhanced by using the compound C which is not a semiconductor compound.
［１−６ 本発明に係る半導体デバイスの製造における、化合物Ｂによる化合物Ｃの置換］
本発明に係る半導体デバイスの製造における、化合物Ｂによる化合物Ｃの置換方法としては、二通りある。一つは、化合物Ｂの溶液を、化合物Ａと化合物Ｃとの混合膜上へ直接塗布する方法である。もう一つは、化合物Ｂの溶液を化合物Ａと化合物Ｃの混合膜上に塗布する前に、化合物Ｃを化合物Ｃの溶剤を用いて洗い流すことで除去し、その後に化合物Ｂの溶液を塗布する方法である。前者は化合物Ｃが電荷の輸送を妨げない物質である場合に好ましく用いられ、後者は化合物Ｃが電荷の輸送を妨げる物質である場合に好ましく用いられる方法である。
[1-6 Replacement of Compound C with Compound B in Manufacturing Semiconductor Device of the Present Invention]
There are two methods for substituting Compound C with Compound B in the production of the semiconductor device according to the present invention. One is a method in which a solution of compound B is directly applied onto a mixed film of compound A and compound C. The other is that before applying the compound B solution onto the mixed film of the compound A and the compound C, the compound C is removed by washing with a solvent of the compound C, and then the solution of the compound B is applied. Is the method. The former is preferably used when Compound C is a substance that does not prevent charge transport, and the latter is preferably used when Compound C is a substance that prevents charge transport.
化合物Ｂの溶液とは、化合物Ａが難溶又は不溶である溶媒に、化合物Ｂを溶解させた溶液である。化合物Ａが難溶又は不溶である溶媒とは、前述の通り、化合物Ａ分子の溶解度が０．１重量％未満の溶媒のことである。化合物Ｂの溶液を作製するのに用いられる溶媒は、化合物Ａが難溶又は不溶である溶媒であれば、特に制限されない。具体的には、ヘキサン、ヘプタン、オクタン、イソオクタン、ノナン、デカン等の脂肪族炭化水素類；トルエン、キシレン、クロロベンゼン、オルトジクロロベンゼン等の芳香族炭化水素類；メタノール、エタノール、プロパノール等の低級アルコール類；アセトン、メチルエチルケトン、シクロペンタノン、シクロヘキサノン等のケトン類；酢酸エチル、酢酸ブチル、乳酸メチル等のエステル類；クロロホルム、塩化メチレン、ジクロロエタン、トリクロロエタン、トリクロロエチレン等のハロゲン炭化水素類；エチルエーテル、テトラヒドロフラン、ジオキサン等のエーテル類；ジメチルホルムアミド、ジメチルアセトアミド等のアミド類等が挙げられる。 The solution of compound B is a solution in which compound B is dissolved in a solvent in which compound A is hardly soluble or insoluble. The solvent in which the compound A is hardly soluble or insoluble is a solvent in which the solubility of the compound A molecule is less than 0.1% by weight as described above. The solvent used for preparing the solution of compound B is not particularly limited as long as it is a solvent in which compound A is hardly soluble or insoluble. Specifically, aliphatic hydrocarbons such as hexane, heptane, octane, isooctane, nonane and decane; aromatic hydrocarbons such as toluene, xylene, chlorobenzene and orthodichlorobenzene; lower alcohols such as methanol, ethanol and propanol Ketones such as acetone, methyl ethyl ketone, cyclopentanone and cyclohexanone; esters such as ethyl acetate, butyl acetate and methyl lactate; halogen hydrocarbons such as chloroform, methylene chloride, dichloroethane, trichloroethane and trichloroethylene; ethyl ether and tetrahydrofuran And ethers such as dioxane; amides such as dimethylformamide and dimethylacetamide.
また、化合物Ａが難溶又は不溶である溶媒に、化合物Ｂの前駆体を溶解させた溶液を塗布することも可能である。化合物Ｂの前駆体とは、前出の化合物Ａの前駆体と同様、変換処理によって化合物Ｂへと変換することができる化合物である。化合物Ｂの前駆体を用いる場合には、化合物Ｂの前駆体溶液を塗布後に、化合物Ｂへと熱変換又は光変換する工程が必要である。 It is also possible to apply a solution in which the precursor of compound B is dissolved in a solvent in which compound A is hardly soluble or insoluble. The precursor of compound B is a compound that can be converted to compound B by a conversion treatment, like the precursor of compound A described above. In the case of using the precursor of compound B, a step of heat conversion or photoconversion to compound B is required after applying the precursor solution of compound B.
化合物Ｂとしては、不溶な半導体材料を用いることもできる。たとえば、酸化亜鉛のような無機半導体を用いることもできる。この場合、化合物Ａと化合物Ｃとの混合膜を作製した後、化合物Ｃの溶剤を用いて化合物Ｃを除去する。その後、酸化亜鉛のような不溶な半導体材料である化合物Ｂを蒸着法によって積層すれば、化合物Ａと不溶な化合物Ｂとを含む半導体膜を作製することができる。 As the compound B, an insoluble semiconductor material can also be used. For example, an inorganic semiconductor such as zinc oxide can be used. In this case, after preparing a mixed film of compound A and compound C, compound C is removed using a solvent of compound C. After that, by stacking compound B, which is an insoluble semiconductor material such as zinc oxide, by a vapor deposition method, a semiconductor film containing compound A and insoluble compound B can be manufactured.
［２ 本発明に係る半導体デバイス］
本発明に係る半導体デバイスは、１対の電極と、化合物Ａと化合物Ｂとを含む層とを有する。化合物Ａと化合物Ｂとを含む層は、電極間に配置されている。また、化合物Ａと化合物Ｂとを含む層は、化合物Ａと化合物Ｃを含む層に対して、化合物Ｃを化合物Ｂによって置換することにより作製される。
[2 Semiconductor Device According to the Present Invention]
The semiconductor device according to the present invention has a pair of electrodes and a layer containing Compound A and Compound B. The layer containing Compound A and Compound B is disposed between the electrodes. The layer containing compound A and compound B is produced by replacing compound C with compound B in the layer containing compound A and compound C.
本発明に係る光電変換素子において、電極に用いられる材料は、導電性を有するものであれば特に限定されるものではないが、例えば、ＩＴＯ（酸化インジウムスズ）、酸化スズ、酸化亜鉛、金、コバルト、ニッケル、白金等の仕事関数の高い材料と、アルミニウム、銀、リチウム、インジウム、カルシウム、マグネシウム等を組み合わせて用いることが好ましい。なかでも、光が透過する位置にある電極は、ＩＴＯ，酸化スズ、酸化亜鉛等の透明電極を用いることが好ましい。 In the photoelectric conversion element according to the present invention, the material used for the electrode is not particularly limited as long as it has conductivity. For example, ITO (indium tin oxide), tin oxide, zinc oxide, gold, It is preferable to use a combination of a material having a high work function such as cobalt, nickel, or platinum and aluminum, silver, lithium, indium, calcium, magnesium, or the like. Especially, it is preferable to use transparent electrodes, such as ITO, a tin oxide, and a zinc oxide, for the electrode in the position which permeate | transmits light.
電極の膜厚に制限はない。ただし、通常１０ｎｍ以上、中でも５０ｎｍ以上、また、通常１０００ｎｍ以下、中でも３００ｎｍ以下とすることが好ましい。電極が厚すぎると透明性が低下し、高コストとなる可能性があり、薄すぎると直列抵抗が大きく、性能が低下する可能性がある。 There is no limitation on the film thickness of the electrode. However, it is usually preferably 10 nm or more, especially 50 nm or more, and usually 1000 nm or less, especially 300 nm or less. If the electrode is too thick, the transparency may decrease and the cost may be high. If the electrode is too thin, the series resistance may be large and the performance may be deteriorated.
電極の形成方法にも制限はない。例えば、真空蒸着、スパッタ等のドライプロセスにより形成することができる。また、例えば、導電性インク等を用いたウェットプロセスにより形成することもできる。この際、導電性インクとしては任意のものを使用することができ、例えば、導電性高分子、金属粒子分散液等を用いることができる。さらに、電極は２層以上積層してもよく、表面処理により特性（電気特性やぬれ特性等）を改良してもよい。 There is no restriction | limiting also in the formation method of an electrode. For example, it can be formed by a dry process such as vacuum deposition or sputtering. Further, for example, it can be formed by a wet process using a conductive ink or the like. At this time, any conductive ink can be used. For example, a conductive polymer, a metal particle dispersion, or the like can be used. Further, two or more electrodes may be laminated, and characteristics (electric characteristics, wetting characteristics, etc.) may be improved by surface treatment.
本発明に係る光電変換素子において、化合物Ａと化合物Ｂとを含む層の厚さは特に限定されないが、１０ｎｍ未満では均一性が十分ではなく、短絡を起こしやすいという問題が生じる。他方、化合物Ａと化合物Ｂとを含む層の厚さが１０００ｎｍを超えると内部抵抗が大きくなり、また電極間の距離が離れて電荷の拡散が悪くなる問題が生じるため、好ましくない。そこで、化合物Ａと化合物Ｂとを含む層の厚さは１０〜１０００ｎｍが好ましく、５０〜２００ｎｍがさらに好ましい。 In the photoelectric conversion element according to the present invention, the thickness of the layer containing the compound A and the compound B is not particularly limited. However, if the thickness is less than 10 nm, the uniformity is not sufficient, and a problem that a short circuit easily occurs. On the other hand, if the thickness of the layer containing the compound A and the compound B exceeds 1000 nm, the internal resistance increases, and the distance between the electrodes is increased, resulting in a problem that charge diffusion is deteriorated. Therefore, the thickness of the layer containing Compound A and Compound B is preferably 10 to 1000 nm, and more preferably 50 to 200 nm.
本発明に係る半導体デバイスは、通常は支持体となる基板を有する。すなわち、基板上に、電極と、化合物Ａと化合物Ｂとを含む層とが形成される。また、さらに正孔取り出し層と電子取り出し層との少なくとも一方が形成されてもよい。基板の材料（基板材料）は本発明の効果を著しく損なわない限り任意である。基板材料の好適な例を挙げると、石英、ガラス、サファイア、チタニア等の無機材料；ポリエチレンテレフタレート、ポリエチレンナフタレート、ポリエーテルスルホン、ポリイミド、ナイロン、ポリスチレン、ポリビニルアルコール、エチレンビニルアルコール共重合体、フッ素樹脂フィルム、塩化ビニル、ポリエチレン、セルロース、ポリ塩化ビニリデン、アラミド、ポリフェニレンスルフィド、ポリウレタン、ポリカーボネート、ポリアリレート、ポリノルボルネン等の有機材料；紙、合成紙等の紙材料；ステンレス、チタン、アルミニウム等の金属に、絶縁性を付与するために表面をコート或いはラミネートしたもの等の複合材料等が挙げられる。 The semiconductor device according to the present invention usually has a substrate serving as a support. That is, an electrode and a layer containing Compound A and Compound B are formed on the substrate. Furthermore, at least one of a hole extraction layer and an electron extraction layer may be formed. The material of the substrate (substrate material) is arbitrary as long as the effects of the present invention are not significantly impaired. Preferable examples of the substrate material include inorganic materials such as quartz, glass, sapphire, and titania; polyethylene terephthalate, polyethylene naphthalate, polyethersulfone, polyimide, nylon, polystyrene, polyvinyl alcohol, ethylene vinyl alcohol copolymer, fluorine Organic materials such as resin film, vinyl chloride, polyethylene, cellulose, polyvinylidene chloride, aramid, polyphenylene sulfide, polyurethane, polycarbonate, polyarylate, polynorbornene; paper materials such as paper and synthetic paper; metals such as stainless steel, titanium, and aluminum In addition, a composite material such as a material whose surface is coated or laminated in order to impart insulating properties can be used.
基板の形状に制限はなく、例えば、板、フィルム、シート等の形状を用いることができる。基板の厚みに制限はない。ただし、通常５μｍ以上、中でも２０μｍ以上、また、通常２０ｍｍ以下、中でも１０ｍｍ以下に形成することが好ましい。基板が薄すぎると半導体デバイスの強度が不足する可能性があり、基板が厚すぎるとコストが高くなったり重量が重くなりすぎたりする可能性がある。 There is no restriction | limiting in the shape of a board | substrate, For example, shapes, such as a board, a film, a sheet | seat, can be used. There is no limitation on the thickness of the substrate. However, it is preferably 5 μm or more, especially 20 μm or more, and usually 20 mm or less, especially 10 mm or less. If the substrate is too thin, the strength of the semiconductor device may be insufficient, and if the substrate is too thick, the cost may be increased or the weight may be increased.
本発明に係る半導体デバイスは、例えば、以下の製造方法に従って製造することができる。まず、基板を用意し、基板上に上述の通りに電極層を形成する。次いで、化合物Ａと化合物Ｂとを含む層を、上述の通りに電極層上に形成する。さらに、化合物Ａと化合物Ｂとを含む層上に、上述の通りにもう１つの電極層を形成すればよい。 The semiconductor device according to the present invention can be manufactured, for example, according to the following manufacturing method. First, a substrate is prepared, and an electrode layer is formed on the substrate as described above. Next, a layer containing Compound A and Compound B is formed on the electrode layer as described above. Further, another electrode layer may be formed on the layer containing the compound A and the compound B as described above.
本発明に係る光電変換素子は、１対の電極、及び化合物Ａと化合物Ｂとを含む層の他に、さらに正孔取り出し層と電子取り出し層との少なくとも一方を有することができる。 The photoelectric conversion element according to the present invention can further include at least one of a hole extraction layer and an electron extraction layer in addition to the pair of electrodes and the layer including the compound A and the compound B.
正孔取り出し層の材料は、化合物Ａと化合物Ｂとを含む層から電極へ正孔の取り出し効率を向上させることが可能な材料であれば特に限定されない。具体的には、ポリチオフェン、ポリピロール、ポリアセチレン、トリフェニレンジアミン等の導電性有機化合物や前述のｐ型半導体等が挙げられる。また、金、インジウム、銀、パラジウム等の金属等の薄膜も使用することができる。さらに、金属等の薄膜は、単独で形成してもよく、上記の有機材料と組み合わせて用いることもできる。 The material of the hole extraction layer is not particularly limited as long as it can improve the efficiency of extracting holes from the layer containing Compound A and Compound B to the electrode. Specific examples include conductive organic compounds such as polythiophene, polypyrrole, polyacetylene, and triphenylenediamine, and the aforementioned p-type semiconductor. A thin film of metal such as gold, indium, silver or palladium can also be used. Furthermore, a thin film of metal or the like may be formed alone or in combination with the above organic material.
電子取り出し層の材料は、化合物Ａと化合物Ｂとを含む層から電極へ電子の取り出し効率を向上させることが可能な材料であれば特に限定されない。具体的には、バソキュプロイン（ＢＣＰ）又は、バソフェナントレン（Ｂｐｈｅｎ）、及びこれらにアルカリ金属又はアルカリ土類金属をドープした層が挙げられる。また、電子取り出し層の材料にフラーレン類等のｎ型半導体材料やシロール類等を用いることも可能である。上記のバソキュプロイン（ＢＣＰ）層、バソフェナントレン（Ｂｐｈｅｎ）層、及びバソキュプロイン（ＢＣＰ）又はバソフェナントレン（Ｂｐｈｅｎ）にアルカリ金属又はアルカリ土類金属をドープした層から、いくつかを組み合わせて用いることもできる。 The material of the electron extraction layer is not particularly limited as long as it can improve the efficiency of extracting electrons from the layer containing Compound A and Compound B to the electrode. Specifically, bathocuproine (BCP) or bathophenanthrene (Bphen) and a layer doped with an alkali metal or an alkaline earth metal can be given. Further, n-type semiconductor materials such as fullerenes, siloles, and the like can be used as the material of the electron extraction layer. Several combinations can be used from the above bathocuproin (BCP) layer, bathophenanthrene (Bphen) layer, and bathocuproin (BCP) or bathophenanthrene (Bphen) doped with an alkali metal or an alkaline earth metal.
正孔取り出し層と電子取り出し層とは、１対の電極間に、化合物Ａと化合物Ｂとを含む層を挟むように配置される。すなわち、本発明に係る半導体デバイスが正孔取り出し層と電子取り出し層の両者を含む場合、電極、正孔取り出し層、化合物Ａと化合物Ｂとを含む層、電子取り出し層、電極がこの順に配置されている。また、本発明に係る半導体デバイスが正孔取り出し層を含み電子取り出し層を含まない場合は、電極、正孔取り出し層、化合物Ａと化合物Ｂとを含む層、電極がこの順に配置されている。本発明に係る光電変換素子が電子取り出し層を含み正孔取り出し層を含まない場合は、電極、化合物Ａと化合物Ｂとを含む層、電子取り出し層、電極がこの順に配置されている。正孔取り出し層と電子取り出し層とは積層順序が逆であってもよいし、また正孔取り出し層と電子取り出し層との少なくとも一方が異なる複数の膜により構成されていてもよい。 The hole extraction layer and the electron extraction layer are arranged so that a layer containing the compound A and the compound B is sandwiched between a pair of electrodes. That is, when the semiconductor device according to the present invention includes both the hole extraction layer and the electron extraction layer, the electrode, the hole extraction layer, the layer including the compound A and the compound B, the electron extraction layer, and the electrode are arranged in this order. ing. When the semiconductor device according to the present invention includes the hole extraction layer and does not include the electron extraction layer, the electrode, the hole extraction layer, the layer including the compound A and the compound B, and the electrode are arranged in this order. When the photoelectric conversion element according to the present invention includes the electron extraction layer and does not include the hole extraction layer, the electrode, the layer including the compound A and the compound B, the electron extraction layer, and the electrode are arranged in this order. The stacking order of the hole extraction layer and the electron extraction layer may be reversed, or at least one of the hole extraction layer and the electron extraction layer may be composed of a plurality of different films.
正孔取り出し層と電子取り出し層との形成方法に制限はない。例えば、昇華性を有する材料を用いる場合は真空蒸着法等により形成することができる。また、例えば、溶媒に可溶な材料を用いる場合は、スピンコートやインクジェット等の湿式塗布法等により形成することができる。正孔取り出し層又は電子取り出し層に半導体材料を用いる場合は、化合物Ａ及び化合物Ｂと同様に、前駆体を用いて層を形成した後に前駆体を半導体材料に変換してもよい。 There is no restriction | limiting in the formation method of a hole taking-out layer and an electron taking-out layer. For example, when a material having sublimation property is used, it can be formed by a vacuum deposition method or the like. Further, for example, when a material soluble in a solvent is used, it can be formed by a wet coating method such as spin coating or inkjet. When a semiconductor material is used for the hole extraction layer or the electron extraction layer, like the compounds A and B, the precursor may be converted into a semiconductor material after forming the layer using the precursor.
本発明に係る半導体デバイスは、光電変換素子として用いることができ、本発明に係る半導体デバイスを用いて太陽電池を構成することができる。本発明に係る光電変換素子の用途は太陽電池には限られず、光スイッチング装置、センサ等の各種の光電変換装置に好適に使用することができる。また、本発明に係る半導体デバイスは光電変換素子として用いることができるにとどまらず、例えばバイポーラーのトランジスタやダイオード等にも用いることができる。 The semiconductor device according to the present invention can be used as a photoelectric conversion element, and a solar cell can be configured using the semiconductor device according to the present invention. The use of the photoelectric conversion element according to the present invention is not limited to solar cells, and can be suitably used for various photoelectric conversion devices such as an optical switching device and a sensor. Further, the semiconductor device according to the present invention can be used not only as a photoelectric conversion element but also, for example, as a bipolar transistor or a diode.
以下に実施例により本発明をさらに具体的に説明するが、本発明はその要旨を超えない限り、以下の例に限定されるものではない。 Examples The present invention will be described more specifically with reference to the following examples. However, the present invention is not limited to the following examples unless it exceeds the gist.
［実施例１］ 第３の化合物としてアダマンタンを用いた光電変換素子 その１
［正孔取り出し層の成膜（１）］
ガラス基板上に電極としてＩＴＯ電極がパターニングされた、ＩＴＯ付きガラス基板上に、１層目の正孔取り出し層としてポリ（３，４）−エチレンジオキシチオフェン／ポリスチレンスルフォネート水分散液（スタルクヴィテック社製 商品名「Ｂａｙｔｒｏｎ ＰＨ」）をスピンコート法により塗布した。塗布後のガラス基板を１２０℃のホットプレート上で大気中１０分間、加熱処理を施して、１層目の正孔取り出し層を成膜した。ポリ（３，４）−エチレンジオキシチオフェン／ポリスチレンスルフォネート層の膜厚は４０ｎｍであった。
Example 1 Photoelectric conversion element using adamantane as the third compound, part 1
[Hole Extraction Layer Formation (1)]
An ITO electrode is patterned as an electrode on a glass substrate. A poly (3,4) -ethylenedioxythiophene / polystyrenesulfonate aqueous dispersion (Stark) is used as a first hole extraction layer on a glass substrate with ITO. A product name “Baytron PH” manufactured by Vitec Co., Ltd.) was applied by spin coating. The glass substrate after coating was subjected to heat treatment on the hot plate at 120 ° C. for 10 minutes in the air to form a first hole extraction layer. The film thickness of the poly (3,4) -ethylenedioxythiophene / polystyrene sulfonate layer was 40 nm.
［正孔取り出し層の成膜（２）］
ガラス基板をグローブボックス中に持ち込み、ガラス基板を窒素雰囲気下１８０℃で３分間加熱処理して乾燥させた。続けてクロロホルム／モノクロロベンゼンの重量比１：２の混合溶媒に式（Ｂ１）で表される化合物を０．５重量％溶解した液をろ過し、ろ液を得た。得たろ液をグローブボックス中でガラス基板上の１層目の正孔取り出し層上に１５００ｒｐｍでスピンコート法により塗布し、塗布後のガラス基板をグローブボックス中１８０℃で２０分間加熱した。式（Ｂ１）で表される化合物は、ｐ型半導体材料であるテトラベンゾポルフィリンの前駆体である。加熱により式（Ｂ１）で表される化合物はテトラベンゾポルフィリンへと変換される。こうして、ポリ（３，４）−エチレンジオキシチオフェン／ポリスチレンスルフォネート層の上に２層目の正孔取り出し層であるテトラベンゾポルフィリン層を形成した。
[Hole Extraction Layer Formation (2)]
The glass substrate was brought into a glove box, and the glass substrate was dried by heating at 180 ° C. for 3 minutes in a nitrogen atmosphere. Subsequently, a solution in which 0.5% by weight of the compound represented by the formula (B1) was dissolved in a mixed solvent of chloroform / monochlorobenzene having a weight ratio of 1: 2 was filtered to obtain a filtrate. The obtained filtrate was applied on the first hole extraction layer on the glass substrate in a glove box by a spin coating method at 1500 rpm, and the coated glass substrate was heated in a glove box at 180 ° C. for 20 minutes. The compound represented by the formula (B1) is a precursor of tetrabenzoporphyrin, which is a p-type semiconductor material. The compound represented by the formula (B1) is converted into tetrabenzoporphyrin by heating. Thus, a tetrabenzoporphyrin layer as a second hole extraction layer was formed on the poly (3,4) -ethylenedioxythiophene / polystyrene sulfonate layer.
［化合物Ａと化合物Ｃとを含む層の成膜］
クロロホルム／モノクロロベンゼンの１：１混合溶媒（重量）に、式（Ｂ１）で表される化合物を０．６重量％、アダマンタン（アルドリッチ社製）を１．４重量％溶解した液（以下溶液Ｓと称する）を調製し、ろ過してろ液を得た。得たろ液をグローブボックス中で窒素雰囲気下、２層目の正孔取り出し層上に１５００ｒｐｍでスピンコートし、グローブボックス中１８０℃で２０分間加熱した。加熱により式（Ｂ１）で表される化合物は、テトラベンゾポルフィリンへと変換される。テトラベンゾポルフィリンはｐ型半導体材料である化合物Ａであり、アダマンタンは半導体材料ではない化合物Ｃである。こうして、正孔取り出し層の上に化合物Ａ（テトラベンゾポルフィリン）と化合物Ｃ（アダマンタン）とを含む層を形成した。
[Film Formation of Layer Containing Compound A and Compound C]
A solution prepared by dissolving 0.6% by weight of the compound represented by the formula (B1) and 1.4% by weight of adamantane (manufactured by Aldrich) in a 1: 1 mixed solvent (weight) of chloroform / monochlorobenzene (hereinafter referred to as Solution S) Was prepared and filtered to obtain a filtrate. The obtained filtrate was spin-coated at 1500 rpm on the second hole extraction layer in a glove box in a nitrogen atmosphere, and heated at 180 ° C. for 20 minutes in the glove box. The compound represented by formula (B1) is converted into tetrabenzoporphyrin by heating. Tetrabenzoporphyrin is compound A which is a p-type semiconductor material, and adamantane is compound C which is not a semiconductor material. Thus, a layer containing Compound A (tetrabenzoporphyrin) and Compound C (adamantane) was formed on the hole extraction layer.
［化合物Ｂによる化合物Ｃの置換］
トルエンに式（Ｂ２）で表されるフラーレン誘導体を１．２重量％溶解した液を調整し、ろ過してろ液を得た。得たろ液をグローブボックス中で窒素雰囲気下３０００ｒｐｍで化合物Ａと化合物Ｃとを含む層上にスピンコートし、グローブボックス中６５℃で１０分間加熱処理を施した。加熱処理後のガラス基板を真空蒸着装置内に設置し、クライオポンプを用いて排気した。式（Ｂ２）で表されるフラーレン誘導体はｎ型半導体材料である。こうして、化合物Ｃ（アダマンタン）を化合物Ｂ（フラーレン誘導体）で置換して、化合物Ａと化合物Ｂとを含む層を形成した。
[Substitution of Compound C with Compound B]
A solution in which 1.2% by weight of the fullerene derivative represented by the formula (B2) was dissolved in toluene was prepared and filtered to obtain a filtrate. The obtained filtrate was spin-coated on a layer containing Compound A and Compound C at 3000 rpm in a glove box under a nitrogen atmosphere, and heat-treated at 65 ° C. for 10 minutes in the glove box. The glass substrate after the heat treatment was placed in a vacuum vapor deposition apparatus and evacuated using a cryopump. The fullerene derivative represented by the formula (B2) is an n-type semiconductor material. Thus, compound C (adamantane) was substituted with compound B (fullerene derivative) to form a layer containing compound A and compound B.
［電子取り出し層の形成］
真空蒸着装置内に配置されたメタルボートにフェナントロリン誘導体（バソキュプロイン：ＢＣＰ）を入れ、加熱した。化合物Ａと化合物Ｂとを含む層上にフェナントロリン誘導体（バソキュプロイン：ＢＣＰ）を膜厚６ｎｍになるまで蒸着し、電子取り出し層を形成した。
[Formation of electron extraction layer]
A phenanthroline derivative (bathocuproine: BCP) was placed in a metal boat placed in a vacuum deposition apparatus and heated. A phenanthroline derivative (vasocuproin: BCP) was deposited on the layer containing Compound A and Compound B until the film thickness reached 6 nm to form an electron extraction layer.
［電極の形成］
電子取り出し層の上に真空蒸着により厚さ８０ｎｍのアルミニウム膜を電極として設けた。作製したＩＴＯ付きガラス基板、正孔取り出し層、化合物Ａと化合物Ｂとを含む層、電子取り出し層、アルミニウム膜からなる積層体に対して、ＩＴＯ付きガラス基板側に透明ガラス基板（非図示）を取り付けた。取り付けには封止剤を用い、積層体の全体を封止剤でシールするとともに積層体を封止剤で透明ガラス基板へと固定して、光電変換素子を作製した。
[Electrode formation]
An aluminum film having a thickness of 80 nm was provided as an electrode on the electron extraction layer by vacuum deposition. A transparent glass substrate (not shown) is provided on the ITO glass substrate side with respect to the laminated body composed of the glass substrate with ITO, the hole extraction layer, the layer containing Compound A and Compound B, the electron extraction layer, and the aluminum film. Attached. A sealant was used for attachment, and the entire laminate was sealed with the sealant, and the laminate was fixed to the transparent glass substrate with the sealant to produce a photoelectric conversion element.
作製した光電変換素子に対して、ＩＴＯ付きガラス基板側からソーラシミュレーター（ＡＭ１．５Ｇ）で１００ｍＷ／ｃｍ２の強度の光を照射した。ソースメーター（ケイスレー社製，２４００型）にて、ＩＴＯ電極とアルミニウム電極との間における電流−電圧特性を測定し、光電変換効率を算出したところ、０．９％であった。 The produced photoelectric conversion element was irradiated with light having an intensity of 100 mW / cm 2 with a solar simulator (AM1.5G) from the glass substrate side with ITO. The current-voltage characteristics between the ITO electrode and the aluminum electrode were measured with a source meter (Caisley, Model 2400), and the photoelectric conversion efficiency was calculated to be 0.9%.
［実施例２］ 第３の化合物としてアダマンタンを用いた光電変換素子 その２
実施例１においては、式（Ｂ２）で示されるフラーレン誘導体のトルエン溶液を化合物Ａと化合物Ｃとを含む層上にスピンコートすることによって、アダマンタンを式（Ｂ２）で示されるフラーレン誘導体で置換した。実施例２では、化合物Ａと化合物Ｃとを含む層にトルエンを２回スピンコートすることにより、アダマンタンを洗い流した後、式（Ｂ２）で示されるフラーレン誘導体のトルエン溶液を実施例１と同様にスピンコートした。他の工程は実施例１と同様に行い、光電変換素子を作製した。
[Example 2] Photoelectric conversion element using adamantane as the third compound, Part 2
In Example 1, adamantane was substituted with a fullerene derivative represented by the formula (B2) by spin-coating a toluene solution of the fullerene derivative represented by the formula (B2) onto the layer containing the compound A and the compound C. . In Example 2, a layer containing Compound A and Compound C was spin-coated with toluene twice to wash away adamantane, and then a toluene solution of a fullerene derivative represented by the formula (B2) was prepared in the same manner as Example 1. Spin coated. Other steps were performed in the same manner as in Example 1 to produce a photoelectric conversion element.
作製した光電変換素子に対して、ＩＴＯ付きガラス基板側からソーラシミュレーター（ＡＭ１．５Ｇ）で１００ｍＷ／ｃｍ２の強度の光を照射した。ソースメーター（ケイスレー社製，２４００型）にて、ＩＴＯ電極とアルミニウム電極と間における電流−電圧特性を測定し、光電変換効率を算出したところ、１．０％であった。 The produced photoelectric conversion element was irradiated with light having an intensity of 100 mW / cm 2 with a solar simulator (AM1.5G) from the glass substrate side with ITO. The current-voltage characteristics between the ITO electrode and the aluminum electrode were measured with a source meter (Caisley, Model 2400), and the photoelectric conversion efficiency was calculated to be 1.0%.
［実施例３］ 第３の化合物としてｐ−Ｔｅｒｐｈｅｎｙｌを用いた光電変換素子
実施例２では、化合物Ｃとしてアダマンタンを用いたが、実施例３では化合物Ｃとしてｐ−Ｔｅｒｐｈｅｎｙｌを用いた。また、実施例２では化合物Ａと化合物Ｃとを含む層にトルエンを２回スピンコートすることによりアダマンタンを洗い流したが、実施例３では化合物Ａと化合物Ｃとを含む層にクロロホルムを１回、トルエンを１回スピンコートしてｐ−Ｔｅｒｐｈｅｎｙｌを洗い流した。他の工程は実施例２と同様に行い、光電変換素子を作製した。
[Example 3] Photoelectric conversion element using p-terphenyl as the third compound In Example 2, adamantane was used as compound C. However, in Example 3, p-terphenyl was used as compound C. In Example 2, adamantane was washed off by spin-coating toluene twice on the layer containing Compound A and Compound C. In Example 3, chloroform was applied once to the layer containing Compound A and Compound C. Toluene was spin-coated once to wash away p-Terphenyl. Other steps were performed in the same manner as in Example 2 to produce a photoelectric conversion element.
作製した光電変換素子に対して、ＩＴＯ付きガラス基板側からソーラシミュレーター（ＡＭ１．５Ｇ）で１００ｍＷ／ｃｍ２の強度の光を照射した。ソースメーター（ケイスレー社製，２４００型）にて、ＩＴＯ電極とアルミニウム電極と間における電流−電圧特性を測定し、光電変換効率を算出したところ、０．８％であった。 The produced photoelectric conversion element was irradiated with light having an intensity of 100 mW / cm 2 with a solar simulator (AM1.5G) from the glass substrate side with ITO. The current-voltage characteristics between the ITO electrode and the aluminum electrode were measured with a source meter (Keisley, Model 2400), and the photoelectric conversion efficiency was calculated to be 0.8%.
［実施例４］ 第３の化合物としてカリックス［４］アレンテトラ−ｎ−プロピルエーテルを用いた光電変換素子
実施例２では、化合物Ｃとしてアダマンタンを用いたが、実施例４では化合物Ｃとして式（Ｂ３）に示すカリックス［４］アレンテトラ−ｎ−プロピルエーテルを用いた。他の工程は実施例２と同様に行い、光電変換素子を作製した。
[Example 4] Photoelectric conversion element using calix [4] arenetetra-n-propyl ether as the third compound In Example 2, adamantane was used as compound C. The calix [4] arenetetra-n-propyl ether shown in B3) was used. Other steps were performed in the same manner as in Example 2 to produce a photoelectric conversion element.
作製した光電変換素子に対して、ＩＴＯ付きガラス基板側からソーラシミュレーター（ＡＭ１．５Ｇ）で１００ｍＷ／ｃｍ２の強度の光を照射した。ソースメーター（ケイスレー社製，２４００型）にて、ＩＴＯ電極とアルミニウム電極と間における電流−電圧特性を測定し、光電変換効率を算出したところ、０．１％であった。 The produced photoelectric conversion element was irradiated with light having an intensity of 100 mW / cm 2 with a solar simulator (AM1.5G) from the glass substrate side with ITO. The current-voltage characteristics between the ITO electrode and the aluminum electrode were measured with a source meter (Keisley, Model 2400), and the photoelectric conversion efficiency was calculated to be 0.1%.
［実施例５］ 第３の化合物としてフタロシアニン様化合物（Ｂ４）を用いた光電変換素子
実施例２では、化合物Ｃとしてアダマンタンを用いたが、実施例５では化合物Ｃとして、式（Ｂ４）に示すフタロシアニン様化合物を用いた。また、実施例２では化合物Ａとして式（Ｂ２）のフラーレン誘導体を用いたが、実施例５では式（Ｂ５）のフラーレン誘導体を用いた。他の工程は実施例２と同様に行い、光電変換素子を作製した。
[Example 5] Photoelectric conversion element using phthalocyanine-like compound (B4) as the third compound In Example 2, adamantane was used as compound C, but in Example 5, the compound C is represented by formula (B4). A phthalocyanine-like compound was used. In Example 2, the fullerene derivative of the formula (B2) was used as the compound A, but in Example 5, the fullerene derivative of the formula (B5) was used. Other steps were performed in the same manner as in Example 2 to produce a photoelectric conversion element.
作製した光電変換素子に対して、ＩＴＯ付きガラス基板側からソーラシミュレーター（ＡＭ１．５Ｇ）で１００ｍＷ／ｃｍ２の強度の光を照射した。ソースメーター（ケイスレー社製，２４００型）にて、ＩＴＯ電極とアルミニウム電極と間における電流−電圧特性を測定し、光電変換効率を算出したところ、０．８％であった。 The produced photoelectric conversion element was irradiated with light having an intensity of 100 mW / cm 2 with a solar simulator (AM1.5G) from the glass substrate side with ITO. The current-voltage characteristics between the ITO electrode and the aluminum electrode were measured with a source meter (Keisley, Model 2400), and the photoelectric conversion efficiency was calculated to be 0.8%.
［実施例６］ 化合物Ａと化合物Ｃとを含む層の成膜に使用した溶液Ｓの耐久性
以下のようにして、実施例１における、式（Ｂ１）で表される化合物（化合物Ａ）とアダマンタン（化合物Ｃ）とを含む層の成膜時に使用した上述の溶液Ｓの耐久性を評価した。すなわち、溶液Ｓを透明のサンプル管に入れ、大気下室温にて１１日間保管し、その後６０℃のホットプレート上で１２時間３５分加熱した。この間溶液Ｓは室内光に晒されていた。さらにその後、溶液Ｓの入ったサンプル管に対してソーラシミュレーター（ＡＭ１．５Ｇ）で８８ｍＷ／ｃｍ２の強度の光を２５分間照射した。以上の方法により、溶液Ｓに対して耐久性試験のための負荷を与えた。
[Example 6] Durability of solution S used for film formation of a layer containing compound A and compound C In the following manner, the compound represented by formula (B1) in Example 1 (compound A) and Durability of the above-mentioned solution S used at the time of film-forming of the layer containing adamantane (compound C) was evaluated. That is, the solution S was put into a transparent sample tube, stored at room temperature for 11 days in the atmosphere, and then heated on a hot plate at 60 ° C. for 12 hours and 35 minutes. During this time, the solution S was exposed to room light. Thereafter, the sample tube containing the solution S was irradiated with light having an intensity of 88 mW / cm 2 for 25 minutes using a solar simulator (AM1.5G). The load for the durability test was given to the solution S by the above method.
負荷を加える前および負荷を加えた後の溶液Ｓの不純物量を液体クロマトグラフィーで分析した。式（Ｂ１）で表される化合物のピーク面積に対する不純物のピーク面積を不純物量（％）とした。結果を表１に示した。液体クロマトグラフィーの分析条件は以下の通りである。カラムとして、ナカライテスク社のコスモシールBuckyprepを使用した。展開溶媒としては、体積比でトルエン／イソプロパノール＝７０／３０の混合溶媒を使用した。溶媒の流速は１．５ｍｌ／ｍｉｎであり、検出波長はＵＶ３５０ｎｍであった。 The amount of impurities in the solution S before and after loading was analyzed by liquid chromatography. The peak area of the impurity with respect to the peak area of the compound represented by the formula (B1) was defined as the impurity amount (%). The results are shown in Table 1. The analysis conditions for liquid chromatography are as follows. As the column, Cosmo Seal Buckyprep from Nacalai Tesque was used. As a developing solvent, a mixed solvent of toluene / isopropanol = 70/30 by volume ratio was used. The flow rate of the solvent was 1.5 ml / min, and the detection wavelength was 350 nm.
［比較例］
溶液Ｓを調製する際に、アダマンタン（化合物Ｃ）の代わりに、式（Ｂ２）で表されるフラーレン誘導体を用いた。それ以外は、実施例６と同様に試験を行った。結果を表１に示した。
[Comparative example]
When preparing the solution S, a fullerene derivative represented by the formula (B2) was used instead of adamantane (compound C). Otherwise, the test was performed in the same manner as in Example 6. The results are shown in Table 1.
Claims (12)
前記第１の半導体材料と第３の材料とを含む層に対して、前記第３の材料を前記第２の半導体材料で置換する置換工程を備え、
前記第３の材料は半導体材料ではない
ことを特徴とする、半導体デバイスの製造方法。 One of which is a p-type a semiconductor material other is n-type semiconductor material, a method for producing a semi-conductor device Ru comprising a semiconductor layer comprising a first semiconductor material and a second semiconductor material,
A step of replacing the third material with the second semiconductor material for the layer containing the first semiconductor material and the third material;
The method for manufacturing a semiconductor device, wherein the third material is not a semiconductor material.
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