JP5497626B2 - 複合基板を製造するための工程 - Google Patents
複合基板を製造するための工程 Download PDFInfo
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- JP5497626B2 JP5497626B2 JP2010500258A JP2010500258A JP5497626B2 JP 5497626 B2 JP5497626 B2 JP 5497626B2 JP 2010500258 A JP2010500258 A JP 2010500258A JP 2010500258 A JP2010500258 A JP 2010500258A JP 5497626 B2 JP5497626 B2 JP 5497626B2
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- 239000000758 substrate Substances 0.000 title claims description 150
- 238000000034 method Methods 0.000 title claims description 48
- 239000002131 composite material Substances 0.000 title claims description 27
- 230000008569 process Effects 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 239000010410 layer Substances 0.000 claims description 50
- 239000000463 material Substances 0.000 claims description 25
- 239000012790 adhesive layer Substances 0.000 claims description 22
- 238000009832 plasma treatment Methods 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 8
- 238000003486 chemical etching Methods 0.000 claims description 5
- 230000000295 complement effect Effects 0.000 claims description 5
- 230000010070 molecular adhesion Effects 0.000 claims description 4
- 239000000853 adhesive Substances 0.000 description 12
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 10
- 239000011347 resin Substances 0.000 description 10
- 229920005989 resin Polymers 0.000 description 10
- 229910052710 silicon Inorganic materials 0.000 description 10
- 239000010703 silicon Substances 0.000 description 10
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 9
- 229910004298 SiO 2 Inorganic materials 0.000 description 8
- 238000009826 distribution Methods 0.000 description 8
- 239000007788 liquid Substances 0.000 description 8
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- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 4
- 239000000126 substance Substances 0.000 description 4
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 238000007788 roughening Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 239000011800 void material Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000004913 activation Effects 0.000 description 2
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- 239000010408 film Substances 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- DDFHBQSCUXNBSA-UHFFFAOYSA-N 5-(5-carboxythiophen-2-yl)thiophene-2-carboxylic acid Chemical compound S1C(C(=O)O)=CC=C1C1=CC=C(C(O)=O)S1 DDFHBQSCUXNBSA-UHFFFAOYSA-N 0.000 description 1
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 238000004026 adhesive bonding Methods 0.000 description 1
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- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000005660 hydrophilic surface Effects 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
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- 230000010354 integration Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
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- 239000002184 metal Substances 0.000 description 1
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- 230000005693 optoelectronics Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000000678 plasma activation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000009827 uniform distribution Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 230000003313 weakening effect Effects 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
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- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/33—Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
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- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
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Description
―異なるタイプの該領域は、島の材料とは異なる材料からできている。
―異なるタイプの該領域は、空である。
―該工程は、
i)該相補的パターンで第1の基板の表面上にマスクを形成するステップであって、該マスクは、該パターンに対応する該区域は被覆しないことを特徴とするマスクを形成するステップと、
ii)該マスクによって被覆されない第1の基板の該区域に該島を形成するステップと
を含む。
―該プラズマは、O2タイプまたはN2タイプのもの、又はその混合タイプのものである。
―マスク除去のステップiii)がステップii)の中または後に行われる。
―接着の前に、薄層の範囲を定めるために脆弱化区域が第2の基板内に作成される。
―接着後に、第2の基板の残部は、脆弱化区域に沿って切り離される。
―接着操作は、分子付着接着操作である。
―接着の後、接着エネルギーを増強することを意図して熱処理が行われる。
―接着のステップに引き続き第1の基板から第2の基板を除去するステップが行われる。
―除去の操作は、化学エッチングによって行われる。
―剥離操作の前に、薄層は、最終的支持体に接着される。
RFパワーは0から4000ワット、
圧力は10から200mTorr、
流速は50−2000sccm、
ガスは、O2、N2、Ar、
温度は5−60℃、
時間間隔は5秒から数分。
Claims (8)
- 第2の半導電性基板上に第1の基板を接着するステップを含み、接着の前に前記第1の基板と前記第2の基板との間に接着層を形成するステップを含み、前記接着層は第1の基板の表面上に所定のパターン状に分布し、相補的パターン状に分布した異なるタイプの領域により相互に分離した複数の島を含むことを特徴とし、前記島は第1の基板の材料のプラズマ処理により形成され、
前記プラズマは、O2タイプまたはN2タイプのもの、又はその混合タイプのものであり、
接着のステップに引き続き、第2の基板と第1の基板を剥離するステップが行われ、
前記剥離ステップの前に、薄層は最終的支持体に接着され、
接着の前に、前記薄層の範囲を定めるために脆弱化区域が第2の基板内に作成され、
接着後に、前記薄層が第1の基板上に移転されるように、第2の基板の残部は、脆弱化区域に沿って切り離されることを特徴とする複合基板を製造する工程。 - 異なるタイプ前記領域は、島の材料とは異なる材料からできていることを特徴とする請求項1に記載の工程。
- 異なるタイプの前記領域は、空きであることを特徴とする請求項1に記載の工程。
- i)第1の基板の表面上に、前記相補的パターン状にマスクを形成するステップであって、前記マスクは前記パターンに対応する区域を被覆しないことを特徴とするマスクを形成するステップと、
ii)マスクにより被覆されない第1の基板の前記区域内に前記島を形成するステップと
を含むことを特徴とする請求項1乃至3のいずれか1項に記載の工程。 - マスク除去のステップiii)がステップii)の中または後に行われることを特徴とする請求項4に記載の工程。
- 接着操作は、分子付着接着操作であることを特徴とする請求項1乃至5のいずれか1項に記載の工程。
- 接着の後、接着エネルギーを増強することを意図して熱処理が行われることを特徴とする請求項1乃至6のいずれか1項に記載の工程。
- 前記剥離の操作は、化学エッチングにより行われることを特徴とする請求項1に記載の工程。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0754077A FR2914493B1 (fr) | 2007-03-28 | 2007-03-28 | Substrat demontable. |
PCT/EP2008/053563 WO2008116879A1 (en) | 2007-03-28 | 2008-03-26 | Process for manufacturing a composite substrate |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011515825A JP2011515825A (ja) | 2011-05-19 |
JP5497626B2 true JP5497626B2 (ja) | 2014-05-21 |
Family
ID=38786924
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010500258A Active JP5497626B2 (ja) | 2007-03-28 | 2008-03-26 | 複合基板を製造するための工程 |
Country Status (7)
Country | Link |
---|---|
US (1) | US8153504B2 (ja) |
EP (1) | EP2143137A1 (ja) |
JP (1) | JP5497626B2 (ja) |
KR (1) | KR101476334B1 (ja) |
CN (1) | CN101641774B (ja) |
FR (1) | FR2914493B1 (ja) |
WO (1) | WO2008116879A1 (ja) |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP5429200B2 (ja) * | 2010-05-17 | 2014-02-26 | 株式会社村田製作所 | 複合圧電基板の製造方法および圧電デバイス |
FR3005895B1 (fr) * | 2013-05-27 | 2015-06-26 | Commissariat Energie Atomique | Procede d'assemblage de deux substrats de nature differente via une couche intermediaire ductile |
CN105575869A (zh) * | 2014-10-13 | 2016-05-11 | 中芯国际集成电路制造(上海)有限公司 | 一种半导体器件及其制备方法、电子装置 |
CN106653676B (zh) * | 2015-11-03 | 2019-12-24 | 中芯国际集成电路制造(上海)有限公司 | 衬底结构、半导体器件以及制造方法 |
US10600635B2 (en) | 2017-04-20 | 2020-03-24 | Elyakim Kassel | Method and apparatus for a semiconductor-on-higher thermal conductive multi-layer composite wafer |
US10910272B1 (en) * | 2019-10-22 | 2021-02-02 | Sandisk Technologies Llc | Reusable support substrate for formation and transfer of semiconductor devices and methods of using the same |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
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US5612249A (en) * | 1996-05-14 | 1997-03-18 | Advanced Micro Devices, Inc. | Post-gate LOCOS |
JPH10239226A (ja) * | 1997-02-27 | 1998-09-11 | Sumitomo Sitix Corp | 試料作製方法及び薄膜soi基板の欠陥観察方法 |
CA2233115C (en) * | 1997-03-27 | 2002-03-12 | Canon Kabushiki Kaisha | Semiconductor substrate and method of manufacturing the same |
JP4298009B2 (ja) * | 1998-07-22 | 2009-07-15 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法及び半導体装置の作製方法 |
FR2823599B1 (fr) | 2001-04-13 | 2004-12-17 | Commissariat Energie Atomique | Substrat demomtable a tenue mecanique controlee et procede de realisation |
FR2823596B1 (fr) | 2001-04-13 | 2004-08-20 | Commissariat Energie Atomique | Substrat ou structure demontable et procede de realisation |
WO2004057663A1 (en) * | 2002-12-19 | 2004-07-08 | Koninklijke Philips Electronics N.V. | Stress-free composite substrate and method of manufacturing such a composite substrate |
FR2849017B1 (fr) * | 2002-12-20 | 2005-11-18 | Michel Bruel | Procede de traitement d'une structure pour l'obtention d'un espace interne et structure presentant un espace interne. |
CN1315155C (zh) * | 2004-03-19 | 2007-05-09 | 中国科学院上海微***与信息技术研究所 | 一种绝缘层上硅结构的制备方法 |
EP1605502A1 (en) * | 2004-06-08 | 2005-12-14 | Interuniversitair Microelektronica Centrum Vzw | Transfer method for the manufacturing of electronic devices |
FR2876220B1 (fr) * | 2004-10-06 | 2007-09-28 | Commissariat Energie Atomique | Procede d'elaboration de structures empilees mixtes, a zones isolantes diverses et/ou zones de conduction electrique verticale localisees. |
FR2876219B1 (fr) * | 2004-10-06 | 2006-11-24 | Commissariat Energie Atomique | Procede d'elaboration de structures empilees mixtes, a zones isolantes diverses et/ou zones de conduction electrique verticale localisees. |
FR2873235A1 (fr) * | 2004-12-31 | 2006-01-20 | Soitec Silicon On Insulator | Procede d'obtention d'un substrat demontable a energie de collage controlee |
JP2007173694A (ja) * | 2005-12-26 | 2007-07-05 | Canon Inc | 半導体基板の作製方法 |
US7605054B2 (en) * | 2007-04-18 | 2009-10-20 | S.O.I.Tec Silicon On Insulator Technologies | Method of forming a device wafer with recyclable support |
-
2007
- 2007-03-28 FR FR0754077A patent/FR2914493B1/fr active Active
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2008
- 2008-03-26 KR KR1020097020114A patent/KR101476334B1/ko active IP Right Grant
- 2008-03-26 EP EP08735486A patent/EP2143137A1/en not_active Withdrawn
- 2008-03-26 CN CN2008800094285A patent/CN101641774B/zh active Active
- 2008-03-26 WO PCT/EP2008/053563 patent/WO2008116879A1/en active Application Filing
- 2008-03-26 US US12/742,424 patent/US8153504B2/en active Active
- 2008-03-26 JP JP2010500258A patent/JP5497626B2/ja active Active
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CN101641774A (zh) | 2010-02-03 |
EP2143137A1 (en) | 2010-01-13 |
US8153504B2 (en) | 2012-04-10 |
FR2914493B1 (fr) | 2009-08-07 |
KR101476334B1 (ko) | 2014-12-24 |
WO2008116879A1 (en) | 2008-10-02 |
US20100323496A1 (en) | 2010-12-23 |
CN101641774B (zh) | 2012-10-24 |
KR20100014600A (ko) | 2010-02-10 |
JP2011515825A (ja) | 2011-05-19 |
FR2914493A1 (fr) | 2008-10-03 |
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