JP5451339B2 - 高周波回路と方形導波管型高周波線路との接続構造 - Google Patents
高周波回路と方形導波管型高周波線路との接続構造 Download PDFInfo
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- JP5451339B2 JP5451339B2 JP2009269451A JP2009269451A JP5451339B2 JP 5451339 B2 JP5451339 B2 JP 5451339B2 JP 2009269451 A JP2009269451 A JP 2009269451A JP 2009269451 A JP2009269451 A JP 2009269451A JP 5451339 B2 JP5451339 B2 JP 5451339B2
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- conductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
- H01L2924/30111—Impedance matching
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- Waveguides (AREA)
- Waveguide Connection Structure (AREA)
Description
図1は本発明の第1の実施の形態の一例の高周波回路と方形導波管型高周波線路との接続構造を模式的に示す斜視図である。図2は図1に示す高周波回路と方形導波管型高周波線路との接続構造を模式的に示す平面図である。なお、図1においては、構造をわかりやすくするために誘電体基板11を透視した状態を示している。
本発明は前述した実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲において種々の変更,改良が可能である。
20:方形導波管型高周波線路
21:上側導体層
22:下側導体層
23a,23b:側壁用貫通導体群
31a,31b,31c:終端用貫通導体
32:終端用導体
42:高周波信号端子
43a,43b:接地端子
51:第1の導線
52a,52b:第2の導線
61:間隙
63:延長部
Claims (2)
- 誘電体基板,該誘電体基板の上面に配置された上側導体層,前記誘電体基板の下面に配置された下側導体層,ならびに高周波信号の伝播方向に前記高周波信号の波長の1/2未満の繰り返し間隔で前記上側導体層および前記下側導体層を電気的に接続するように配置された2列の側壁用貫通導体群で構成されており、前記上側導体層,前記下側導体層および前記2列の側壁用貫通導体群で囲まれた領域によって前記高周波信号を伝送する方形導波管型高周波線路と、
前記誘電体基板および前記下側導体層が前記方形導波管型高周波線路の一方端部から前記高周波信号の伝播方向に延長された延長部と、
該延長部の上面に前記上側導体層と間隙をあけて配置されており、前記延長部の前記誘電体基板を貫通する終端用貫通導体を介して前記延長部の前記下側導体層に接続されている終端用導体と、
前記間隙を間に挟んで前記上側導体層と反対側に配置された、前記高周波信号の入力および出力の少なくとも一方のための高周波信号端子および該高周波信号端子に隣接して配置された接地端子を有する高周波回路と、
一方端が前記高周波信号端子に接続されて該高周波信号端子から前記間隙へ向かうように配置された第1の導線と、
一方端が前記接地端子に接続されて該接地端子から前記間隙へ向かうように配置された第2の導線とを備え、
前記誘電体基板の厚み方向から見たときに、前記第1の導線の他方端と前記第2の導線の他方端とを結ぶ線分が前記間隙を横断するように、前記第1の導線は前記間隙上を横断して他方端が前記上側導体層に接続されているとともに、前記第2の導線は前記間隙上を横断することなく他方端が前記終端用導体に接続されていることを特徴とする高周波回路と方形導波管型高周波線路との接続構造。 - 前記接地端子が間隔をあけて2つ配置されているとともに該2つの接地端子の間に前記高周波信号端子が配置されており、一方端が前記2つの接地端子にそれぞれ接続された2本の前記第2の導線が、それぞれ前記第1の導線の両側で前記2つの接地端子から前記間隙に向かうように配置されていることを特徴とする請求項1に記載の高周波回路と方形導波管型高周波線路との接続構造。
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JP2009269451A JP5451339B2 (ja) | 2009-11-27 | 2009-11-27 | 高周波回路と方形導波管型高周波線路との接続構造 |
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JP2009269451A JP5451339B2 (ja) | 2009-11-27 | 2009-11-27 | 高周波回路と方形導波管型高周波線路との接続構造 |
Publications (2)
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JP2011114595A JP2011114595A (ja) | 2011-06-09 |
JP5451339B2 true JP5451339B2 (ja) | 2014-03-26 |
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JP2009269451A Expired - Fee Related JP5451339B2 (ja) | 2009-11-27 | 2009-11-27 | 高周波回路と方形導波管型高周波線路との接続構造 |
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Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US9588291B2 (en) * | 2013-12-31 | 2017-03-07 | Medlumics, S.L. | Structure for optical waveguide and contact wire intersection |
CN116979255B (zh) * | 2023-09-22 | 2023-12-19 | 浪潮(山东)计算机科技有限公司 | 一种接地结构及信号装置 |
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WO2009084697A1 (ja) * | 2007-12-28 | 2009-07-09 | Kyocera Corporation | 高周波伝送線路の接続構造、配線基板、高周波モジュールおよびレーダ装置 |
US8854152B2 (en) * | 2009-02-25 | 2014-10-07 | Kyocera Corporation | High-frequency module including a conductor with a slot therein and a conductive wire crossing over the slot and physically contacting the conductor |
JP2011024198A (ja) * | 2009-06-19 | 2011-02-03 | Toyota Central R&D Labs Inc | 高周波回路チップを実装した電子装置 |
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