JP5182792B2 - マルチコアプロセッサ制御方法及び装置 - Google Patents
マルチコアプロセッサ制御方法及び装置 Download PDFInfo
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- JP5182792B2 JP5182792B2 JP2007262792A JP2007262792A JP5182792B2 JP 5182792 B2 JP5182792 B2 JP 5182792B2 JP 2007262792 A JP2007262792 A JP 2007262792A JP 2007262792 A JP2007262792 A JP 2007262792A JP 5182792 B2 JP5182792 B2 JP 5182792B2
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- 238000000034 method Methods 0.000 title claims description 79
- 238000012545 processing Methods 0.000 claims description 86
- 238000004364 calculation method Methods 0.000 claims description 21
- 238000001514 detection method Methods 0.000 claims description 4
- 238000005259 measurement Methods 0.000 description 40
- 238000005516 engineering process Methods 0.000 description 4
- 230000020169 heat generation Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000011161 development Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
- G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
- G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
- G06F9/3889—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute
- G06F9/3891—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by multiple instructions, e.g. MIMD, decoupled access or execute organised in groups of units sharing resources, e.g. clusters
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5061—Partitioning or combining of resources
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5094—Allocation of resources, e.g. of the central processing unit [CPU] where the allocation takes into account power or heat criteria
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Multimedia (AREA)
- Microcomputers (AREA)
- Power Sources (AREA)
Description
各コアの稼働回数を合計して全コアの稼働率を算出することを特徴とする。
2 タスクリスト
3 第1タスク
4 第2タスク
5 コア0スレッド
6 コア1スレッド
7 コア2スレッド
8 コア3スレッド
9 稼働コア選択処理部
10 コア毎稼働率計算部
11 全体稼働率算出部
12 稼働コア数決定部
13 稼働率・稼働コア数対応テーブル
14 稼働コア選択部
15 稼働コア記憶部
Claims (6)
- 1つのプロセッサーに各々独立して演算処理を行う複数のコアを備えるマルチコアプロセッサの制御方法において、
所定時間内での各コアの稼働率を計算し全コアの稼働率を合計し、
前記合計した全体稼働率に応じて稼働するコア数を決定し、
前記決定したコア数に応じて稼働するコアを選択し、
前記各コアの稼働率は、所定時間内での稼働回数であり、
各コアの稼働回数を合計して全コアの稼働率を算出することを特徴とするマルチコアプロセッサ制御方法。 - 例外処理の発生を検出したとき全コアを稼働させることを特徴とする請求項1記載のマルチコアプロセッサ制御方法。
- 例外処理の発生に伴い全コアを稼働させた後に、所定時間経過後において例外処理を行う状態が解消したことを検出したときには、前記コアの選択処理を再開することを特徴とする請求項2記載のマルチコアプロセッサ制御方法。
- 前記例外処理は、請求項1記載のマルチコアプロセッサ制御方法の作動が適切に行われていないことを検出したときに行うことを特徴とする請求項2記載のマルチコアプロセッサ制御方法。
- 1つのプロセッサに各々独立して演算処理を行う複数のコアを備えるマルチコアプロセッサの制御装置において、
所定時間内での各コアの稼働率を計算するコア稼働率計算手段と、
前記コア稼働率計算手段で計算した各コアの稼働率を合計し、プロセッサの全体稼働率を算出する全体稼働率算出手段と、
プロセッサの全体稼働率と稼働コア数との関係を対応して記憶する稼働コア数記憶手段と、
プロセッサの全体稼働率により前記稼働コア数記憶手段から稼働コア数を決定する稼働コア数決定手段と、
前記稼働コア数決定手段で決定したコア数に対応して稼働するコアを選択する稼働コア選択手段とを備え、
前記コア稼働率計算手段では、所定時間内での各コアの稼働回数により各コアの稼働率を求め、前記全体稼働率算出手段では、各コアの稼働回数を合計して全体稼働率を算出することを特徴とするマルチコアプロセッサ制御装置。 - マルチコアプロセッサの例外処理発生状態を検出する例外処理発生検出手段を備え、
前記例外処理発生検出手段で例外処理発生状態になったことを検出したとき、全てのコアの稼働を決定する手段を備えることを特徴とする請求項5記載のマルチコアプロセッサ制御装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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JP2007262792A JP5182792B2 (ja) | 2007-10-07 | 2007-10-07 | マルチコアプロセッサ制御方法及び装置 |
US12/184,922 US8209552B2 (en) | 2007-10-07 | 2008-08-01 | Method and device for controlling multicore processor |
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JP2007262792A JP5182792B2 (ja) | 2007-10-07 | 2007-10-07 | マルチコアプロセッサ制御方法及び装置 |
Publications (2)
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JP2009093383A JP2009093383A (ja) | 2009-04-30 |
JP5182792B2 true JP5182792B2 (ja) | 2013-04-17 |
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2007
- 2007-10-07 JP JP2007262792A patent/JP5182792B2/ja active Active
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Publication number | Publication date |
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JP2009093383A (ja) | 2009-04-30 |
US20090094437A1 (en) | 2009-04-09 |
US8209552B2 (en) | 2012-06-26 |
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