JP5053084B2 - 半導体装置およびその製造方法 - Google Patents
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- JP5053084B2 JP5053084B2 JP2007518815A JP2007518815A JP5053084B2 JP 5053084 B2 JP5053084 B2 JP 5053084B2 JP 2007518815 A JP2007518815 A JP 2007518815A JP 2007518815 A JP2007518815 A JP 2007518815A JP 5053084 B2 JP5053084 B2 JP 5053084B2
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- 239000004065 semiconductor Substances 0.000 title claims description 57
- 238000004519 manufacturing process Methods 0.000 title claims description 43
- 230000001681 protective effect Effects 0.000 claims description 58
- 229910052751 metal Inorganic materials 0.000 claims description 33
- 239000002184 metal Substances 0.000 claims description 33
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 32
- 238000000034 method Methods 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 24
- 230000008569 process Effects 0.000 claims description 6
- 238000005498 polishing Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 244
- 230000015654 memory Effects 0.000 description 66
- 239000011229 interlayer Substances 0.000 description 14
- 229910021332 silicide Inorganic materials 0.000 description 14
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 14
- 229910052814 silicon oxide Inorganic materials 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 13
- 229910052581 Si3N4 Inorganic materials 0.000 description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 11
- 229920002120 photoresistant polymer Polymers 0.000 description 9
- 239000011241 protective layer Substances 0.000 description 9
- 238000002513 implantation Methods 0.000 description 8
- 230000006866 deterioration Effects 0.000 description 7
- 238000005530 etching Methods 0.000 description 5
- 238000003860 storage Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000007687 exposure technique Methods 0.000 description 4
- 238000010438 heat treatment Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000010936 titanium Substances 0.000 description 4
- -1 Metal Oxide Nitride Chemical class 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- 239000010941 cobalt Substances 0.000 description 2
- 229910017052 cobalt Inorganic materials 0.000 description 2
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- High Energy & Nuclear Physics (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Non-Volatile Memory (AREA)
- Semiconductor Memories (AREA)
Description
10nmとする。これにより、ONO膜18の膜厚は、例えば約30nmとなる。図5(d)において、トップ酸化膜16上に、通常の露光技術およびエッチング法により多結晶シリコンのワードライン24を形成する。
10nmのトップ酸化膜16(酸化シリコン膜)を形成する。これにより、ONO膜18の膜厚は例えば約30nmとなる。図10(b)において、実施例1と同様に、トップ酸化膜16上にワードライン24を形成する。その後、層間絶縁膜40、配線層42、保護層44を形成し、実施例4に係るフラッシュメモリが完成する。
Claims (6)
- 半導体基板上に形成されたONO膜と、
該ONO膜上に形成されたワードラインと、
前記半導体基板内に形成されたビットラインと、
前記ビットラインに接し、前記ビットラインの長手方向に延在し、多結晶シリコン層または金属層を含む導電層とを備え、
前記導電層が前記ONO膜に埋め込まれ、前記ONO膜の表面が平坦化された、半導体装置。 - 前記ワードラインと前記導電層が、前記ONO膜中のトップ酸化膜の少なくとも一部で絶縁された請求項1記載の半導体装置。
- 前記導電層が電流の流れる方向に連続して延在する、請求項1または2記載の半導体装置。
- 前記ワードライン上を交差し、前記ビットラインの長手方向に延在した配線層と、
前記ワードラインの長手方向に延在し、複数の前記ワードラインを配置したワードライン領域間に設けられたビットラインコンタクト領域とを備え、
前記ビットラインコンタクト領域において、前記配線層は1本おきに、前記導電層と接続し、
前記ビットラインコンタクト領域において、前記配線層と接続する前記導電層は、前記ビットラインコンタクト領域内に前記ワードライン領域内の前記ビットラインの幅より幅の広いコンタクトパッドを有する請求項1から3のいずれか一項記載の半導体装置。 - 半導体基板上にトンネル酸化膜およびトラップ層を形成する工程と、
前記トラップ層上に保護膜を形成する工程と、
前記半導体基板内にビットラインを形成する工程と、
前記トンネル酸化膜、前記トラップ層および前記保護膜に前記ビットラインに接する開口部を形成する工程と、
前記ビットラインに接し、前記ビットラインの長手方向に延在し、多結晶シリコンまたは金属層を含む導電層を形成する工程とを備え、
前記導電層を形成する工程は、
前記保護膜の上面、前記開口部の内部および上に、多結晶シリコン層または金属層を形成する工程と、前記多結晶シリコン層または金属層および前記保護膜を、該保護膜の途中まで研磨し、前記導電層および前記保護膜の上面が同一面となるように平坦化する工程と、
露出した前記保護膜および前記導電層の上面に、トップ酸化膜の一部を形成する工程とを備える、半導体装置の製造方法。 - 前記開口部を形成する工程は、前記トップ酸化膜上に形成されたマスク層および前記マスク層の側面に形成された側壁をマスクに、前記保護膜、前記トラップ層および前記トンネル酸化膜をエッチングする工程である、請求項5記載の半導体装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/009878 WO2006129341A1 (ja) | 2005-05-30 | 2005-05-30 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JPWO2006129341A1 JPWO2006129341A1 (ja) | 2008-12-25 |
JP5053084B2 true JP5053084B2 (ja) | 2012-10-17 |
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Application Number | Title | Priority Date | Filing Date |
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JP2007518815A Active JP5053084B2 (ja) | 2005-05-30 | 2005-05-30 | 半導体装置およびその製造方法 |
Country Status (3)
Country | Link |
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US (2) | US7943982B2 (ja) |
JP (1) | JP5053084B2 (ja) |
WO (1) | WO2006129341A1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7538384B2 (en) * | 2005-12-05 | 2009-05-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Non-volatile memory array structure |
US8188536B2 (en) * | 2006-06-26 | 2012-05-29 | Macronix International Co., Ltd. | Memory device and manufacturing method and operating method thereof |
JP5281770B2 (ja) * | 2007-08-17 | 2013-09-04 | スパンション エルエルシー | 半導体装置およびその製造方法 |
JP5379366B2 (ja) * | 2007-09-20 | 2013-12-25 | スパンション エルエルシー | 半導体装置およびその製造方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0766372A (ja) * | 1993-08-27 | 1995-03-10 | Sony Corp | 拡散抵抗層の形成方法 |
JPH07106443A (ja) * | 1993-09-30 | 1995-04-21 | Nkk Corp | 不揮発性半導体記憶装置及びその製造方法 |
JP2002026149A (ja) * | 2000-05-02 | 2002-01-25 | Sony Corp | 不揮発性半導体記憶装置およびその動作方法 |
JP2005057127A (ja) * | 2003-08-06 | 2005-03-03 | Renesas Technology Corp | 半導体記憶装置およびその製造方法 |
Family Cites Families (4)
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US5631179A (en) * | 1995-08-03 | 1997-05-20 | Taiwan Semiconductor Manufacturing Company | Method of manufacturing metallic source line, self-aligned contact for flash memory devices |
US5768192A (en) | 1996-07-23 | 1998-06-16 | Saifun Semiconductors, Ltd. | Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping |
US6133096A (en) * | 1998-12-10 | 2000-10-17 | Su; Hung-Der | Process for simultaneously fabricating a stack gate flash memory cell and salicided periphereral devices |
EP1300888B1 (en) * | 2001-10-08 | 2013-03-13 | STMicroelectronics Srl | Process for manufacturing a dual charge storage location memory cell |
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2005
- 2005-05-30 WO PCT/JP2005/009878 patent/WO2006129341A1/ja active Application Filing
- 2005-05-30 JP JP2007518815A patent/JP5053084B2/ja active Active
-
2006
- 2006-05-30 US US11/444,216 patent/US7943982B2/en active Active
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2011
- 2011-04-07 US US13/081,777 patent/US8278171B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0766372A (ja) * | 1993-08-27 | 1995-03-10 | Sony Corp | 拡散抵抗層の形成方法 |
JPH07106443A (ja) * | 1993-09-30 | 1995-04-21 | Nkk Corp | 不揮発性半導体記憶装置及びその製造方法 |
JP2002026149A (ja) * | 2000-05-02 | 2002-01-25 | Sony Corp | 不揮発性半導体記憶装置およびその動作方法 |
JP2005057127A (ja) * | 2003-08-06 | 2005-03-03 | Renesas Technology Corp | 半導体記憶装置およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
US7943982B2 (en) | 2011-05-17 |
WO2006129341A1 (ja) | 2006-12-07 |
US8278171B2 (en) | 2012-10-02 |
JPWO2006129341A1 (ja) | 2008-12-25 |
US20060278936A1 (en) | 2006-12-14 |
US20110183510A1 (en) | 2011-07-28 |
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