JP5040421B2 - 定電圧回路、定電圧供給システム、および定電圧供給方法 - Google Patents
定電圧回路、定電圧供給システム、および定電圧供給方法 Download PDFInfo
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- JP5040421B2 JP5040421B2 JP2007122536A JP2007122536A JP5040421B2 JP 5040421 B2 JP5040421 B2 JP 5040421B2 JP 2007122536 A JP2007122536 A JP 2007122536A JP 2007122536 A JP2007122536 A JP 2007122536A JP 5040421 B2 JP5040421 B2 JP 5040421B2
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- 238000000034 method Methods 0.000 title claims description 10
- 238000006243 chemical reaction Methods 0.000 claims description 12
- 239000003990 capacitor Substances 0.000 claims description 6
- 230000001052 transient effect Effects 0.000 description 18
- 238000010586 diagram Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- 230000007423 decrease Effects 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 4
- 230000010355 oscillation Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—DC amplifiers in which all stages are DC-coupled
- H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
- H03F3/347—DC amplifiers in which all stages are DC-coupled with semiconductor devices only in integrated circuits
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Amplifiers (AREA)
- Control Of Electrical Variables (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
VX=VIN+(n+1)・VGS
となる。
VOUT=VIN+n・VGS
となる。
ΔVX=t・I1/C1=10(μsec)・10(nA)/1(pF)=0.1Vとなる。10μsecの入力電圧信号VINの過渡上昇時間において、接続点Xの電圧信号Xの変動幅(ΔVX)は、0.1V程度に抑えることができる。すなわち、出力電圧VOUTの変動幅を0.1V程度に押させることができる。
2 後段回路
A 入力端子
C1、C2、CC 容量素子
D ダイオード部
D1〜Dn ダイオード
IS 定電流源
M1、Q1、Q3、Q5、Q7、Q9 PMOSトランジスタ
M2、Q2、Q4、Q6、Q8、Q10、Q14 NMOSトランジスタ
R2 抵抗素子
VIN 電圧供給部
VOUT 出力端子
Claims (8)
- ベース端子またはゲート端子に入力電圧信号が入力される入力トランジスタと、
前記入力トランジスタのエミッタ端子またはソース端子に対してバイアス電流を流す定電流源と、
前記定電流源から前記入力トランジスタのエミッタ端子またはソース端子に至る経路に一端が接続される容量素子と、
前記容量素子の一端に生成される電圧信号を入力とし、定電圧を出力するエミッタまたはソースフォロア回路とを備えることを特徴とする定電圧回路。 - 前記容量素子の他端は、電源電圧または接地電圧に接続されることを特徴とする請求項1に記載の定電圧回路。
- 前記入力トランジスタと前記定電流源とを接続する経路であって前記入力トランジスタから前記容量素子に至る経路に、少なくとも一つのダイオードを備えることを特徴とする請求項1または2に記載の定電圧回路。
- 前記ダイオードは、ダイオード接続されたトランジスタであることを特徴とする請求項3に記載の定電圧回路。
- バンドギャップリファレンス回路を備え、
前記入力電圧信号は、前記バンドギャップリファレンス回路から出力されることを特徴とする請求項1乃至4の少なくとも何れか1項に記載の定電圧回路。 - 後段回路に対して所定電圧を供給する定電圧供給システムであって、
入力電圧信号を供給する電圧供給部と、
ベース端子またはゲート端子に前記入力電圧信号が入力される入力トランジスタと、
前記入力トランジスタのエミッタ端子またはソース端子に対してバイアス電流を流す定電流源と、
前記入力トランジスタと前記定電流源とを接続する経路に一端が接続される容量素子と、
前記容量素子の一端に生成される電圧信号を入力とし、前記後段回路に定電圧を供給するエミッタまたはソースフォロア回路とを備えることを特徴とする定電圧供給システム。 - 入力電圧信号を入力トランジスタのベース端子またはゲート端子に入力するステップと、
前記入力トランジスタのエミッタ端子またはソース端子に対して定電流源からバイアス電流を流すステップと、
前記バイアス電流により、前記入力電圧信号を前記入力トランジスタの導通制御電圧に応じてレベル変換して前記エミッタ端子または前記ソース端子から電圧信号を出力するステップと、
前記定電流源から前記入力トランジスタのエミッタ端子またはソース端子に至る経路に一端が接続され、電源電圧又は接地電圧に他端が接続される容量素子により、ローパスフィルタ特性を付与するステップと、
前記電圧信号を入力としてエミッタフォロア回路またはソースフォロア回路から電圧を出力するステップとを有することを特徴とする定電圧供給方法。 - 前記導通制御電圧は、MOSトランジスタにおいてドレイン電流が流れる際のゲート・ソース間電圧、バイポーラトランジスタにおいてコレクタ電流が流れる際のベース・エミッタ間電圧、およびダイオードの順方向電圧を含むことを特徴とする請求項7に記載の定電圧供給方法。
Priority Applications (2)
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JP2007122536A JP5040421B2 (ja) | 2007-05-07 | 2007-05-07 | 定電圧回路、定電圧供給システム、および定電圧供給方法 |
US12/115,934 US7990207B2 (en) | 2007-05-07 | 2008-05-06 | Constant voltage circuit, constant voltage supply system and constant voltage supply method |
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JP2007122536A JP5040421B2 (ja) | 2007-05-07 | 2007-05-07 | 定電圧回路、定電圧供給システム、および定電圧供給方法 |
Publications (2)
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JP2008276696A JP2008276696A (ja) | 2008-11-13 |
JP5040421B2 true JP5040421B2 (ja) | 2012-10-03 |
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US (1) | US7990207B2 (ja) |
JP (1) | JP5040421B2 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201037481A (en) * | 2009-04-14 | 2010-10-16 | Univ Chung Yuan Christian | Current mirror containing high output impedance |
JP2011211444A (ja) * | 2010-03-29 | 2011-10-20 | Seiko Instruments Inc | 内部電源電圧生成回路 |
JP2012019625A (ja) * | 2010-07-08 | 2012-01-26 | Ricoh Co Ltd | 駆動回路、該駆動回路を備えた半導体装置、これらを用いたスイッチングレギュレータおよび電子機器 |
US8581569B2 (en) * | 2011-02-24 | 2013-11-12 | Touchstone Semiconductor, Inc. | Supply independent current reference generator in CMOS technology |
US20120218034A1 (en) * | 2011-02-28 | 2012-08-30 | Sebastian Turullols | Voltage calibration method and apparatus |
US8729874B2 (en) * | 2011-06-10 | 2014-05-20 | Cypress Semiconductor Corporation | Generation of voltage supply for low power digital circuit operation |
JP6488674B2 (ja) * | 2013-12-25 | 2019-03-27 | パナソニック株式会社 | Dcオフセットキャンセル回路 |
US9847772B2 (en) * | 2016-02-03 | 2017-12-19 | Qualcomm Incorporated | N-path filters with flatter frequency response |
Family Cites Families (16)
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US4064506A (en) * | 1976-04-08 | 1977-12-20 | Rca Corporation | Current mirror amplifiers with programmable current gains |
JPS6199405A (ja) * | 1984-10-19 | 1986-05-17 | Sanyo Electric Co Ltd | Dcオフセツト電圧補正回路 |
JPH0418250Y2 (ja) * | 1985-07-15 | 1992-04-23 | ||
JPH073646B2 (ja) * | 1989-08-03 | 1995-01-18 | ローム株式会社 | 定電流回路 |
US5124632A (en) * | 1991-07-01 | 1992-06-23 | Motorola, Inc. | Low-voltage precision current generator |
FR2732129B1 (fr) * | 1995-03-22 | 1997-06-20 | Suisse Electronique Microtech | Generateur de courant de reference en technologie cmos |
JP3556328B2 (ja) * | 1995-07-11 | 2004-08-18 | 株式会社ルネサステクノロジ | 内部電源回路 |
JP3195913B2 (ja) * | 1996-04-30 | 2001-08-06 | 株式会社東芝 | 半導体集積回路装置 |
JPH1115545A (ja) * | 1997-06-26 | 1999-01-22 | Matsushita Electric Ind Co Ltd | 半導体装置 |
US6489835B1 (en) * | 2001-08-28 | 2002-12-03 | Lattice Semiconductor Corporation | Low voltage bandgap reference circuit |
JP2004096702A (ja) * | 2002-02-20 | 2004-03-25 | Mitsubishi Electric Corp | 駆動回路 |
US6914475B2 (en) * | 2002-06-03 | 2005-07-05 | Intersil Americas Inc. | Bandgap reference circuit for low supply voltage applications |
US6724176B1 (en) * | 2002-10-29 | 2004-04-20 | National Semiconductor Corporation | Low power, low noise band-gap circuit using second order curvature correction |
US7675353B1 (en) * | 2005-05-02 | 2010-03-09 | Atheros Communications, Inc. | Constant current and voltage generator |
US7332965B2 (en) * | 2006-04-19 | 2008-02-19 | Texas Instruments Incorporated | Gate leakage insensitive current mirror circuit |
US7471138B1 (en) * | 2006-05-09 | 2008-12-30 | Altera Corporation | DC output voltage circuit with substantially flat PSRR |
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2007
- 2007-05-07 JP JP2007122536A patent/JP5040421B2/ja active Active
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JP2008276696A (ja) | 2008-11-13 |
US20090146729A1 (en) | 2009-06-11 |
US7990207B2 (en) | 2011-08-02 |
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