JP5024117B2 - Circuit member mounting method - Google Patents

Circuit member mounting method Download PDF

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JP5024117B2
JP5024117B2 JP2008050169A JP2008050169A JP5024117B2 JP 5024117 B2 JP5024117 B2 JP 5024117B2 JP 2008050169 A JP2008050169 A JP 2008050169A JP 2008050169 A JP2008050169 A JP 2008050169A JP 5024117 B2 JP5024117 B2 JP 5024117B2
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circuit
circuit member
chip
mounting method
substrate
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JP2009111326A (en
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宏治 濱口
俊明 田中
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Showa Denko Materials Co Ltd
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Hitachi Chemical Co Ltd
Showa Denko Materials Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides

Description

本発明は、ＩＣチップなどの回路部材を基板上に実装する方法に関する。   The present invention relates to a method for mounting a circuit member such as an IC chip on a substrate.

多数の電極を有する回路部材同士を電気的に接続するための接続材料として、異方導電フィルム（ＡＣＦ）、異方導電性ペースト（ＡＣＰ）、非導電性フィルム（ＮＣＦ）等が使用されている。これらの接続材料は、プリント配線基板、ＬＣＤ用ガラス基板、フレキシブルプリント基板等の基板に、ＩＣ、ＬＳＩ等の半導体素子やパッケージなどの被接続部材を接続する際、相対する電極同士の導通状態を保ち、隣接する電極同士の絶縁を保つように電気的接続と機械的固着を行うものである。   Anisotropic conductive film (ACF), anisotropic conductive paste (ACP), non-conductive film (NCF), etc. are used as a connection material for electrically connecting circuit members having a large number of electrodes. . These connection materials are used to connect conductive electrodes between opposing electrodes when connecting a semiconductor element such as an IC or LSI or a connected member such as a package to a substrate such as a printed circuit board, LCD glass substrate, or flexible printed circuit board. The electrical connection and the mechanical fixation are performed so as to maintain the insulation between the adjacent electrodes.

上記の接続材料は、熱硬化性樹脂を含む接着剤成分と、必要により配合される導電粒子とを含有する接着剤組成物からなるものが一般的である。この接着剤組成物をＰＥＴ（ポリエチレンテレフタレート）等の基材上に積層し、フィルム状に形成したものが製品化されている。熱硬化性樹脂を含有する接続材料を使用する際には、２つの被接続部材の間に当該接続材料を介在させ、加熱しながら圧着することによって熱硬化性樹脂を硬化させる。これにより、部材間の機械的固着を得ると共に、対向する電極間を直接または導電粒子を介して接触させて電気的接続を得る。   As for said connection material, what consists of an adhesive composition containing the adhesive component containing a thermosetting resin and the electrically-conductive particle mix | blended as needed is common. A product obtained by laminating this adhesive composition on a substrate such as PET (polyethylene terephthalate) and forming it into a film has been commercialized. When using a connection material containing a thermosetting resin, the thermosetting resin is cured by interposing the connection material between two members to be connected and pressing it while heating. As a result, mechanical fixation between the members is obtained, and the opposing electrodes are brought into contact with each other directly or through conductive particles to obtain an electrical connection.

ところで、電極が形成されたガラス基板上に、接続材料を介してＩＣチップなどの電子部品を接続するＣＯＧ（Ｃｈｉｐ Ｏｎ Ｇｌａｓｓ）実装を行う場合、図７に示すような熱圧着装置が使用される。同図に示す熱圧着装置１０は、ガラス基板等を載置するステージ４と、鉛直方向に移動可能であり、当接面の温度調整が可能な圧着ヘッド５とを備える。   By the way, when performing COG (Chip On Glass) mounting for connecting an electronic component such as an IC chip through a connection material on a glass substrate on which electrodes are formed, a thermocompression bonding apparatus as shown in FIG. 7 is used. . The thermocompression bonding apparatus 10 shown in the figure includes a stage 4 on which a glass substrate or the like is placed, and a pressure bonding head 5 that can move in the vertical direction and can adjust the temperature of the contact surface.

例えば、基板に対するＩＣチップのＣＯＧ実装を、熱圧着装置１０を用いて行うには、図７に示すように、まず、電極１ａが設けられた面を上方に向けてガラス基板１をステージ４上に載置し、その上に熱硬化型の回路接続材料２を貼り付ける。次いで、ＩＣチップ３の電極３ａとガラス基板１の電極１ａの位置が合うように、回路接続材料２上にＩＣチップ３を載置する。その後、圧着ヘッド５を降下させると共に、圧着ヘッド５の熱で回路接続材料２を硬化させ、ガラス基板１上にＩＣチップ３を実装する。   For example, to perform COG mounting of the IC chip on the substrate using the thermocompression bonding apparatus 10, first, as shown in FIG. 7, the glass substrate 1 is placed on the stage 4 with the surface provided with the electrode 1a facing upward. The thermosetting circuit connection material 2 is affixed thereon. Next, the IC chip 3 is placed on the circuit connection material 2 so that the electrode 3a of the IC chip 3 and the electrode 1a of the glass substrate 1 are aligned. Thereafter, the crimping head 5 is lowered and the circuit connection material 2 is cured by the heat of the crimping head 5, and the IC chip 3 is mounted on the glass substrate 1.

上記熱圧着装置１０のような装置を使用し、基板上に厚さ２００μｍ以下の薄いＩＣチップを実装する場合、圧着ヘッドとＩＣチップとの間に金属フィルムを配置して熱圧着を行うという手法が知られている（特許文献１）。この金属フィルムの配置は、電極が存在しないＩＣチップ３の中央部に生じるたわみを抑制し、ＩＣチップ３の変形を低減することを目的としたものということができる。
特開２００６−２２９１２４号公報 When a thin IC chip having a thickness of 200 μm or less is mounted on a substrate using a device such as the above-described thermocompression bonding apparatus 10, a method of performing thermocompression bonding by placing a metal film between the pressure bonding head and the IC chip. Is known (Patent Document 1). It can be said that the arrangement of the metal film is intended to suppress the deflection generated in the central portion of the IC chip 3 where no electrode is present and to reduce the deformation of the IC chip 3.
JP 2006-229124 A

しかしながら、上記特許文献１のように、ＩＣチップなどの回路部材と圧着ヘッドとの間に金属フィルムを介在させた場合、実装された回路部材に接着剤成分が付着し、これに金属フィルムが付着するおそれがある。回路部材に金属フィルムが付着した状態では、回路部材付近の電気回路又はその他の回路部材と金属フィルムが接触し、短絡故障を引き起こす可能性がある。   However, as in Patent Document 1, when a metal film is interposed between a circuit member such as an IC chip and a crimping head, an adhesive component adheres to the mounted circuit member, and the metal film adheres to this. There is a risk. When the metal film is attached to the circuit member, the metal film may come into contact with an electric circuit in the vicinity of the circuit member or another circuit member, which may cause a short circuit failure.

短絡故障を未然に防止するためには、付着した金属フィルムを回路部材から取り除く作業を行うか、あるいは、金属フィルムの表面にはく離加工を施す必要がある。つまり、従来の方法は、回路部材の変形を防止するのに金属フィルムを使用するため、短絡故障の防止のための工程が必要となり、作業性及び経済性の点において改善の余地があった。   In order to prevent a short-circuit failure, it is necessary to remove the attached metal film from the circuit member or to peel the surface of the metal film. In other words, the conventional method uses a metal film to prevent deformation of the circuit member, and thus a process for preventing a short circuit failure is required, and there is room for improvement in terms of workability and economy.

本発明は、このような実情に鑑みてなされたものであり、回路部材の変形を十分効率的に抑制できる回路部材実装方法を提供することを目的とする。   This invention is made | formed in view of such a situation, and it aims at providing the circuit member mounting method which can suppress a deformation | transformation of a circuit member sufficiently efficiently.

本発明に係る回路部材実装方法は、回路部材を基板の方向に押圧する圧着ヘッドを用いて回路部材の実装を行うものであって、基板と回路部材との間に回路接続材料を介在させ、回路接続材料が所定温度となるように加熱しながら、圧着ヘッドによって回路部材を基板に押圧して両者を接着する熱圧着工程を備え、この熱圧着工程において、圧着ヘッドによる押圧を行うに際し、圧着ヘッドと回路部材と間に、厚さが９０μｍ以下であり且つ所定温度における弾性率が０．５ＧＰａ以上の絶縁性フィルムを介在させることを特徴とする。   The circuit member mounting method according to the present invention is a method of mounting a circuit member using a crimping head that presses the circuit member in the direction of the substrate, and interposing a circuit connection material between the substrate and the circuit member, The circuit connection material is heated to a predetermined temperature, and is equipped with a thermocompression bonding process in which the circuit member is pressed against the substrate by the crimping head and bonded to each other. An insulating film having a thickness of 90 μm or less and an elastic modulus of 0.5 GPa or more at a predetermined temperature is interposed between the head and the circuit member.

本発明に係る回路部材実装方法によれば、上記のように厚さ及び弾性率についての所定の条件を満たす絶縁性フィルムを、圧着ヘッドと回路部材との間に介在させることで、熱圧着工程における回路部材の変形を十分に抑制できる。また、圧着ヘッドと回路部材との間に介在する絶縁性フィルムによって、回路接続材料の接着剤成分が圧着ヘッドに付着することを防止でき、適正な圧着条件で熱圧着工程を連続的に行うことができる。なお、圧着ヘッドと回路部材との間に介在させるフィルムが絶縁性であるため、仮に、回路接続材料の接着剤成分によって回路部材に当該絶縁性フィルムが付着し、残存していても、これが直ちに短絡故障の原因となることはない。   According to the circuit member mounting method of the present invention, the insulating film satisfying the predetermined conditions for the thickness and the elastic modulus as described above is interposed between the pressure bonding head and the circuit member, thereby the thermocompression bonding step. The deformation of the circuit member can be sufficiently suppressed. In addition, the insulating film interposed between the crimping head and the circuit member can prevent the adhesive component of the circuit connection material from adhering to the crimping head, and the thermocompression bonding process is continuously performed under appropriate crimping conditions. Can do. In addition, since the film interposed between the crimping head and the circuit member is insulative, even if the insulating film adheres to the circuit member due to the adhesive component of the circuit connecting material and remains, this is immediately It will not cause a short circuit failure.

本発明の回路部材実装方法は、基板に実装される回路部材がＩＣチップである場合に好適であり、当該ＩＣチップの厚さが２００μｍ以下である場合に特に好適である。ＩＣチップは、基板と接続される電極がＩＣチップの端部などに配置されたものが多く、実装時のダメージを回避するためＩＣチップの中央部、すなわち、機能面上には電極が存在しないものが多い。かかる構造を有し且つ厚さが薄いＩＣチップを基板に実装する場合であっても、本発明の方法によれば、熱圧着処理によって生じるＩＣチップの変形を十分効率的に抑制できる。   The circuit member mounting method of the present invention is suitable when the circuit member mounted on the substrate is an IC chip, and particularly suitable when the thickness of the IC chip is 200 μm or less. In many IC chips, electrodes connected to the substrate are arranged at the end of the IC chip, etc., and there is no electrode in the center of the IC chip, that is, on the functional surface in order to avoid damage during mounting. There are many things. Even when an IC chip having such a structure and a small thickness is mounted on a substrate, according to the method of the present invention, the deformation of the IC chip caused by the thermocompression treatment can be suppressed sufficiently efficiently.

回路接続材料としては、例えば、熱可塑性樹脂を使用したものも例示できるが、熱硬化性樹脂を含む接着剤成分を含有するものを使用することが好ましい。熱圧着工程において、熱硬化性樹脂を硬化させることで、高い接続信頼性を有する回路接続体を製造できる。また、回路接続材料は接着剤成分中に分散した導電粒子を更に含有するものがより好ましい。接着剤成分中に導電粒子が分散した回路接続材料を使用することで、より一層高い接続信頼性を有する回路接続体を製造できる。   Examples of the circuit connecting material include those using a thermoplastic resin, but it is preferable to use a material containing an adhesive component including a thermosetting resin. In the thermocompression bonding step, a circuit connection body having high connection reliability can be manufactured by curing the thermosetting resin. Further, the circuit connection material more preferably further contains conductive particles dispersed in the adhesive component. By using a circuit connection material in which conductive particles are dispersed in the adhesive component, a circuit connection body having even higher connection reliability can be manufactured.

また、本発明の回路部材実装方法において使用可能な基板としては、ガラス基板、有機基板及びガラス繊維強化有機基板などを例示できる。   Examples of the substrate that can be used in the circuit member mounting method of the present invention include a glass substrate, an organic substrate, and a glass fiber reinforced organic substrate.

本発明によれば、回路部材の変形を十分効率的に抑制できる回路部材実装方法を提供することができる。   ADVANTAGE OF THE INVENTION According to this invention, the circuit member mounting method which can suppress a deformation | transformation of a circuit member sufficiently efficiently can be provided.

以下、添付図面を参照しながら本発明の好適な実施形態について詳細に説明する。なお、図面の説明において同一の要素には同一の符号を付し、重複する説明は省略する。また、図面の便宜上、図面の寸法比率は説明のものと必ずしも一致しない。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant descriptions are omitted. For the convenience of the drawings, the dimensional ratios in the drawings do not necessarily match those described.

図１を参照しながら、図７に示した熱圧着装置１０を用いて、平板状の本体部を有するＩＣチップ３をガラス基板１上に実装する方法について説明する。本実施形態に係る回路部材実装方法においては、圧着ヘッド５とＩＣチップ３の間に絶縁性フィルム１２を配置して基板とＩＣチップとの熱圧着を行う（図１（ｃ）参照）。また、回路接続材料２として、熱硬化性樹脂を含む接着剤成分２ａと、この接着剤成分２ａ中に分散した導電粒子２ｂとを備えるものを使用する（図３参照）。   With reference to FIG. 1, a method of mounting the IC chip 3 having a flat plate-like main body portion on the glass substrate 1 using the thermocompression bonding apparatus 10 shown in FIG. 7 will be described. In the circuit member mounting method according to the present embodiment, the insulating film 12 is disposed between the crimping head 5 and the IC chip 3, and the substrate and the IC chip are thermocompression bonded (see FIG. 1C). Further, as the circuit connecting material 2, a material having an adhesive component 2a containing a thermosetting resin and conductive particles 2b dispersed in the adhesive component 2a is used (see FIG. 3).

まず、ガラス基板１を熱圧着装置１０のステージ４上に載置する。そして、ガラス基板１の電極１ａが形成されている面上に回路接続材料２を配置し、図１（ａ）に示すように圧着ヘッド５を降下させて回路接続材料２をガラス基板１に仮圧着する（図１（ｂ））。このときの圧力は回路部材に損傷を与えない範囲であれば特に制限されないが、一般的には０．１〜３０．０ＭＰａとすることが好ましい。また、加熱しながら加圧してもよく、加熱温度は回路接続材料２が実質的に硬化しない温度とする。これらの加熱及び加圧は０．５〜１２０秒間の範囲で行うことが好ましい。   First, the glass substrate 1 is placed on the stage 4 of the thermocompression bonding apparatus 10. Then, the circuit connection material 2 is disposed on the surface of the glass substrate 1 on which the electrode 1a is formed, and the crimping head 5 is lowered as shown in FIG. Crimping is performed (FIG. 1B). Although the pressure at this time will not be restrict | limited especially if it is a range which does not damage a circuit member, Generally it is preferable to set it as 0.1-30.0 MPa. Moreover, you may pressurize, heating, and let heating temperature be the temperature which the circuit connection material 2 does not harden | cure substantially. These heating and pressurization are preferably performed in the range of 0.5 to 120 seconds.

次いで、図１（ｃ）に示すように、ＩＣチップ３の電極３ａをガラス基板１の側に向けるようにして、ＩＣチップ３を回路接続材料２上に載せる。更に、ＩＣチップ３の上に絶縁性フィルム１２を載せる。そして、圧着ヘッド５を降下させると共に、圧着ヘッド５の熱によって回路接続材料２を硬化させる（熱圧着工程）。   Next, as shown in FIG. 1C, the IC chip 3 is placed on the circuit connection material 2 so that the electrode 3 a of the IC chip 3 faces the glass substrate 1 side. Further, an insulating film 12 is placed on the IC chip 3. And while the crimping | compression-bonding head 5 is dropped, the circuit connection material 2 is hardened with the heat | fever of the crimping | compression-bonding head 5 (thermocompression-bonding process).

圧着ヘッド５による押圧力は、ＩＣチップ３に損傷を与えない範囲であれば特に制限されないが、一般的には０．１〜３０．０ＭＰａとすることが好ましい。また、圧着ヘッド５による加熱温度は、回路接続材料２が硬化可能な温度とする。加熱温度は、６０〜６００℃が好ましく、７０〜５５０℃がより好ましく、８０〜５００℃が更に好ましい。加熱温度が６０℃未満であると硬化速度が遅くなる傾向があり、６００℃を超えると望まない副反応が進行し易い傾向がある。加熱時間は、０．１〜１８０秒が好ましく、０．５〜１８０秒がより好ましく、１〜１８０秒が更に好ましい。   The pressing force by the pressure-bonding head 5 is not particularly limited as long as it does not damage the IC chip 3, but generally it is preferably 0.1 to 30.0 MPa. The heating temperature by the pressure bonding head 5 is a temperature at which the circuit connecting material 2 can be cured. The heating temperature is preferably 60 to 600 ° C, more preferably 70 to 550 ° C, and still more preferably 80 to 500 ° C. If the heating temperature is less than 60 ° C, the curing rate tends to be slow, and if it exceeds 600 ° C, unwanted side reactions tend to proceed. The heating time is preferably 0.1 to 180 seconds, more preferably 0.5 to 180 seconds, and still more preferably 1 to 180 seconds.

なお、熱圧着工程における回路接続材料２の加熱は、圧着ヘッド５の熱によるものに限定されるものではない。例えば、載置面の温度調整が可能なステージ４を使用した場合、回路接続材料２の加熱は、ステージ４からの熱を利用してもよく、あるいは、ステージ４及び圧着ヘッド５の熱を利用してもよい。   The heating of the circuit connection material 2 in the thermocompression bonding step is not limited to the heating by the pressure bonding head 5. For example, when the stage 4 capable of adjusting the temperature of the mounting surface is used, the circuit connection material 2 may be heated using the heat from the stage 4 or the heat of the stage 4 and the pressure bonding head 5. May be.

熱圧着工程における回路接続材料２の硬化によって、ガラス基板１上にＩＣチップ３が実装された回路接続体５０が得られる。図２は、回路接続体５０の接続部を拡大して示す模式断面図である。回路接続体５０の接続部５０ａは回路接続材料２に含まれる接着剤成分２ａの硬化物２Ａと、これに分散している導電粒子２ｂとを備える。回路接続体５０においては、対向するガラス基板１の電極１ａとＩＣチップ３の電極３ａとが、導電粒子２ｂを介して電気的に接続されている。すなわち、導電粒子２ｂが電極１ａ及び電極３ａの双方に直接接触している。   The circuit connection body 50 in which the IC chip 3 is mounted on the glass substrate 1 is obtained by curing the circuit connection material 2 in the thermocompression bonding process. FIG. 2 is an enlarged schematic cross-sectional view showing a connection portion of the circuit connection body 50. The connection part 50a of the circuit connection body 50 includes a cured product 2A of the adhesive component 2a contained in the circuit connection material 2 and conductive particles 2b dispersed therein. In the circuit connector 50, the electrode 1a of the glass substrate 1 and the electrode 3a of the IC chip 3 facing each other are electrically connected via the conductive particles 2b. That is, the conductive particles 2b are in direct contact with both the electrode 1a and the electrode 3a.

このため、電極１ａ，３ａ間の接続抵抗が十分に低減され、電極１ａ，３ａ間の良好な電気的接続が可能となる。他方、硬化物２Ａは電気絶縁性を有するものであり、隣接する電極同士は絶縁性が確保される。従って、電極１ａ，３ａ間の電流の流れを円滑にすることができ、回路の持つ機能を十分に発揮することができる。   For this reason, the connection resistance between the electrodes 1a and 3a is sufficiently reduced, and a good electrical connection between the electrodes 1a and 3a becomes possible. On the other hand, 2 A of hardened | cured materials have electrical insulation, and insulation is ensured between adjacent electrodes. Therefore, the flow of current between the electrodes 1a and 3a can be made smooth, and the functions of the circuit can be fully exhibited.

（回路接続材料）
図３に示す接着材フィルム１５は、テープ状の基材６と、その一方面上に設けられた回路接続材料２とを備える。回路接続材料２は、熱硬化性樹脂を含む接着剤成分２ａと、接着剤成分２ａ中に分散した導電粒子２ｂとを含有する接着剤組成物をフィルム状に成形したものである。回路接続材料２を使用する際には、基材６は剥離される。 (Circuit connection material)
The adhesive film 15 shown in FIG. 3 includes a tape-shaped substrate 6 and a circuit connection material 2 provided on one surface thereof. The circuit connection material 2 is obtained by molding an adhesive composition containing an adhesive component 2a containing a thermosetting resin and conductive particles 2b dispersed in the adhesive component 2a into a film shape. When the circuit connection material 2 is used, the substrate 6 is peeled off.

回路接続材料２の接着剤成分２ａに含まれる熱硬化性樹脂としては、例えば、アクリル樹脂、メタクリル樹脂、ウレタン樹脂、不飽和ポリエステル樹脂、エポキシ樹脂、フェノール樹脂などを例示できる。また、熱硬化性樹脂の硬化反応の形態は特に制限されるものではなく、二重結合のラジカル重合、イオン重合、重付加などのいずれの重合形態であってもよい。   Examples of the thermosetting resin contained in the adhesive component 2a of the circuit connecting material 2 include acrylic resin, methacrylic resin, urethane resin, unsaturated polyester resin, epoxy resin, and phenol resin. The form of the curing reaction of the thermosetting resin is not particularly limited, and any polymerization form such as double bond radical polymerization, ionic polymerization, and polyaddition may be used.

接着剤成分２ａは、熱硬化性樹脂以外の成分を含んでもよい。かかる成分としては、フィルム形成ポリマー、ラジカル重合開始剤、エポキシ硬化剤、シランカップリング剤、触媒、充填剤等を例示できる。熱硬化性樹脂、フィルム形成ポリマー及びその他成分の種類又は配合量を適宜調整することで、熱硬化型接続材料の硬化物のガラス転移温度Ｔｇを制御することができる。   The adhesive component 2a may include components other than the thermosetting resin. Examples of such components include film-forming polymers, radical polymerization initiators, epoxy curing agents, silane coupling agents, catalysts, fillers, and the like. The glass transition temperature Tg of the cured product of the thermosetting connection material can be controlled by appropriately adjusting the type or blending amount of the thermosetting resin, the film-forming polymer, and other components.

回路接続材料２に含まれる導電粒子２ｂとしては、例えばＡｕ、Ａｇ、Ｐｔ、Ｎｉ、Ｃｕ、Ｗ、Ｓｂ、Ｓｎ、はんだ等の金属やカーボンの粒子が挙げられる。あるいは、非導電性のガラス、セラミック、プラスチック等を核とし、この核を上記の金属やカーボンで被覆した被覆粒子を使用してもよい。導電粒子の平均粒径は分散性、導電性の観点から１〜１８μｍであることが好ましい。なお、導電粒子を絶縁層で被覆してなる絶縁被覆粒子を使用してもよく、隣接する電極同士の絶縁性を向上させる観点から導電粒子と絶縁性粒子とを併用してもよい。   Examples of the conductive particles 2b included in the circuit connection material 2 include metal particles such as Au, Ag, Pt, Ni, Cu, W, Sb, Sn, and solder, and carbon particles. Alternatively, coated particles in which non-conductive glass, ceramic, plastic, or the like is used as a core and the core is coated with the above metal or carbon may be used. The average particle diameter of the conductive particles is preferably 1 to 18 μm from the viewpoints of dispersibility and conductivity. Insulating coating particles obtained by coating conductive particles with an insulating layer may be used, and conductive particles and insulating particles may be used in combination from the viewpoint of improving the insulation between adjacent electrodes.

導電粒子２ｂの配合割合は、回路接続材料２の接着剤成分１００体積部に対して、０．１〜３０体積部であることが好ましく、０．１〜１０体積部であることがより好ましい。この配合割合が０．１体積部未満であると対向する電極間の接続抵抗が高くなる傾向にあり、３０体積部を超えると隣接する電極間の短絡が生じやすくなる傾向がある。   The blending ratio of the conductive particles 2b is preferably 0.1 to 30 parts by volume, and more preferably 0.1 to 10 parts by volume with respect to 100 parts by volume of the adhesive component of the circuit connection material 2. If the blending ratio is less than 0.1 part by volume, the connection resistance between the opposing electrodes tends to be high, and if it exceeds 30 parts by volume, a short circuit between adjacent electrodes tends to occur.

回路接続材料２の厚さは、使用する接着剤成分及び被接着物の種類等に合わせて適宜選択すればよいが、５〜１００μｍであることが好ましい。また、回路接続材料２の幅は、使用用途に合わせて調整すればよいが、一般には０．５〜５ｍｍ程度である。   The thickness of the circuit connecting material 2 may be appropriately selected according to the adhesive component to be used, the type of the adherend, and the like, but is preferably 5 to 100 μm. Moreover, what is necessary is just to adjust the width | variety of the circuit connection material 2 according to a use application, but generally it is about 0.5-5 mm.

接着材フィルム１５の基材６はテープ状の形状を有する。基材６は、長さが１〜３００ｍ程度であり、厚さが４〜２００μｍ程度であり、幅が０．５〜３０ｍｍ程度である。基材６の長さ、厚さ及び幅は上記の範囲に限定されるものではない。但し、基材６の幅は、その上に付設される回路接続材料２の幅よりも広いことが好ましい。   The base material 6 of the adhesive film 15 has a tape shape. The substrate 6 has a length of about 1 to 300 m, a thickness of about 4 to 200 μm, and a width of about 0.5 to 30 mm. The length, thickness, and width of the substrate 6 are not limited to the above ranges. However, the width of the substrate 6 is preferably wider than the width of the circuit connection material 2 attached thereon.

基材６は、例えば、ポリエチレンテレフタレート、ポリエチレンナフタレート、ポリエチレンイソフタレート、ポリブチレンテレフタレート、ポリオレフィン、ポリアセテート、ポリカーボネート、ポリフェニレンサルファイド、ポリアミド、エチレン・酢酸ビニル共重合体、ポリ塩化ビニル、ポリ塩化ビニリデン、合成ゴム系、液晶ポリマー等からなる各種テープを使用することが可能である。もっとも、基材６を構成する材質はこれらに限定されるものではない。また、基材６として、回路接続材料２との当接面等に離型処理が施されたものを使用してもよい。   The substrate 6 is, for example, polyethylene terephthalate, polyethylene naphthalate, polyethylene isophthalate, polybutylene terephthalate, polyolefin, polyacetate, polycarbonate, polyphenylene sulfide, polyamide, ethylene / vinyl acetate copolymer, polyvinyl chloride, polyvinylidene chloride, Various tapes made of synthetic rubber or liquid crystal polymer can be used. But the material which comprises the base material 6 is not limited to these. Moreover, you may use as a base material 6 what the mold release process was performed to the contact surface etc. with the circuit connection material 2. FIG.

なお、回路接続材料２として、市販されている種々の異方導電性フィルム（ＡＣＦ）、異方導電性ペースト（ＡＣＰ）、非導電性フィルム（ＮＣＦ）等を用いてもよい。   Note that various anisotropic conductive films (ACF), anisotropic conductive pastes (ACP), non-conductive films (NCF), and the like that are commercially available may be used as the circuit connection material 2.

（絶縁性フィルム）
次に、熱圧着工程において圧着ヘッド５とＩＣチップ３との間に配置する絶縁性フィルム１２について説明する。この絶縁性フィルム１２は、有機化合物からなり、厚さが９０μｍ以下であり且つ当該熱圧着工程の圧着温度における弾性率が０．５ＧＰａ以上である。厚さ及び弾性率に係るこれらの条件を満たす絶縁性フィルム１２を使用することで、熱圧着工程におけるＩＣチップの電極を支点としたＩＣチップ３のたわみを十分に低減できる。 (Insulating film)
Next, the insulating film 12 disposed between the crimping head 5 and the IC chip 3 in the thermocompression bonding process will be described. The insulating film 12 is made of an organic compound, has a thickness of 90 μm or less, and has an elastic modulus of 0.5 GPa or more at the pressure bonding temperature in the thermocompression bonding step. By using the insulating film 12 that satisfies these conditions relating to the thickness and elastic modulus, the deflection of the IC chip 3 with the IC chip electrode as a fulcrum in the thermocompression bonding process can be sufficiently reduced.

絶縁性フィルム１２は、厚さが９０μｍ以下である。絶縁性フィルム１２の厚さが９０μｍを越えると、ＩＣチップ３の変形量を十分に低減することが困難となる。絶縁性フィルム１２の厚さは、絶縁性フィルム１２によるクッション効果を得る観点から１０〜９０μｍであることが好ましく、圧着ヘッド５から回路接続材料２への熱の伝導性の点から１０〜６０μｍであることがより好ましい。   The insulating film 12 has a thickness of 90 μm or less. If the thickness of the insulating film 12 exceeds 90 μm, it becomes difficult to sufficiently reduce the deformation amount of the IC chip 3. The thickness of the insulating film 12 is preferably 10 to 90 μm from the viewpoint of obtaining a cushioning effect by the insulating film 12, and is 10 to 60 μm from the viewpoint of heat conductivity from the crimping head 5 to the circuit connecting material 2. More preferably.

絶縁性フィルム１２は、圧着温度における弾性率が０．５ＧＰａ以上であるが、入手容易性の観点から、０．５〜３０ＧＰａであることが好ましく、０．５〜１０ＧＰａであることがより好ましい。   The insulating film 12 has an elastic modulus at a pressure bonding temperature of 0.5 GPa or more, but is preferably 0.5 to 30 GPa and more preferably 0.5 to 10 GPa from the viewpoint of availability.

絶縁性フィルム１２としては、ポリフェニレンサルファイド、ポリエーテルエーテルケトン、ポリイミド又は液晶ポリマー等からなるフィルムが挙げられる。これらの絶縁性を有する材料からなるフィルムを熱圧着工程において用いることで、仮に、回路接続材料２の接着剤成分２ａによってＩＣチップ３に絶縁性フィルム１２が付着しても、これが直ちに短絡故障の原因となることはない。   Examples of the insulating film 12 include films made of polyphenylene sulfide, polyether ether ketone, polyimide, liquid crystal polymer, or the like. By using a film made of these insulating materials in the thermocompression bonding process, even if the insulating film 12 is attached to the IC chip 3 by the adhesive component 2a of the circuit connecting material 2, this immediately causes a short circuit failure. There is no cause.

以上、本発明の好適な実施形態について説明したが、本発明は上記実施形態に限定されるものではない。本発明は、その要旨を逸脱しない範囲で様々な変形が可能である。   The preferred embodiment of the present invention has been described above, but the present invention is not limited to the above embodiment. The present invention can be variously modified without departing from the gist thereof.

例えば、上記実施形態では、単層構造の回路接続材料２を使用する場合を例示したが、多層構造の回路接続材料を使用してもよい。多層構造の回路接続材料は、接着剤成分及び導電粒子の種類あるいはこれらの含有量が異なる層を基材６上に複数積層することによって製造することができる。   For example, in the above embodiment, the case of using the circuit connection material 2 having a single layer structure is illustrated, but a circuit connection material having a multilayer structure may be used. A circuit connection material having a multilayer structure can be produced by laminating a plurality of layers having different types of adhesive components and conductive particles or different contents thereof on the substrate 6.

図４に示す接着材フィルム１５Ａは、基材６と、その一方面上に形成された二層構造の回路接続材料１８とを備える。この回路接続材料１８は、導電粒子を含有しない導電粒子非含有層１８ａ及び導電粒子を含有する導電粒子含有層１８ｂからなる。なお、導電粒子非含有層１８ａ及び導電粒子含有層１８ｂの接着剤成分としては、上述の回路接続材料２の接着剤成分２ａと同様のものを使用できる。   An adhesive film 15A shown in FIG. 4 includes a base material 6 and a circuit connection material 18 having a two-layer structure formed on one surface thereof. The circuit connection material 18 includes a conductive particle non-containing layer 18a containing no conductive particles and a conductive particle containing layer 18b containing conductive particles. In addition, as the adhesive component of the conductive particle non-containing layer 18a and the conductive particle-containing layer 18b, the same adhesive component as the adhesive component 2a of the circuit connecting material 2 described above can be used.

上記二層構造の回路接続材料１８を使用すると、回路部材同士の接合時に、接着剤成分の流動に起因する回路電極上における導電粒子の個数の減少を十分に抑制することができる。このため、上記実施形態のようにＩＣチップをＣＯＧ実装によって基板上に接続する場合、ＩＣチップの金属バンプ（電極）上の導電粒子の個数を十分に確保することができる。この場合、ＩＣチップの金属バンプを備える面と導電粒子非含有層１８ａとが、他方、ＩＣチップを実装すべき基板と導電粒子含有層１８ｂとが、それぞれ当接するように回路接続材料１８を配置することが好ましい。   When the circuit connecting material 18 having the two-layer structure is used, the decrease in the number of conductive particles on the circuit electrode due to the flow of the adhesive component can be sufficiently suppressed when the circuit members are joined to each other. For this reason, when the IC chip is connected to the substrate by COG mounting as in the above embodiment, the number of conductive particles on the metal bumps (electrodes) of the IC chip can be sufficiently secured. In this case, the circuit connecting material 18 is arranged so that the surface of the IC chip with the metal bumps and the conductive particle non-containing layer 18a are in contact with the substrate on which the IC chip is to be mounted and the conductive particle containing layer 18b, respectively. It is preferable to do.

また、ＩＣチップを実装する基板としては、ガラス基板に限定されるものではなく、例えば、金属配線を有するフレキシブルテープ、フレキシブルプリント配線板等の有機基板、ガラス繊維強化エポキシ基板等のガラス繊維強化有機基板、あるいは、紙フェノール基板、セラミック基板、積層板などの配線基板を例示できる。上記実施形態においては、ＣＯＧ実装を行う場合を例示したが、ＣＯＦ（Ｃｈｉｐ Ｏｎ Ｆｉｌｍ）実装において本発明に係る回路部材実装方法を適用してもよい。   Further, the substrate on which the IC chip is mounted is not limited to a glass substrate. For example, a flexible tape having metal wiring, an organic substrate such as a flexible printed wiring board, and a glass fiber reinforced organic material such as a glass fiber reinforced epoxy substrate. Examples of the substrate include a circuit board such as a paper phenol substrate, a ceramic substrate, and a laminate. In the above embodiment, the case where COG mounting is performed has been illustrated, but the circuit member mounting method according to the present invention may be applied to COF (Chip On Film) mounting.

更に、ガラス基板１に実装する回路部材は、ＩＣチップに限定されるものではない。例えば、ＬＳＩチップ、抵抗体チップ、コンデンサチップ等の複数の回路電極（接続端子）を備えたチップ部品を本発明に係る回路部材実装方法によって基板上に実装してもよい。   Furthermore, the circuit member mounted on the glass substrate 1 is not limited to the IC chip. For example, a chip component including a plurality of circuit electrodes (connection terminals) such as an LSI chip, a resistor chip, and a capacitor chip may be mounted on the substrate by the circuit member mounting method according to the present invention.

本発明について実施例及び比較例によって更に詳細に説明するが、本発明は以下の実施例に限定されるものではない。   The present invention will be described in more detail with reference to examples and comparative examples, but the present invention is not limited to the following examples.

（実施例１）
図７に示す熱圧着装置１０と同様の構成の装置を使用し、下記のようにしてＩＣチップをガラス基板上に実装し、図５に示す回路接続体を作製した。 Example 1
Using an apparatus having the same configuration as the thermocompression bonding apparatus 10 shown in FIG. 7, an IC chip was mounted on a glass substrate as described below, and a circuit connection body shown in FIG. 5 was produced.

まず、回路部材としてＩＣチップ（１５ｍｍ×１．６ｍｍ、厚さ０．１ｍｍ）、絶縁性フィルムとしてポリフェニレンサルファイド（ＰＰＳ）フィルム（厚さ１０μｍ、熱硬化型の回路接続材料として異方導電フィルム（日立化成工業製、商品名：ＡＣ−８９５５、及び基板としてガラス基板（コーニング社製の無アルカリガラス１７３７、基板サイズ３８ｍｍ×２８ｍｍ、厚さ０．５ｍｍ）を準備した。   First, an IC chip (15 mm × 1.6 mm, thickness 0.1 mm) as a circuit member, a polyphenylene sulfide (PPS) film (thickness 10 μm, an insulating film (Hitachi) as a thermosetting circuit connection material, Hitachi Made by Kasei Kogyo Co., Ltd., trade name: AC-8955, and a glass substrate (Corning-free alkali glass 1737, substrate size 38 mm × 28 mm, thickness 0.5 mm) were prepared as substrates.

熱圧着装置のステージ上にガラス基板を載置し、その上に異方導電フィルムを仮圧着した。次いで、異方導電フィルムの上にＩＣチップ及び絶縁性フィルムをこの順序で積層し、その後、上方から圧着ヘッドを降下させ、熱圧着を行った。圧着ヘッドの当接面によって総加重６０ＮにてＩＣチップを押圧するとともに、圧着ヘッドの熱によって異方導電フィルムの温度が２１０℃に５秒間保持されるように加熱して回路接続体を得た。本実施例で使用したＰＰＳフィルムの２１０℃（圧着温度）における弾性率は０．５ＧＰａであった。なお、当該弾性率は、動的粘弾性測定装置ＤＭＳ６１００（ＳＩＩ製）を用いて、昇温速度５℃／分、周波数１Ｈｚ、振幅５μｍ、引張モードの条件で測定したものである。   A glass substrate was placed on the stage of a thermocompression bonding apparatus, and an anisotropic conductive film was temporarily pressure-bonded thereon. Next, an IC chip and an insulating film were laminated in this order on the anisotropic conductive film, and then the pressure bonding head was lowered from above to perform thermocompression bonding. The IC chip was pressed at a total load of 60 N by the contact surface of the pressure bonding head, and heated so that the temperature of the anisotropic conductive film was maintained at 210 ° C. for 5 seconds by the heat of the pressure bonding head to obtain a circuit connection body. . The elastic modulus at 210 ° C. (pressure bonding temperature) of the PPS film used in this example was 0.5 GPa. The elastic modulus was measured using a dynamic viscoelasticity measuring device DMS6100 (manufactured by SII) under the conditions of a heating rate of 5 ° C./min, a frequency of 1 Hz, an amplitude of 5 μm, and a tensile mode.

＜ＩＣチップのたわみ量の測定＞
上記のようにして作製した回路接続体のＩＣチップのたわみ量を以下のようにして測定した。まず、図５に示すように、ＩＣチップの上面の中心Ｃ１と、この中心Ｃ１からＩＣチップの長手方向に７．５ｍｍ離れたＩＣチップの端部との間の領域につき、中心Ｃ１の高さを基準とする高さ方向の変位量Ｌ１（μｍ）を測定した。次に、ガラス基板の裏面（ＩＣチップが実装されていない面）の中心Ｃ２と、この中心Ｃ２からガラス基板の長手方向に７．５ｍｍ離れたＩＣチップの端部に相当する箇所まで高さ方向の変位量Ｌ２（μｍ）を測定した。ＩＣチップ上面の変位量Ｌ１とガラス基板の裏面の変位量Ｌ２との差（Ｌ１−Ｌ２）の最大値をＩＣチップのたわみ量とした。図６は、実施例１で作製した回路接続体の変位量（Ｌ１，Ｌ２）及びＩＣチップのたわみ量（Ｌ１−Ｌ２）を示すグラフである。 <Measurement of IC chip deflection>
The amount of deflection of the IC chip of the circuit connection body produced as described above was measured as follows. First, as shown in FIG. 5, the height of the center C1 in a region between the center C1 of the upper surface of the IC chip and the end of the IC chip 7.5 mm away from the center C1 in the longitudinal direction of the IC chip. The amount of displacement L1 (μm) in the height direction with reference to was measured. Next, in the height direction, the center C2 of the back surface of the glass substrate (the surface on which the IC chip is not mounted) and the location corresponding to the end of the IC chip 7.5 mm away from the center C2 in the longitudinal direction of the glass substrate The displacement amount L2 (μm) of was measured. The maximum value of the difference (L1−L2) between the displacement amount L1 of the upper surface of the IC chip and the displacement amount L2 of the rear surface of the glass substrate was defined as the deflection amount of the IC chip. FIG. 6 is a graph showing the displacement amount (L1, L2) of the circuit connector manufactured in Example 1 and the deflection amount (L1-L2) of the IC chip.

＜絶縁性フィルムと回路接続材料との接着の有無＞
絶縁性フィルムと回路接続材料との接着の有無は、熱圧着工程後、回路接続体の上面に位置する絶縁性フィルムを手で持ち上げた際に、回路接続体が絶縁性フィルムとともに持ち上がるか否かによって評価した。回路接続体が持ち上がることなく絶縁性フィルムが回路接続体から剥離する場合を接着なしと評価し、他方、回路接続体から絶縁性フィルムとともに持ち上がった場合を接着ありと評価した。 <Presence / absence of adhesion between insulating film and circuit connecting material>
Whether or not the insulating film and the circuit connecting material are adhered is whether or not the circuit connecting body is lifted together with the insulating film when the insulating film located on the upper surface of the circuit connecting body is lifted by hand after the thermocompression bonding process. Evaluated by. The case where the insulating film peeled off from the circuit connection body without lifting the circuit connection body was evaluated as having no adhesion, while the case where it was lifted from the circuit connection body together with the insulating film was evaluated as having adhesion.

（実施例２）
絶縁性フィルムとして厚さ１０μｍのＰＰＳフィルムを使用する代わりに、厚さ３０μｍのＰＰＳフィルムを使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 (Example 2)
A circuit connector was prepared and evaluated in the same manner as in Example 1 except that a PPS film having a thickness of 30 μm was used instead of the PPS film having a thickness of 10 μm as the insulating film.

（実施例３）
絶縁性フィルムとして厚さ１０μｍのＰＰＳフィルムを使用する代わりに、厚さ６０μｍのＰＰＳフィルムを使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 (Example 3)
A circuit connector was prepared and evaluated in the same manner as in Example 1 except that a PPS film having a thickness of 60 μm was used instead of the PPS film having a thickness of 10 μm as the insulating film.

（実施例４）
絶縁性フィルムとして厚さ１０μｍのＰＰＳフィルムを使用する代わりに、厚さ９０μｍのＰＰＳフィルムを使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 Example 4
A circuit connector was prepared and evaluated in the same manner as in Example 1 except that a PPS film having a thickness of 90 μm was used instead of the PPS film having a thickness of 10 μm as the insulating film.

（比較例１）
絶縁性フィルムとして厚さ１０μｍのＰＰＳフィルムを使用する代わりに、厚さ１００μｍのＰＰＳフィルムを使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 1)
A circuit connector was prepared and evaluated in the same manner as in Example 1 except that a PPS film having a thickness of 100 μm was used instead of the PPS film having a thickness of 10 μm as the insulating film.

（比較例２）
絶縁性フィルムとして厚さ１０μｍのＰＰＳフィルムを使用する代わりに、厚さ２００μｍのＰＰＳフィルムを使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 2)
A circuit connector was prepared and evaluated in the same manner as in Example 1 except that a PPS film having a thickness of 200 μm was used instead of the PPS film having a thickness of 10 μm as the insulating film.

（比較例３）
絶縁性フィルムとして、２１０℃（圧着温度）における弾性率が０．５ＧＰａのＰＰＳフィルムを使用する代わりに、当該弾性率が０．０５ＧＰａの四フッ化エチレン（ＰＴＦＥ）フィルムを使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 3)
As an insulating film, instead of using a PPS film having an elastic modulus of 0.5 GPa at 210 ° C. (pressure bonding temperature), a tetrafluoroethylene (PTFE) film having an elastic modulus of 0.05 GPa was used. In the same manner as in Example 1, a circuit connection body was produced and evaluated.

（比較例４）
絶縁性フィルムとして厚さ１０μｍのＰＴＦＥフィルムを使用する代わりに、厚さ３０μｍのＰＴＦＥフィルムを使用したことの他は、比較例３と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 4)
A circuit connection body was produced and evaluated in the same manner as in Comparative Example 3 except that a PTFE film having a thickness of 30 μm was used instead of the PTFE film having a thickness of 10 μm as the insulating film.

（比較例５）
絶縁性フィルムとして厚さ１０μｍのＰＴＦＥフィルムを使用する代わりに、厚さ６０μｍのＰＴＦＥフィルムを使用したことの他は、比較例３と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 5)
A circuit connector was prepared and evaluated in the same manner as in Comparative Example 3 except that a PTFE film having a thickness of 60 μm was used instead of the PTFE film having a thickness of 10 μm as the insulating film.

（比較例６）
絶縁性フィルムとして厚さ１０μｍのＰＴＦＥフィルムを使用する代わりに、厚さ２００μｍのＰＴＦＥフィルムを使用したことの他は、比較例３と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 6)
A circuit connection body was produced and evaluated in the same manner as in Comparative Example 3 except that a PTFE film having a thickness of 200 μm was used instead of the PTFE film having a thickness of 10 μm as the insulating film.

（比較例７）
熱圧着工程において、２１０℃（圧着温度）における弾性率が０．５ＧＰａのＰＰＳフィルムを使用する代わりに、当該弾性率が７０ＧＰａのアルミニウム箔を使用したことの他は、実施例１と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 7)
In the thermocompression bonding step, instead of using a PPS film having an elastic modulus at 210 ° C. (compression bonding temperature) of 0.5 GPa, the same procedure as in Example 1 was used except that an aluminum foil having an elastic modulus of 70 GPa was used. A circuit connection body was produced and evaluated.

（比較例８）
熱圧着工程において、厚さ１０μｍのアルミニウム箔を使用する代わりに、厚さ３０μｍのアルミニウム箔を使用したことの他は、比較例７と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 8)
In the thermocompression bonding step, a circuit connection body was produced and evaluated in the same manner as in Comparative Example 7, except that an aluminum foil having a thickness of 30 μm was used instead of using an aluminum foil having a thickness of 10 μm.

（比較例９）
熱圧着工程において、厚さ１０μｍのアルミニウム箔を使用する代わりに、厚さ６０μｍのアルミニウム箔を使用したことの他は、比較例７と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 9)
In the thermocompression bonding step, a circuit connection body was produced and evaluated in the same manner as in Comparative Example 7, except that an aluminum foil having a thickness of 60 μm was used instead of using an aluminum foil having a thickness of 10 μm.

（比較例１０）
熱圧着工程において、厚さ１０μｍのアルミニウム箔を使用する代わりに、厚さ２００μｍのアルミニウム箔を使用したことの他は、比較例７と同様にして回路接続体の作製及びその評価を行った。 (Comparative Example 10)
In the thermocompression bonding step, a circuit connection body was produced and evaluated in the same manner as in Comparative Example 7, except that an aluminum foil having a thickness of 200 μm was used instead of using an aluminum foil having a thickness of 10 μm.

実施例１〜４及び比較例１〜１０において使用した絶縁性フィルム及び作製した回路接続体の評価結果について、表１〜３に示す。

Figure 0005024117

Figure 0005024117
Figure 0005024117
 It shows to Tables 1-3 about the evaluation result of the insulating film used in Examples 1-4 and Comparative Examples 1-10 and the produced circuit connection body.
Figure 0005024117
Figure 0005024117
Figure 0005024117

本発明に係る回路部材実装方法の一形態を概略断面図により示す工程図である。It is process drawing which shows one form of the circuit member mounting method which concerns on this invention with a schematic sectional drawing. 回路接続体の接続部を示す模式断面図である。It is a schematic cross section which shows the connection part of a circuit connection body. 回路接続材料の一形態を示す断面図である。It is sectional drawing which shows one form of a circuit connection material. 回路接続材料の他の形態を示す断面図である。It is sectional drawing which shows the other form of circuit connection material. （ａ）及び（ｂ）は回路接続体を示す上面図及び断面図である。(A) And (b) is the top view and sectional drawing which show a circuit connection body. 実施例１の回路接続体の変位量及びＩＣチップのたわみ量を示すグラフである。It is a graph which shows the displacement amount of the circuit connection body of Example 1, and the deflection amount of IC chip. 熱圧着装置を用いて従来の実装法を行っている状態を示す模式断面図である。It is a schematic cross section which shows the state which is performing the conventional mounting method using a thermocompression bonding apparatus.

符号の説明Explanation of symbols

１…ガラス基板（基板）、２，１８…回路接続材料、２Ａ…回路接続材料の硬化物、２ａ…接着剤成分、２ｂ…導電粒子、３…ＩＣチップ（回路部材）、４…ステージ、５…圧着ヘッド、１０…熱圧着装置、１２…絶縁性フィルム、５０…回路接続体。 DESCRIPTION OF SYMBOLS 1 ... Glass substrate (board | substrate) 2,18 ... Circuit connection material, 2A ... Hardened | cured material of circuit connection material, 2a ... Adhesive component, 2b ... Conductive particle, 3 ... IC chip (circuit member), 4 ... Stage, 5 ... pressure bonding head, 10 ... thermocompression bonding apparatus, 12 ... insulating film, 50 ... circuit connection body.

Claims (7)

回路部材を基板の方向に押圧する圧着ヘッドを用いて前記回路部材の実装を行う回路部材実装方法であって、
前記基板と前記回路部材との間に回路接続材料を介在させ、前記回路接続材料が所定温度となるように加熱しながら、前記圧着ヘッドによって前記回路部材を前記基板に押圧して両者を接着する熱圧着工程を備え、
前記熱圧着工程において、前記所定温度は６０〜６００℃の範囲であり、前記圧着ヘッドによる押圧を行うに際し、前記圧着ヘッドと前記回路部材と間に、厚さが９０μｍ以下であり且つ前記所定温度における弾性率が０．５ＧＰａ以上である、有機化合物からなる絶縁性フィルムを介在させることを特徴とする回路部材実装方法。 A circuit member mounting method for mounting the circuit member using a crimping head that presses the circuit member in the direction of the substrate,
A circuit connection material is interposed between the substrate and the circuit member, and the circuit member is pressed against the substrate by the crimping head while the circuit connection material is heated to a predetermined temperature to bond them together. Equipped with a thermocompression bonding process,
In the thermocompression bonding step, the predetermined temperature is in a range of 60 to 600 ° C., and when pressing with the pressure bonding head, a thickness is 90 μm or less between the pressure bonding head and the circuit member and the predetermined temperature. A circuit member mounting method comprising interposing an insulating film made of an organic compound having an elastic modulus of at least 0.5 GPa. 前記回路部材がＩＣチップであることを特徴とする、請求項１に記載の回路部材実装方法。   The circuit member mounting method according to claim 1, wherein the circuit member is an IC chip. 前記ＩＣチップの厚さが２００μｍ以下であることを特徴とする、請求項２に記載の回路部材実装方法。   The circuit member mounting method according to claim 2, wherein a thickness of the IC chip is 200 μm or less. 前記回路接続材料は、熱硬化性樹脂を含む接着剤成分を含有することを特徴とする、請求項１〜３のいずれか一項に記載の回路部材実装方法。   The circuit member mounting method according to claim 1, wherein the circuit connection material includes an adhesive component including a thermosetting resin. 前記回路接続材料は、前記接着剤成分中に分散した導電粒子を更に含有することを特徴とする、請求項４に記載の回路部材実装方法。   The circuit member mounting method according to claim 4, wherein the circuit connection material further contains conductive particles dispersed in the adhesive component. 前記基板は、ガラス基板、有機基板及びガラス繊維強化有機基板からなる群より選ばれる一種であることを特徴とする、請求項１〜５のいずれか一項に記載の回路部材実装方法。   The circuit board mounting method according to claim 1, wherein the board is a kind selected from the group consisting of a glass board, an organic board, and a glass fiber reinforced organic board. 前記絶縁性フィルムは、ポリフェニレンサルファイド、ポリエーテルエーテルケトン、ポリイミド及び液晶ポリマーからなる群から選ばれる有機化合物からなることを特徴とする、請求項１〜６のいずれか一項に記載の回路部材実装方法。The circuit member mounting according to any one of claims 1 to 6, wherein the insulating film is made of an organic compound selected from the group consisting of polyphenylene sulfide, polyether ether ketone, polyimide, and liquid crystal polymer. Method.
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