JP4958655B2 - 電子部品実装装置および電子装置の製造方法 - Google Patents
電子部品実装装置および電子装置の製造方法 Download PDFInfo
- Publication number
- JP4958655B2 JP4958655B2 JP2007168502A JP2007168502A JP4958655B2 JP 4958655 B2 JP4958655 B2 JP 4958655B2 JP 2007168502 A JP2007168502 A JP 2007168502A JP 2007168502 A JP2007168502 A JP 2007168502A JP 4958655 B2 JP4958655 B2 JP 4958655B2
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- mounting
- mounting substrate
- substrate
- mounting apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 45
- 238000004519 manufacturing process Methods 0.000 title claims description 37
- 239000000758 substrate Substances 0.000 claims abstract description 118
- 239000011347 resin Substances 0.000 claims description 53
- 229920005989 resin Polymers 0.000 claims description 53
- 238000010438 heat treatment Methods 0.000 claims description 23
- 238000002788 crimping Methods 0.000 claims description 14
- 239000011261 inert gas Substances 0.000 claims description 7
- 239000007789 gas Substances 0.000 claims description 5
- 230000006837 decompression Effects 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 8
- 230000006378 damage Effects 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000011159 matrix material Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 238000001179 sorption measurement Methods 0.000 description 3
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 238000001816 cooling Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 239000012141 concentrate Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000003028 elevating effect Effects 0.000 description 1
- 238000005429 filling process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/757—Means for aligning
- H01L2224/75753—Means for optical alignment, e.g. sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/758—Means for moving parts
- H01L2224/75841—Means for moving parts of the bonding head
- H01L2224/75842—Rotational mechanism
- H01L2224/75843—Pivoting mechanism
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49149—Assembling terminal to base by metal fusion bonding
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
また、通常の製造工程として、フリップチップ接続工程とアンダーフィル樹脂充填工程との間に電子装置の移動・搬送が行われるが、その間にも、温度低下およびそれに伴う実装基板の変形が生じ得るため、それに起因する接続部分の破壊・破断が発生するといった問題も顕在化しつつある。
さらに、従来の実装基板全体を加熱して行う電子部品の実装工程では、実装基板が高温となっているため、同時にアンダーフィル樹脂を充填した場合、アンダーフィル樹脂の硬化による充填不良等の問題が生じていた。
さらに、電子部品の実装基板への加熱圧着を行なった直後に、空間部への樹脂充填を行うことにより実装基板の移動・搬送工程の解消を可能とし、それにより、移動・搬送に起因して生じていた実装基板の温度低下および変形、電子部品接続部分の破壊・破断を防止することが可能な電子部品実装装置および該電子部品実装装置を用いた電子装置の製造方法を提供することを目的とする。
次いで、ステップS2で、ボンディングヘッド11により電子部品3を保持する。その際の動作は、一例として、収納ラック(不図示)に収納されている電子部品3をボンディングヘッド11先端部の部品保持部11aで減圧吸着することによって行う。
次いで、ステップS3で、測長機構14により、ボンディングヘッド11と実装基板2との距離を複数個所で測定して、実装基板2上の所定の実装位置4の中心4aにおける仮想平面5の算出を行う(図2(b)参照)。
次いで、ステップS4で、実装位置4の中心4aにおける仮想平面5の法線6と次ステップで圧着力を作用させる作用線19とを一致させる(図2(c)参照)。その動作は、傾斜移動機構15すなわち回転機構16と垂直移動機構17と水平移動機構18とによって、ボンディングヘッド11および局所ステージ12を傾斜および移動させて行う。なお、一例として、回転機構16はボンディングヘッド11および局所ステージ12をy−z平面内で回転させることが可能な第一の回転機構16aと、x−z平面内で回転させることが可能な第二の回転機構16bとを備えて構成される。
次いで、ステップS5で、法線6に沿って、ボンディングヘッド11および局所ステージ12が、クランプ機構10により、相互に接近するように作動することによって、電子部品3と実装基板2との圧着が行われる(図2(d)参照)。なお、圧着動作は、本実施例では、局所ステージ12に設けられた実装基板加熱用のヒータ22によって実装基板3が加熱された状態の下で行なわれる。一例として、60〜150℃程度の加熱温度とし、所定時間、圧着状態を維持することによって、加熱圧着を行なう。ここで、電子部品3を実装基板2へ圧着する際に、ボンディングヘッド11により電子部品3が実装基板2の実装面2aを押圧する圧着力を、局所ステージ12の実装基板2側の先端部の支持面12aによって、実装基板2の反実装面2b側の対応位置で支えるように、ボンディングヘッド11および局所ステージ12位置と動作を制御する。
最後に、ステップS6で、ボンディングヘッド11による電子部品3の保持を解放することによって、電子部品3の実装基板2への実装が完了し、これに続く製造工程へ移行される。
図4および図5に示すように、電子部品実装装置1は、実装基板2と、実装基板2に実装された電子部品3との間の空間部8にアンダーフィル樹脂(以下「樹脂」という)25を充填する樹脂充填機構24を備える。
電子部品実装装置1は、内部雰囲気の温度調節が可能な閉塞空間31を備え、図7に示すように、当該閉塞空間31内に配設される構成を備える。ここで、温度調節は、例えば、サーモスタット付電熱線ヒータ等を用いた温度調節機構32により行うことが考えられる。また、熱効率を向上させる観点から、閉塞空間31は断熱構造を備えることが好適である。
さらに、樹脂充填機構を備える構成により、電子部品の実装基板への加熱圧着を行なった直後に、樹脂充填機構により空間部への樹脂充填を行うことが可能となり、実装基板の移動・搬送工程を解消することが可能となる。その結果、移動・搬送に起因する実装基板の温度低下および変形、電子部品接続部分の破壊・破断を防止することが可能となる。
併せて、従来の実装基板全体を加熱して行う電子部品の実装工程では、実装基板が高温となっているため、同時にアンダーフィル樹脂を充填した場合、アンダーフィル樹脂の硬化による充填不良等の問題が生じていたのに対し、本願発明においては、実装基板全体を加熱することなく局所的に加熱して電子部品を接続することによって、その問題が発生することなく、アンダーフィル樹脂の充填工程を電子部品の実装工程と同時に行うことが可能となる。
このように、本発明は、製造される電子装置の不良品率を低下させて、品質を高度に保つことを可能とするものである。
2 実装基板
3 電子部品
4 実装基板上の電子部品実装位置
5 実装位置中心における仮想平面
6 実装位置中心における仮想平面の法線
8 空間部
9 電子装置
10、10a、10b クランプ機構
11 ボンディングヘッド
12 局所ステージ
14、14a、14b、・・・ 側長機構
15 傾斜移動機構
16、16a、16b 回転機構
17 垂直移動機構
18 水平移動機構
19 圧着力の作用線
22 実装基板加熱用のヒータ
24 樹脂充填機構
25 アンダーフィル樹脂
31 閉塞空間
32 温度調節機構
34 減圧機構
36 ガス供給機構
Claims (10)
- 一つの実装基板に複数の電子部品を順次実装する電子部品実装装置において、
前記電子部品を保持して、前記実装基板への圧着を行うボンディングヘッドと、
前記電子部品の実装面と略同一もしくは若干広い面積に形成される支持面が設けられ、該支持面で前記圧着力を前記実装基板の反実装面から支える局所ステージと、
前記ボンディングヘッドと前記実装基板との距離を測定して、該実装基板上の所定の実装位置における仮想平面を算出する測長機構と、
前記ボンディングヘッドおよび前記局所ステージを傾斜および移動させて、前記実装位置における前記仮想平面の法線と前記圧着力の作用線とを一致させる傾斜移動機構とを備え、
前記法線に沿って、前記圧着が行われること
を特徴とする電子部品実装装置。 - 前記ボンディングヘッドに設けられる前記電子部品加熱用のヒータ、および前記局所ステージに設けられる前記実装基板加熱用のヒータの少なくとも一方のヒータを備えること
を特徴とする請求項1記載の電子部品実装装置。 - 前記実装基板と、該実装基板に実装された前記電子部品との間の空間部に樹脂を充填する樹脂充填機構を備えること
を特徴とする請求項1または請求項2記載の電子部品実装装置。 - 内部雰囲気の温度調節が可能な閉塞空間を備え、該閉塞空間内に設置されること
を特徴とする請求項1〜3のいずれか一項記載の電子部品実装装置。 - 前記閉塞空間は、内部を減圧する減圧機構を備えること
を特徴とする請求項4記載の電子部品実装装置。 - 前記閉塞空間は、内部に不活性ガスを供給するガス供給機構を備えること
を特徴とする請求項5記載の電子部品実装装置。 - 一つの実装基板に複数の電子部品を順次実装する電子装置の製造方法において、
前記電子部品を保持して前記実装基板への圧着を行うボンディングヘッドと、前記実装基板との距離を測定して、該実装基板上の所定の実装位置における仮想平面を算出する工程と、
次いで、前記ボンディングヘッドと、前記電子部品の実装面と略同一もしくは若干広い面積に形成される支持面が設けられ、該支持面で前記圧着力を前記実装基板の反実装面から支える局所ステージとを傾斜および移動させて、前記実装位置における前記仮想平面の法線と前記圧着力の作用線とを一致させる工程と、
次いで、前記法線に沿って、前記圧着が行われる工程とを備えること
を特徴とする電子装置の製造方法。 - 前記圧着が行われる工程は、前記ボンディングヘッドによって前記電子部品が加熱された状態、および前記局所ステージによって前記実装基板が加熱された状態の少なくとも一方の状態の下で実施されること
を特徴とする請求項7記載の電子装置の製造方法。 - 内部雰囲気が所定の温度に調節された閉塞空間内において、
前記圧着が行われる工程に次いで、
前記実装基板と、該実装基板に実装された前記電子部品との間の空間部に樹脂を充填する工程が行われること
を特徴とする請求項7または請求項8記載の電子装置の製造方法。 - 前記閉塞空間の内部が減圧された状態で実施されること
を特徴とする請求項9記載の電子装置の製造方法。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007168502A JP4958655B2 (ja) | 2007-06-27 | 2007-06-27 | 電子部品実装装置および電子装置の製造方法 |
KR1020080058249A KR20080114531A (ko) | 2007-06-27 | 2008-06-20 | 전자 부품 실장 장치 및 전자 장치의 제조 방법 |
US12/146,936 US7712649B2 (en) | 2007-06-27 | 2008-06-26 | Using a simultaneously tilting and moving bonding apparatus |
CNA2008101261380A CN101335222A (zh) | 2007-06-27 | 2008-06-27 | 电子元件安装装置及制造电子器件的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007168502A JP4958655B2 (ja) | 2007-06-27 | 2007-06-27 | 電子部品実装装置および電子装置の製造方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2009010074A JP2009010074A (ja) | 2009-01-15 |
JP2009010074A5 JP2009010074A5 (ja) | 2010-04-22 |
JP4958655B2 true JP4958655B2 (ja) | 2012-06-20 |
Family
ID=40159163
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007168502A Expired - Fee Related JP4958655B2 (ja) | 2007-06-27 | 2007-06-27 | 電子部品実装装置および電子装置の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7712649B2 (ja) |
JP (1) | JP4958655B2 (ja) |
KR (1) | KR20080114531A (ja) |
CN (1) | CN101335222A (ja) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8052029B1 (en) * | 2010-09-01 | 2011-11-08 | GM Global Technology Operations LLC | Method of calibrating a friction stir spot welding system |
US9314869B2 (en) * | 2012-01-13 | 2016-04-19 | Asm Technology Singapore Pte. Ltd. | Method of recovering a bonding apparatus from a bonding failure |
US8870051B2 (en) * | 2012-05-03 | 2014-10-28 | International Business Machines Corporation | Flip chip assembly apparatus employing a warpage-suppressor assembly |
CH707480B1 (de) * | 2013-01-21 | 2016-08-31 | Besi Switzerland Ag | Bondkopf mit einem heiz- und kühlbaren Saugorgan. |
CH707934B1 (de) * | 2013-04-19 | 2017-04-28 | Besi Switzerland Ag | Verfahren zum Montieren von elektronischen oder optischen Bauelementen auf einem Substrat. |
JP5608829B1 (ja) * | 2014-03-31 | 2014-10-15 | アルファーデザイン株式会社 | 部品実装装置 |
CN104439777B (zh) * | 2014-11-10 | 2016-03-30 | 深圳市鹏煜威科技有限公司 | 一种机脚夹持装置 |
US9929121B2 (en) | 2015-08-31 | 2018-03-27 | Kulicke And Soffa Industries, Inc. | Bonding machines for bonding semiconductor elements, methods of operating bonding machines, and techniques for improving UPH on such bonding machines |
WO2018146880A1 (ja) * | 2017-02-09 | 2018-08-16 | ボンドテック株式会社 | 部品実装システム、樹脂成形装置、部品実装方法および樹脂成形方法 |
US10571682B2 (en) | 2017-08-10 | 2020-02-25 | Infineon Technologies Ag | Tilted chip assembly for optical devices |
WO2019111388A1 (ja) * | 2017-12-07 | 2019-06-13 | ヤマハ発動機株式会社 | 被実装物作業装置 |
CN117198896B (zh) * | 2022-05-31 | 2024-07-19 | 长沙瑶华半导体科技有限公司 | 一种曲面法兰表面多点测高贴片方法 |
CN118046150B (zh) * | 2024-04-11 | 2024-06-21 | 潍坊鸿洋机械科技有限公司 | 一种汽车排气管制作加工焊接装置 |
Family Cites Families (40)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3722062A (en) * | 1971-11-04 | 1973-03-27 | Warwick Electronics Inc | Component insertion system |
JPS5638892A (en) * | 1979-09-06 | 1981-04-14 | Matsushita Electric Ind Co Ltd | Apparatus for mounting electronic part |
US4600228A (en) * | 1984-05-31 | 1986-07-15 | Sperry Corporation | Lockable compliant end effector apparatus |
US4899921A (en) * | 1988-10-28 | 1990-02-13 | The American Optical Corporation | Aligner bonder |
JPH02296400A (ja) * | 1989-05-11 | 1990-12-06 | Nippondenso Co Ltd | 異形部品自動組付装置 |
US5029383A (en) * | 1990-06-07 | 1991-07-09 | Universal Instruments Corporation | Articulating tip for pick and place head |
US5262355A (en) * | 1990-06-19 | 1993-11-16 | Sumitomo Electric Industries, Ltd. | Method for packaging a semiconductor device |
US5185509A (en) * | 1991-02-19 | 1993-02-09 | Toddco General, Inc. | Robotic arm tool mounting apparatus |
US5127573A (en) * | 1991-05-22 | 1992-07-07 | Industrial Technology Research Institute | Tape automated bonding apparatus with automatic leveling stage |
TW278212B (ja) * | 1992-05-06 | 1996-06-11 | Sumitomo Electric Industries | |
JPH05326638A (ja) * | 1992-05-15 | 1993-12-10 | Sumitomo Electric Ind Ltd | 半導体チップ実装方法および実装装置 |
JPH05326633A (ja) * | 1992-05-15 | 1993-12-10 | Sumitomo Electric Ind Ltd | 半導体チップ実装方法および実装装置 |
CA2096551A1 (en) * | 1992-05-22 | 1993-11-23 | Masanori Nishiguchi | Semiconductor device |
JPH06210475A (ja) * | 1993-01-14 | 1994-08-02 | Fanuc Ltd | レーザロボットのハイトセンサ装置 |
US5368217A (en) * | 1993-08-25 | 1994-11-29 | Microelectronics And Computer Technology Corporation | High force compression flip chip bonding method and system |
KR100248569B1 (ko) * | 1993-12-22 | 2000-03-15 | 히가시 데쓰로 | 프로우브장치 |
US5435482A (en) * | 1994-02-04 | 1995-07-25 | Lsi Logic Corporation | Integrated circuit having a coplanar solder ball contact array |
JPH07302817A (ja) * | 1994-05-06 | 1995-11-14 | Matsushita Electric Ind Co Ltd | 半導体素子の接続装置 |
US5590456A (en) * | 1994-12-07 | 1997-01-07 | Lucent Technologies Inc. | Apparatus for precise alignment and placement of optoelectric components |
US6041996A (en) * | 1996-11-22 | 2000-03-28 | Matsushita Electric Industrial Co., Ltd. | Method of pressure bonding a bumped electronic part and an apparatus for pressure bonding a bumped electronic part |
EP0852983B1 (de) * | 1997-01-08 | 2002-09-04 | ESEC Trading SA | Einrichtung zum Formen von flüssigen Lotportionen beim Weichlöten von Halbleiterchips |
US6006978A (en) * | 1997-02-25 | 1999-12-28 | Swanson; David W. | Pressure head with pivot rod gimbal horn with zero adjust |
US6010056A (en) * | 1997-06-18 | 2000-01-04 | Swanson; David W. | Gimbal horn pressure head with shape of pivot rod bearing corresponding to shape of contact surface |
DE59711263D1 (de) * | 1997-10-30 | 2004-03-04 | Esec Trading Sa | Verfahren und Einrichtung für die Justierung des Bondkopfs einer Maschine für das Bonden von Halbleiterchips auf ein Trägermaterial |
US6048750A (en) * | 1997-11-24 | 2000-04-11 | Micron Technology, Inc. | Method for aligning and connecting semiconductor components to substrates |
JP3400340B2 (ja) * | 1998-02-20 | 2003-04-28 | 株式会社新川 | フリップチップボンディング方法及び装置 |
US6048656A (en) * | 1999-05-11 | 2000-04-11 | Micron Technology, Inc. | Void-free underfill of surface mounted chips |
JP2002050861A (ja) * | 2000-08-01 | 2002-02-15 | Matsushita Electric Ind Co Ltd | 常温接合装置及び方法 |
JP4544755B2 (ja) * | 2001-01-17 | 2010-09-15 | パナソニック株式会社 | ボンディングヘッド及び部品装着装置 |
JP3780214B2 (ja) * | 2002-01-25 | 2006-05-31 | キヤノン株式会社 | Icの加圧圧着方法 |
JP2004047670A (ja) | 2002-07-11 | 2004-02-12 | Sony Corp | フリップチップ実装方法及びフリップチップ実装装置 |
JP3795024B2 (ja) * | 2003-03-04 | 2006-07-12 | 東レエンジニアリング株式会社 | 接合方法および装置 |
US6756687B1 (en) * | 2003-03-05 | 2004-06-29 | Altera Corporation | Interfacial strengthening for electroless nickel immersion gold substrates |
US6981312B2 (en) * | 2003-03-31 | 2006-01-03 | Intel Corporation | System for handling microelectronic dies having a non-piercing die ejector |
CH696615A5 (de) * | 2003-09-22 | 2007-08-15 | Esec Trading Sa | Verfahren für die Justierung des Bondkopfs eines Die Bonders. |
US7147735B2 (en) * | 2004-07-22 | 2006-12-12 | Intel Corporation | Vibratable die attachment tool |
TWI234804B (en) * | 2004-08-03 | 2005-06-21 | Chunghwa Picture Tubes Ltd | Chip compressing mechanism and chip compressing process |
JP4589160B2 (ja) * | 2005-03-28 | 2010-12-01 | 芝浦メカトロニクス株式会社 | 電子部品の実装装置及び実装方法 |
US7355386B2 (en) * | 2005-11-18 | 2008-04-08 | Delta Design, Inc. | Method of automatically carrying IC-chips, on a planar array of vacuum nozzles, to a variable target in a chip tester |
US7368930B2 (en) * | 2006-08-04 | 2008-05-06 | Formfactor, Inc. | Adjustment mechanism |
-
2007
- 2007-06-27 JP JP2007168502A patent/JP4958655B2/ja not_active Expired - Fee Related
-
2008
- 2008-06-20 KR KR1020080058249A patent/KR20080114531A/ko not_active Application Discontinuation
- 2008-06-26 US US12/146,936 patent/US7712649B2/en active Active
- 2008-06-27 CN CNA2008101261380A patent/CN101335222A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2009010074A (ja) | 2009-01-15 |
US20090001133A1 (en) | 2009-01-01 |
US7712649B2 (en) | 2010-05-11 |
CN101335222A (zh) | 2008-12-31 |
KR20080114531A (ko) | 2008-12-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4958655B2 (ja) | 電子部品実装装置および電子装置の製造方法 | |
JP6029245B2 (ja) | 圧着装置および圧着方法 | |
KR20120109963A (ko) | 접합장치 및 접합방법 | |
US7828193B2 (en) | Method of mounting an electronic component and mounting apparatus | |
WO2009122711A1 (ja) | 部品実装装置および方法 | |
US20110287560A1 (en) | In-situ melt and reflow process for forming flip-chip interconnections and systems thereof | |
JP2011066027A (ja) | 矯正キャップ | |
JP2002110744A (ja) | 半導体実装装置、および半導体実装方法 | |
US7306133B2 (en) | System for fabricating an integrated circuit package on a printed circuit board | |
US7687314B2 (en) | Electronic apparatus manufacturing method | |
JP4619209B2 (ja) | 半導体素子実装方法および半導体素子実装装置 | |
WO2014188768A1 (ja) | 電子部品実装装置および電子部品の製造方法 | |
JP5013318B2 (ja) | 電子部品の実装装置及び実装方法 | |
JP4515813B2 (ja) | 部品実装機 | |
JP2006332354A (ja) | プリント回路基板の製造方法、プリント回路基板 | |
JP2007115873A (ja) | 電子部品実装方法及び実装装置 | |
JP2010103270A (ja) | 半導体装置および半導体装置の製造方法 | |
JP5851719B2 (ja) | マスクを用いてワークに導電性ボールを搭載する方法 | |
JP6770832B2 (ja) | 接合方法、プログラム、コンピュータ記憶媒体、接合装置及び接合システム | |
KR102217826B1 (ko) | 실장 장치 및 실장 방법 | |
JP5277894B2 (ja) | 樹脂塗布方法及び樹脂塗布装置 | |
KR101330225B1 (ko) | 기판 접합 방법 및 기판 리플로우 처리 장치 | |
JP2010278250A (ja) | 半導体装置の製造方法 | |
JP5627057B1 (ja) | 部品実装装置 | |
JP2005175475A (ja) | モジユ−ル封止方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20100301 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100304 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20111209 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111220 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120213 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120306 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120319 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150330 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4958655 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
LAPS | Cancellation because of no payment of annual fees |