JP4928613B2 - 多入力多出力(mimo)システムにおいてデータを送信する方法およびシステム - Google Patents
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- H03M13/1148—Structural properties of the code parity-check or generator matrix
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- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
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- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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Description
Claims (17)
- 多入力多出力(MIMO)システムにおいてデータを送信する方法であって、
複数の入力データストリームを受け取るステップと、
前記入力データストリームの低密度パリティ検査(LDPC)符号化をパリティ検査行列を使用して実行するLDPC符号化ステップであって、前記パリティ検査行列が、前記入力データストリームのストリームそれぞれを符号化するための複数のパリティ検査部分行列を備えている、前記ステップと、
前記LDPC符号化された入力データストリームを複数のアンテナを通じて送信するため時空間符号化を実行するステップと、
を含み、
前記LDPC符号化ステップが、前記入力データストリームを前記パリティ検査行列を使用して符号化する前に、前記パリティ検査部分行列の値(1または0)をレイヤに応じてそれぞれサイズもしくは1の数が異なる部分行列に置き換えるアンバランスリフティングを実行するステップ、
を含んでいる方法。 - 前記アンバランスリフティングを実行するステップが、前記パリティ検査部分行列の要素を、置き換えマッピングパターンに基づいて置き換えるステップを含んでいる、
請求項1に記載の方法。 - 前記アンバランスリフティングを実行するステップが、前記パリティ検査部分行列それぞれの行次数もしくは列次数、またはその両方を制御するステップ、を含んでいる、
請求項1または2に記載の方法。 - M個の異なるクラスのM個の入力ストリームを備えており、前記パリティ検査行列がM個のレイヤを有し、前記パリティ検査行列の各レイヤが、前記M個のクラスの1つに対応している、
請求項1から3のいずれかに記載の方法。 - 前記パリティ検査行列が複数の接続行列をさらに備えており、前記接続行列のそれぞれが、前記M個のレイヤのうちの2つのレイヤを、前記2つのレイヤの間の相関情報が前記LDPC符号化時に含まれるように、連結している、
請求項4に記載の方法。 - 前記パリティ検査行列がブロック単位での下三角行列であり、前記パリティ検査部分行列が、前記パリティ検査行列の主対角線に沿ったブロックとして配置されている、
請求項5に記載の方法。 - 前記接続行列が、前記パリティ検査行列の前記主対角線より下のブロックとして配置されており、前記主対角線より上のブロックがゼロ行列である、
請求項6に記載の方法。 - 各クラスが、ビット誤り率要求、データ送信速度要求、サービス品質(QoS)要求、送信アンテナの数、および送信条件から成る群のうちの1つまたは複数に基づいて、決定される、
請求項4から7のいずれかに記載の方法。 - 多入力多出力(MIMO)システムにおける送信器であって、
複数の入力データストリームを受け取る1つまたは複数の入力ユニットと、
低密度パリティ検査(LDPC)符号器と、
空間マッピングユニットと、を備えており、
前記LDPC符号器が、前記入力データストリームのLDPC符号化をパリティ検査行列を使用して実行し、前記パリティ検査行列が、前記入力データストリームのストリームそれぞれを符号化するための複数のパリティ検査部分行列を備えており、前記空間マッピングユニットが、前記LDPC符号化された入力データストリームを複数のアンテナを通じて送信するため時空間符号化を実行し、前記LDPC符号化器が、前記入力データストリームを前記パリティ検査行列を使用して符号化する前に、前記パリティ検査部分行列の値(1または0)をレイヤに応じてそれぞれサイズもしくは1の数が異なる部分行列に置き換えるアンバランスリフティングを実行する、
送信器。 - 前記パリティ検査行列の前記アンバランスリフティングが、前記パリティ検査部分行列の要素を、置き換えマッピングパターンに基づいて置き換えるステップ、を含んでいる、
請求項9に記載の送信器。 - 前記アンバランスリフティングが、前記パリティ検査部分行列それぞれの行次数もしくは列次数、またはその両方を制御するステップ、を含んでいる、
請求項9から10いずれかに記載の送信器。 - 前記複数の入力データストリームが、M個の異なるクラスのM個の入力ストリームを備えており、前記パリティ検査行列がM個のレイヤを有し、前記パリティ検査行列の各レイヤが、前記M個のクラスの1つに対応している、
請求項9から11いずれかに記載の送信器。 - 前記パリティ検査行列が複数の接続行列をさらに備えており、前記接続行列のそれぞれが、前記M個のレイヤのうちの2つのレイヤを、前記2つのレイヤの間の相関情報が前記LDPC符号化時に含まれるように、連結している、
請求項12に記載の送信器。 - 前記パリティ検査行列がブロック単位での下三角行列であり、前記パリティ検査部分行列が、前記パリティ検査行列の主対角線に沿ったブロックとして配置されている、
請求項13に記載の送信器。 - 前記接続行列が、前記パリティ検査行列の前記主対角線より下のブロックとして配置されており、前記主対角線より上のブロックがゼロ行列である、
請求項14に記載の送信器。 - 各クラスが、ビット誤り率の要求、データ送信速度要求、サービス品質(QoS)要求、送信アンテナの数、および送信条件から成る群のうちの1つまたは複数に基づいて、決定される、
請求項12から15のいずれかに記載の送信器。 - 多入力多出力(MIMO)システムに、前記MIMOシステムにおいてデータを送信する方法を実行するように命令するコンピュータコード手段、を格納しているコンピュータ可読データ記憶媒体であって、
前記方法が、
複数の入力データストリームを受け取るステップと、
前記入力データストリームの低密度パリティ検査(LDPC)符号化をパリティ検査行列を使用して実行するLDPC符号化ステップであって、前記パリティ検査行列が、前記入力データストリームのストリームそれぞれを符号化するための複数のパリティ検査部分行列を備えているステップと、
前記LDPC符号化された入力データストリームを複数のアンテナを通じて送信するため時空間符号化を実行するステップと、
を含み、
前記LDPC符号化ステップが、前記入力データストリームを前記パリティ検査行列を使用して符号化する前に、前記パリティ検査部分行列の値(1または0)をレイヤに応じてそれぞれサイズもしくは1の数が異なる部分行列に置き換えるアンバランスリフティングを実行するステップ、
を含んでいるコンピュータ可読データ記憶媒体。
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PCT/SG2006/000306 WO2008045001A1 (en) | 2006-10-18 | 2006-10-18 | A method and system for data transmission in a multiple input multiple output (mimo) system |
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US8225168B2 (en) | 2012-07-17 |
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JP4914497B2 (ja) | 2012-04-11 |
JP2010506547A (ja) | 2010-02-25 |
CN101529737B (zh) | 2012-10-24 |
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CN101529737A (zh) | 2009-09-09 |
US20100100789A1 (en) | 2010-04-22 |
US8464120B2 (en) | 2013-06-11 |
CN101558579B (zh) | 2012-09-05 |
WO2008048188A1 (en) | 2008-04-24 |
CN101558579A (zh) | 2009-10-14 |
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