JP4870501B2 - Manufacturing method of electronic component built-in substrate - Google Patents

Manufacturing method of electronic component built-in substrate Download PDF

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JP4870501B2
JP4870501B2 JP2006244210A JP2006244210A JP4870501B2 JP 4870501 B2 JP4870501 B2 JP 4870501B2 JP 2006244210 A JP2006244210 A JP 2006244210A JP 2006244210 A JP2006244210 A JP 2006244210A JP 4870501 B2 JP4870501 B2 JP 4870501B2
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substrate
electronic component
photosensitive resin
multilayer wiring
wiring structure
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JP2007110095A (en
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昌宏 春原
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16237—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area disposed in a recess of the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Description

本発明は、電子部品内蔵基板の製造方法に係り、特に多層配線構造体を有する基板に電子部品を内蔵した電子部品内蔵基板の製造方法に関する。 The present invention relates to a method of manufacturing an electronic component built-board, a method of manufacturing an electronic component built-board in particular a built-in electronic components on a substrate having a multilayer wiring structure.

近年、半導体チップ等の電子部品の高密度化が著しく進み、電子部品のサイズの縮小化が図られている。これに伴い、複数の絶縁層、配線、及びビアが積層された多層配線構造体を備えた基板に電子部品を内蔵した電子部品内蔵基板が提案されている。   In recent years, the density of electronic components such as semiconductor chips has increased remarkably, and the size of electronic components has been reduced. Along with this, an electronic component built-in substrate has been proposed in which an electronic component is built in a substrate having a multilayer wiring structure in which a plurality of insulating layers, wirings, and vias are stacked.

図１は、従来の電子部品内蔵基板の断面図である。   FIG. 1 is a cross-sectional view of a conventional electronic component built-in substrate.

図１に示すように、電子部品内蔵基板１００は、基板１０１と、電子部品１１３とを有する。基板１０１は、コア基材１０２と、コア基板１０２上に設けられた配線１０４と、多層配線構造体１０３とを有する。   As shown in FIG. 1, the electronic component built-in substrate 100 includes a substrate 101 and an electronic component 113. The substrate 101 includes a core base material 102, wirings 104 provided on the core substrate 102, and a multilayer wiring structure 103.

多層配線構造体１０３は、配線１０４が形成されたコア基板１０２上に設けられている。多層配線構造体１０３は、コア基板１０２上に積層された絶縁層１０６〜１０８と、絶縁層１０６〜１０８上に設けられた配線１０９〜１１１と、絶縁層１０６〜１０８に設けられ、配線１０９〜１１１間を電気的に接続するビア（図示せず）とを有する。   The multilayer wiring structure 103 is provided on the core substrate 102 on which the wiring 104 is formed. The multilayer wiring structure 103 includes insulating layers 106 to 108 stacked on the core substrate 102, wirings 109 to 111 provided on the insulating layers 106 to 108, and insulating layers 106 to 108. And vias (not shown) for electrically connecting between 111.

電子部品１１３は、配線１０４上に設けられており、配線１０４と電気的に接続されている。また、電子部品１１３は、絶縁層１０６，１０７に覆われている。   The electronic component 113 is provided on the wiring 104 and is electrically connected to the wiring 104. The electronic component 113 is covered with insulating layers 106 and 107.

このような構成とされた電子部品内蔵基板１００では、コア基板１０２に配線１０４を形成後、電子部品１１３を配線１０４上に接続し、その後、多層配線構造体１０３となる絶縁層１０６〜１０８、配線１０９〜１１１、及びビア（図示せず）を形成する（例えば、特許文献１参照）。
特開平１１−２７４７３４号公報 In the electronic component built-in substrate 100 configured as described above, after the wiring 104 is formed on the core substrate 102, the electronic component 113 is connected to the wiring 104, and then the insulating layers 106 to 108 that become the multilayer wiring structure 103, Wirings 109 to 111 and vias (not shown) are formed (see, for example, Patent Document 1).
JP 11-274734 A

しかしながら、従来の電子部品内蔵基板１００では、電子部品１１３を配線１０４に接続後に多層配線構造体１０３を形成する。そのため、電子部品１１３と配線１０４との間の電気的接続に問題がない場合でも、配線１０９〜１１１及びビア（図示せず）に不具合（例えば、ビアオープンや配線ショート等）が発生した場合には電子部品内蔵基板１００の歩留まりが低下してしまうという問題があった。   However, in the conventional electronic component built-in substrate 100, the multilayer wiring structure 103 is formed after the electronic component 113 is connected to the wiring 104. Therefore, even when there is no problem in the electrical connection between the electronic component 113 and the wiring 104, when a defect (for example, via open or wiring short) occurs in the wiring 109 to 111 and the via (not shown). However, there is a problem that the yield of the electronic component built-in substrate 100 is lowered.

そこで本発明は、上述した問題点に鑑みなされたものであり、本発明の目的は、歩留まりを向上させることのできる電子部品内蔵基板の製造方法を提供することである。 The present invention has been made in view of the above problems, an object of the present invention is to provide a method of manufacturing an electronic component built-board capable of improving the yield.

本発明の一観点によれば、電子部品が内蔵された電子部品内蔵基板の製造方法において、第１の多層配線構造体を有する第１の基板を形成する第１の基板形成工程と、第２の多層配線構造体を有する第２の基板を形成する第２の基板形成工程と、接着性を有した第１の感光性樹脂により、前記電子部品を前記第１の基板に接着させて、前記電子部品と前記第１の多層配線構造体とを電気的に接続する電子部品接続工程と、前記電子部品が配設された第１の基板の面と前記電子部品とを覆うように接着性を有した第２の感光性樹脂を形成する第２の感光性樹脂形成工程と、前記第２の基板を前記第２の感光性樹脂上に接着させて、前記第１の基板の上方に前記第２の基板を配設する第２の基板配設工程とを含むことを特徴とする電子部品内蔵基板の製造方法が提供される。 According to one aspect of the present invention, in a method for manufacturing an electronic component built-in substrate in which an electronic component is embedded, a first substrate forming step of forming a first substrate having a first multilayer wiring structure, A second substrate forming step of forming a second substrate having the multilayer wiring structure, and a first photosensitive resin having adhesiveness to bond the electronic component to the first substrate, An electronic component connecting step for electrically connecting the electronic component and the first multilayer wiring structure, and adhesion so as to cover the surface of the first substrate on which the electronic component is disposed and the electronic component. A second photosensitive resin forming step of forming the second photosensitive resin having the second photosensitive resin, and adhering the second substrate onto the second photosensitive resin, so that the first substrate is disposed above the first substrate. And a second substrate disposing step of disposing two substrates. The method of manufacturing is provided.

本発明によれば、第１の多層配線構造体を有する第１の基板と、第２の多層配線構造体を有する第２の基板とを形成後、第１及び第２の基板の電気的な検査を行って、良品とされた第１及び第２の基板間に電子部品を内蔵することにより、電子部品内蔵基板の歩留まりを向上させることができる。   According to the present invention, after forming the first substrate having the first multilayer wiring structure and the second substrate having the second multilayer wiring structure, the electrical connection between the first and second substrates is achieved. The yield of the electronic component built-in substrate can be improved by conducting the inspection and embedding the electronic component between the first and second substrates regarded as non-defective products.

また、接着性を有した第１の感光性樹脂により電子部品を第１の基板に接着させ、電子部品が配設された第１の基板の面と電子部品とを覆うように接着性を有した第２の感光性樹脂を形成することにより、第１の基板と第２の基板との間を精度良く封止して、電子部品内蔵基板の歩留まりを向上させることができる。   In addition, the first photosensitive resin having adhesiveness is used to adhere the electronic component to the first substrate, and the adhesive has an adhesive property so as to cover the surface of the first substrate on which the electronic component is disposed and the electronic component. By forming the second photosensitive resin, the space between the first substrate and the second substrate can be accurately sealed, and the yield of the electronic component built-in substrate can be improved.

本発明によれば、電子部品内蔵基板の歩留まりを向上させることができる。   According to the present invention, the yield of the electronic component built-in substrate can be improved.

次に、図面に基づいて本発明の実施の形態について説明する。   Next, embodiments of the present invention will be described with reference to the drawings.

（第１の実施の形態）
図２は、本発明の第１の実施の形態に係る電子部品内蔵基板の断面図である。 (First embodiment)
FIG. 2 is a cross-sectional view of the electronic component built-in substrate according to the first embodiment of the present invention.

図２を参照して、本発明の第１の実施の形態に係る電子部品内蔵基板１０について説明する。電子部品内蔵基板１０は、第１の基板１１と、第２の基板１２と、電子部品１３と、接着性を有した樹脂である感光性樹脂１４と、導電部材１５，１６とを有する。   With reference to FIG. 2, an electronic component built-in substrate 10 according to a first embodiment of the present invention will be described. The electronic component built-in substrate 10 includes a first substrate 11, a second substrate 12, an electronic component 13, a photosensitive resin 14 that is an adhesive resin, and conductive members 15 and 16.

第１の基板１１は、コアレス基板であり、第１の多層配線構造体１８と、保護膜２４，２５と、外部接続端子２６とを有する。   The first substrate 11 is a coreless substrate and includes a first multilayer wiring structure 18, protective films 24 and 25, and external connection terminals 26.

第１の多層配線構造体１８は、絶縁層２７，３１と、配線２８，２９，３３，３４と、ビア３０，３２とを有する。配線２８は、絶縁層２７の上面に設けられている。配線２８は、ビア３０，３２と電気的に接続されている。配線２９は、絶縁層２７の下面に設けられている。配線２９は、外部接続端子２６が接続される接続部２９Ａを有する。ビア３０は、絶縁層２７を貫通するように設けられている。ビア３０の上端部は、配線２８と接続されており、ビア３０の下端部は、配線２９と接続されている。ビア３０は、配線２８と配線２９との間を電気的に接続する。   The first multilayer wiring structure 18 includes insulating layers 27 and 31, wirings 28, 29, 33 and 34, and vias 30 and 32. The wiring 28 is provided on the upper surface of the insulating layer 27. The wiring 28 is electrically connected to the vias 30 and 32. The wiring 29 is provided on the lower surface of the insulating layer 27. The wiring 29 has a connection portion 29A to which the external connection terminal 26 is connected. The via 30 is provided so as to penetrate the insulating layer 27. An upper end portion of the via 30 is connected to the wiring 28, and a lower end portion of the via 30 is connected to the wiring 29. The via 30 electrically connects the wiring 28 and the wiring 29.

絶縁層３１は、配線２８を覆うように絶縁層２７上に設けられている。ビア３２は、配線２８上に位置する絶縁層３２を貫通するように設けられている。ビア３２は、配線２８と電気的に接続されている。配線３３は、絶縁層３１の上面に設けられている。配線３３は、ビア３２と電気的に接続されている。配線３３は、導電部材１６が接続される接続部３３Ａを有する。配線３４は、配線３３よりも内側に位置する絶縁層３１の上面に設けられている。配線３４は、導電部材１５が接続される接続部３４Ａを有する。配線３４は、ビア３２と電気的に接続されている。   The insulating layer 31 is provided on the insulating layer 27 so as to cover the wiring 28. The via 32 is provided so as to penetrate the insulating layer 32 located on the wiring 28. The via 32 is electrically connected to the wiring 28. The wiring 33 is provided on the upper surface of the insulating layer 31. The wiring 33 is electrically connected to the via 32. The wiring 33 has a connection portion 33A to which the conductive member 16 is connected. The wiring 34 is provided on the upper surface of the insulating layer 31 located inside the wiring 33. The wiring 34 has a connection portion 34A to which the conductive member 15 is connected. The wiring 34 is electrically connected to the via 32.

絶縁層２７，３１の材料としては、例えば、エポキシ系樹脂を用いることができる。配線２８，２９，３３，３４、及びビア３０，３２の材料としては、例えば、導電金属を用いることができ、具体的な導電金属としては、例えば、Ｃｕを用いることができる。   As a material of the insulating layers 27 and 31, for example, an epoxy resin can be used. As a material of the wirings 28, 29, 33, and 34 and the vias 30 and 32, for example, a conductive metal can be used, and as a specific conductive metal, for example, Cu can be used.

保護膜２４は、配線３３，３４を覆うと共に、接続部３３Ａ，３４Ａを露出するように絶縁層３１上に設けられている。保護膜２５は、配線２９を覆うと共に、接続部２９Ａを露出するように絶縁層２７の下面に設けられている。保護膜２４，２５としては、例えば、ソルダーレジストを用いることができる。   The protective film 24 is provided on the insulating layer 31 so as to cover the wirings 33 and 34 and expose the connecting portions 33A and 34A. The protective film 25 is provided on the lower surface of the insulating layer 27 so as to cover the wiring 29 and expose the connection portion 29A. As the protective films 24 and 25, for example, a solder resist can be used.

外部接続端子２６は、接続部２９Ａに設けられている。外部接続端子２６は、電子部品内蔵基板１０をマザーボード等の実装基板（図示せず）に接続する際に使用される端子である。外部接続端子２６としては、例えば、はんだボールを用いることができる。   The external connection terminal 26 is provided in the connection portion 29A. The external connection terminal 26 is a terminal used when the electronic component built-in substrate 10 is connected to a mounting substrate (not shown) such as a mother board. As the external connection terminal 26, for example, a solder ball can be used.

上記構成とされた第１の基板１１は、第１の多層配線構造体１８に不具合（例えば、ビアオープンや配線ショート等）がないことが確認された良品の基板である。   The first substrate 11 configured as described above is a non-defective substrate in which it has been confirmed that the first multilayer wiring structure 18 has no defects (for example, via open, wiring short circuit, etc.).

第２の基板１２は、第１の基板１１の上方に配置されており、柱状とされた導電部材１６を介して、第１の基板１１と電気的に接続されている。第２の基板１２は、コアレス基板であり、第２の多層配線構造体４１と、保護膜４２，４３とを有する。   The second substrate 12 is disposed above the first substrate 11 and is electrically connected to the first substrate 11 via a columnar conductive member 16. The second substrate 12 is a coreless substrate, and includes a second multilayer wiring structure 41 and protective films 42 and 43.

第２の多層配線構造体４１は、絶縁層４５，５１と、配線４６，４７，５３と、ビア４９，５２とを有する。配線４６は、絶縁層４５の上面に設けられている。配線４６は、ビア４９，５２と電気的に接続されている。配線４７は、絶縁層４５の下面に設けられている。配線４７は、導電部材１６が接続される接続部４７Ａを有する。接続部４７Ａは、導電部材１６を介して、第１の基板１１に設けられた接続部３３Ａと電気的に接続されている。これにより、第２の基板１２に設けられた第２の多層配線構造体４１は、第１の多層配線構造体１８と電気的に接続される。   The second multilayer wiring structure 41 includes insulating layers 45 and 51, wirings 46, 47 and 53, and vias 49 and 52. The wiring 46 is provided on the upper surface of the insulating layer 45. The wiring 46 is electrically connected to the vias 49 and 52. The wiring 47 is provided on the lower surface of the insulating layer 45. The wiring 47 has a connection portion 47A to which the conductive member 16 is connected. The connecting portion 47A is electrically connected to the connecting portion 33A provided on the first substrate 11 through the conductive member 16. Accordingly, the second multilayer wiring structure 41 provided on the second substrate 12 is electrically connected to the first multilayer wiring structure 18.

ビア４９は、絶縁層４５を貫通するように設けられている。ビア４９の上端部は、配線４６と接続されており、ビア４９の下端部は、配線４７と接続されている。ビア３０は、配線４６と配線４７との間を電気的に接続する。   The via 49 is provided so as to penetrate the insulating layer 45. The upper end portion of the via 49 is connected to the wiring 46, and the lower end portion of the via 49 is connected to the wiring 47. The via 30 electrically connects the wiring 46 and the wiring 47.

絶縁層５１は、配線４６を覆うように絶縁層４５上に設けられている。ビア５２は、配線４６上に位置する絶縁層５１を貫通するように設けられている。ビア５２は、配線４６，５３と電気的に接続されている。配線５３は、絶縁層５１の上面に設けられている。配線５３は、ビア５２と電気的に接続されている。   The insulating layer 51 is provided on the insulating layer 45 so as to cover the wiring 46. The via 52 is provided so as to penetrate the insulating layer 51 located on the wiring 46. The via 52 is electrically connected to the wirings 46 and 53. The wiring 53 is provided on the upper surface of the insulating layer 51. The wiring 53 is electrically connected to the via 52.

絶縁層４５，５１の材料としては、例えば、エポキシ系樹脂を用いることができる。配線４６，４７，５３、及びビア４９，５２の材料としては、例えば、導電金属を用いることができ、具体的な導電金属としては、例えば、Ｃｕを用いることができる。   As a material of the insulating layers 45 and 51, for example, an epoxy resin can be used. As a material of the wirings 46, 47, 53 and the vias 49, 52, for example, a conductive metal can be used, and as a specific conductive metal, for example, Cu can be used.

保護膜４２は、配線５３を覆うように絶縁層５１の上面に設けられている。保護膜４３は、配線４７を覆うと共に、接続部４７Ａを露出するように絶縁層４５の下面に設けられている。保護膜４２，４３としては、例えば、ソルダーレジストを用いることができる。   The protective film 42 is provided on the upper surface of the insulating layer 51 so as to cover the wiring 53. The protective film 43 is provided on the lower surface of the insulating layer 45 so as to cover the wiring 47 and expose the connecting portion 47A. As the protective films 42 and 43, for example, a solder resist can be used.

上記構成とされた第２の基板１２は、第２の多層配線構造体４１に不具合（例えば、ビアオープンや配線ショート等）がないことが確認された良品の基板である。   The second substrate 12 having the above configuration is a non-defective substrate in which it is confirmed that the second multilayer wiring structure 41 has no defects (for example, via open or wiring short).

電子部品１３は、第１の基板１１と第２の基板１２との間に配置されている。電子部品１３は、電極パッド１３Ａを有する。電極パッド１３Ａは、導電部材１５を介して、接続部３４Ａと電気的に接続されている。これにより、電子部品１３は、第１の多層配線構造体１８と電気的に接続される。電子部品１３としては、例えば、半導体チップや、チップ部品（非常に小型に作られた抵抗、コンデンサ等の単独部品）等の部品を用いることができる。   The electronic component 13 is disposed between the first substrate 11 and the second substrate 12. The electronic component 13 has an electrode pad 13A. The electrode pad 13A is electrically connected to the connecting portion 34A via the conductive member 15. Thereby, the electronic component 13 is electrically connected to the first multilayer wiring structure 18. As the electronic component 13, for example, a component such as a semiconductor chip or a chip component (single component such as a resistor or a capacitor made very small) can be used.

感光性樹脂１４は、第１の基板１１と第２の基板１２との間に設けられている。感光性樹脂１４は、露光、現像処理を行った後も接着性を有する（接着性を維持可能な）感光性樹脂である。感光性樹脂１４は、電子部品１３を封止すると共に、第１の基板１１と第２の基板１２との間を接着している。また、感光性樹脂１４は、第１の基板１１と第２の基板１２との間の熱膨張係数の差と、第１の基板１１と電子部品１３との間の熱膨張係数の差とを小さくして、第１の基板１１、第２の基板１２、及び電子部品１３が破損することを防止する機能を有する。   The photosensitive resin 14 is provided between the first substrate 11 and the second substrate 12. The photosensitive resin 14 is a photosensitive resin that has adhesiveness (can maintain adhesiveness) even after exposure and development processing. The photosensitive resin 14 seals the electronic component 13 and bonds between the first substrate 11 and the second substrate 12. Further, the photosensitive resin 14 has a difference in thermal expansion coefficient between the first substrate 11 and the second substrate 12 and a difference in thermal expansion coefficient between the first substrate 11 and the electronic component 13. The function of preventing the first substrate 11, the second substrate 12, and the electronic component 13 from being damaged is reduced.

感光性樹脂１４は、開口部５５と、貫通孔５６とを有する。開口部５５は、接続部３４Ａ上の感光性樹脂１４に形成されている。開口部５５は、接続部３４Ａを露出している。貫通孔５６は、接続部３３Ａと接続部４７Ａとの間に位置する感光性樹脂１４を貫通するように形成されている。貫通孔５６は、接続部３３Ａ，４７Ａを露出する。貫通孔５６の形状は、柱状（例えば、角柱や、円柱等）とされている。   The photosensitive resin 14 has an opening 55 and a through hole 56. The opening 55 is formed in the photosensitive resin 14 on the connection portion 34A. The opening 55 exposes the connecting portion 34A. The through hole 56 is formed so as to penetrate the photosensitive resin 14 located between the connection portion 33A and the connection portion 47A. The through hole 56 exposes the connecting portions 33A and 47A. The shape of the through hole 56 is a columnar shape (for example, a prism or a cylinder).

このように、第１の基板１１と第２の基板１２との間に接着性を有した感光性樹脂１４を設けることにより、第１の基板１１と第２の基板１２との間を精度良く封止して、電子部品内蔵基板１０の歩留まりを向上させることができる。   Thus, by providing the photosensitive resin 14 having adhesiveness between the first substrate 11 and the second substrate 12, the gap between the first substrate 11 and the second substrate 12 can be accurately determined. By sealing, the yield of the electronic component built-in substrate 10 can be improved.

なお、接着性を有する感光性樹脂１４としては、例えば、フィルム状とされた感光性樹脂である感光性樹脂フィルムを用いることができる。感光性樹脂フィルムとしては、例えば、エポキシ系樹脂またはノボラック系樹脂に光開始剤を含有させたものを用いることができる。   In addition, as the photosensitive resin 14 which has adhesiveness, the photosensitive resin film which is a photosensitive resin made into the film form can be used, for example. As the photosensitive resin film, for example, an epoxy resin or a novolac resin containing a photoinitiator can be used.

導電部材１５は、開口部５５に設けられている。導電部材１５は、電極パッド１３Ａと接続部３４Ａとを電気的に接続している。導電部材１５は、電子部品１３と第１の多層配線構造体１８とを電気的に接続する。導電部材１５の材料としては、導電材料を用いることができ、具体的な導電材料としては、例えば、はんだを用いることができる。   The conductive member 15 is provided in the opening 55. The conductive member 15 electrically connects the electrode pad 13A and the connection portion 34A. The conductive member 15 electrically connects the electronic component 13 and the first multilayer wiring structure 18. As a material of the conductive member 15, a conductive material can be used, and as a specific conductive material, for example, solder can be used.

導電部材１６は、柱状（例えば、角柱や、円柱等）とされており、貫通孔５６に設けられている。導電部材１６は、接続部３３Ａと接続部４７Ａとを電気的に接続している。導電部材１６は、第１の多層配線構造体１８と第２の多層配線構造体４１とを電気的に接続する部材である。導電部材１６としては、例えば、はんだや、接続部４７Ａ上にＣｕ、Ｎｉ、Ａｕ、はんだを順次積層した積層膜等を用いることができる。   The conductive member 16 has a columnar shape (for example, a prism or a cylinder) and is provided in the through hole 56. The conductive member 16 electrically connects the connecting portion 33A and the connecting portion 47A. The conductive member 16 is a member that electrically connects the first multilayer wiring structure 18 and the second multilayer wiring structure 41. As the conductive member 16, for example, a solder or a laminated film in which Cu, Ni, Au, and solder are sequentially laminated on the connection portion 47A can be used.

このように、第１の基板１１と第２の基板１２との間に、柱状とされた導電部材１６を設け、導電部材１６を介して第１の基板１１と第２の基板１２とを電気的に接続することにより、電子部品１３の高さに応じて、導電部材１６の高さを変えることが可能となるため、様々な電子部品１３を内蔵することができる。   Thus, the columnar conductive member 16 is provided between the first substrate 11 and the second substrate 12, and the first substrate 11 and the second substrate 12 are electrically connected via the conductive member 16. By connecting them electrically, the height of the conductive member 16 can be changed according to the height of the electronic component 13, so that various electronic components 13 can be incorporated.

本実施の形態の電子部品内蔵基板によれば、第１の多層配線構造体１８を有する第１の基板１１と、第２の多層配線構造体４１を有する第２の基板１２とを設けることにより、電子部品１３を内蔵する前に、第１及び第２の多層配線構造体１８，４１の電気的な検査を行うことが可能となる。これにより、良品とされた第１及び第２の基板１１，１２間に電子部品１３を内蔵することが可能となるため、電子部品内蔵基板１０の歩留まりを向上させることができる。   According to the electronic component built-in substrate of the present embodiment, by providing the first substrate 11 having the first multilayer wiring structure 18 and the second substrate 12 having the second multilayer wiring structure 41. Before the electronic component 13 is built in, the first and second multilayer wiring structures 18 and 41 can be electrically inspected. As a result, the electronic component 13 can be built in between the first and second substrates 11 and 12 that are regarded as non-defective products, so that the yield of the electronic component built-in substrate 10 can be improved.

また、第１の基板１１と第２の基板１２との間に接着性を有した感光性樹脂１４を設けることにより、第１の基板１１と第２の基板１２との間を精度良く封止して、電子部品内蔵基板１０の歩留まりを向上させることができる。   Further, by providing a photosensitive resin 14 having adhesiveness between the first substrate 11 and the second substrate 12, the gap between the first substrate 11 and the second substrate 12 is accurately sealed. Thus, the yield of the electronic component built-in substrate 10 can be improved.

図３〜図１２は、本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図である。図３〜図１２において、図２に示した電子部品内蔵基板１０と同一構成部分には同一符号を付す。   3 to 12 are views showing a manufacturing process of the electronic component built-in substrate according to the first embodiment of the present invention. 3-12, the same code | symbol is attached | subjected to the same component as the electronic component built-in board | substrate 10 shown in FIG.

始めに、図３に示すように、公知の技術を用いて、第１の多層配線構造体１８と、保護膜２４，２５と、外部接続端子２６とを有した第１の基板１１を形成する（第１の基板形成工程）。その後、第１の多層配線構造体１８が形成された第１の基板１１の電気的な検査を行って、良品の第１の基板１１を得る。   First, as shown in FIG. 3, the first substrate 11 having the first multilayer wiring structure 18, the protective films 24 and 25, and the external connection terminals 26 is formed using a known technique. (First substrate forming step). Thereafter, the first substrate 11 on which the first multilayer wiring structure 18 is formed is electrically inspected to obtain a non-defective first substrate 11.

次いで、図４に示すように、第２の多層配線構造体４１と、保護膜４２，４３とを有した第２の基板１２を形成する（第２の基板形成工程）。その後、第２の多層配線構造体４１が形成された第２の基板１２の電気的な検査を行って、良品の第２の基板１２を得る。   Next, as shown in FIG. 4, the second substrate 12 having the second multilayer wiring structure 41 and the protective films 42 and 43 is formed (second substrate forming step). Thereafter, the second substrate 12 on which the second multilayer wiring structure 41 is formed is electrically inspected to obtain a non-defective second substrate 12.

次いで、図５に示すように、第１の基板１１の上面（保護膜２４及び接続部３３Ａ，３４Ｂが形成された側の面）を覆うように、接着性を有する第１の感光性樹脂６１を形成する。具体的には、第１の基板１１の上面に、第１の感光性樹脂６１として接着性を有する感光性樹脂フィルムを貼り付ける。感光性樹脂フィルムとしては、例えば、エポキシ系樹脂またはノボラック系樹脂に光開始剤を含有させたものを用いる。また、感光性樹脂フィルムの厚さは、例えば、３０μｍ〜５０μｍとすることができる。なお、第１の感光性樹脂６１は、露光、現像処理を行った後も接着性を有する（接着性を維持可能な）感光性樹脂である。   Next, as shown in FIG. 5, the first photosensitive resin 61 having adhesive properties so as to cover the upper surface of the first substrate 11 (the surface on which the protective film 24 and the connection portions 33A and 34B are formed). Form. Specifically, a photosensitive resin film having adhesiveness is attached as the first photosensitive resin 61 to the upper surface of the first substrate 11. As the photosensitive resin film, for example, an epoxy resin or a novolac resin containing a photoinitiator is used. Moreover, the thickness of the photosensitive resin film can be 30 micrometers-50 micrometers, for example. Note that the first photosensitive resin 61 is a photosensitive resin that has adhesiveness (can maintain adhesiveness) even after exposure and development processing.

このように、第１の感光性樹脂６１として接着性を有する感光性樹脂フィルムを用いることにより、接着性を有した液状の感光性樹脂を用いた場合と比較して、第１の感光性樹脂６１を容易に形成することができる。   Thus, by using the photosensitive resin film having adhesiveness as the first photosensitive resin 61, the first photosensitive resin is compared with the case where the liquid photosensitive resin having adhesiveness is used. 61 can be formed easily.

次いで、図６に示すように、第１の感光性樹脂６１を露光、現像処理して、接続部３４Ａを露出する開口部５５を形成すると共に、電子部品配設領域Ａ以外の領域に形成された第１の感光性樹脂６１を除去する。なお、電子部品配設領域Ａとは、電子部品１３と接触する第１の感光性樹脂６１上の領域のことである。   Next, as shown in FIG. 6, the first photosensitive resin 61 is exposed and developed to form an opening 55 that exposes the connection portion 34 </ b> A, and is formed in a region other than the electronic component placement region A. The first photosensitive resin 61 is removed. The electronic component placement region A is a region on the first photosensitive resin 61 that contacts the electronic component 13.

次いで、図７に示すように、電子部品１３の電極パッド１３Ａに導電部材１５を形成する。具体的には、電子部品１３の電極パッド１３Ａに、導電部材１５として柱状のはんだを形成する。   Next, as shown in FIG. 7, the conductive member 15 is formed on the electrode pad 13 </ b> A of the electronic component 13. Specifically, columnar solder is formed as the conductive member 15 on the electrode pad 13 </ b> A of the electronic component 13.

次いで、図８に示すように、接着性を有した第１の感光性樹脂６１上に電子部品１３を接着させ、導電部材１５を開口部５５に挿入し、加熱により導電部材１５を溶融させて、導電部材１５と接続部３４Ａとを接続する（電子部品接続工程）。これにより、電子部品１３は、第１の多層配線構造体１８と電気的に接続される。また、導電部材１５を溶融させる際の加熱条件は、例えば、温度が２３０〜２５０℃、加熱時間を数秒〜１０秒程度とすることができる。   Next, as shown in FIG. 8, the electronic component 13 is bonded onto the first photosensitive resin 61 having adhesiveness, the conductive member 15 is inserted into the opening 55, and the conductive member 15 is melted by heating. Then, the conductive member 15 and the connecting portion 34A are connected (electronic component connecting step). Thereby, the electronic component 13 is electrically connected to the first multilayer wiring structure 18. The heating conditions for melting the conductive member 15 can be, for example, a temperature of 230 to 250 ° C. and a heating time of about several seconds to 10 seconds.

次いで、図９に示すように、図８に示した構造体の上面を覆うように、接着性を有した第２の感光性樹脂６２を形成する（第２の感光性樹脂形成工程）。具体的には、図８に示した構造体の上面を覆うように、第２の感光性樹脂６２として感光性樹脂フィルムを貼り付ける。感光性樹脂フィルムとしては、例えば、エポキシ系樹脂またはノボラック系樹脂に光開始剤を含有させたものを用いる。また、感光性樹脂フィルムの厚さは、例えば、電子部品１３の厚さが５０μｍの場合、１００μｍとすることができる。   Next, as shown in FIG. 9, a second photosensitive resin 62 having adhesiveness is formed so as to cover the upper surface of the structure shown in FIG. 8 (second photosensitive resin forming step). Specifically, a photosensitive resin film is attached as the second photosensitive resin 62 so as to cover the upper surface of the structure shown in FIG. As the photosensitive resin film, for example, an epoxy resin or a novolac resin containing a photoinitiator is used. Moreover, the thickness of the photosensitive resin film can be set to 100 μm, for example, when the thickness of the electronic component 13 is 50 μm.

なお、第２の感光性樹脂６２は、露光、現像処理を行った後も接着性を有する（接着性を維持可能な）感光性樹脂である。また、感光性樹脂フィルムを貼り付けた後に、感光性樹脂フィルムの上面に平坦な面を有する板を押し当てて、感光性樹脂フィルムの上面を平坦な面としてもよい。   Note that the second photosensitive resin 62 is a photosensitive resin that has adhesiveness (can maintain adhesiveness) even after exposure and development processing. Alternatively, after the photosensitive resin film is attached, a plate having a flat surface may be pressed against the upper surface of the photosensitive resin film so that the upper surface of the photosensitive resin film is a flat surface.

このように、第２の感光性樹脂６２として接着性を有する感光性樹脂フィルムを用いることにより、接着性を有した液状の感光性樹脂を用いた場合と比較して、第２の感光性樹脂６２を容易に形成することができる。   Thus, by using the photosensitive resin film having adhesiveness as the second photosensitive resin 62, the second photosensitive resin is compared with the case where the liquid photosensitive resin having adhesiveness is used. 62 can be formed easily.

次いで、図１０に示すように、第２の感光性樹脂６２を露光、現像処理して、接続部３３Ａを露出する貫通孔５６を形成する。これにより、開口部５５を有した第１の感光性樹脂６１と、貫通孔５６を有した第２の感光性樹脂６２とよりなる感光性樹脂１４が形成される。   Next, as shown in FIG. 10, the second photosensitive resin 62 is exposed and developed to form a through hole 56 that exposes the connecting portion 33A. Thereby, the photosensitive resin 14 which consists of the 1st photosensitive resin 61 which has the opening part 55, and the 2nd photosensitive resin 62 which has the through-hole 56 is formed.

次いで、図１１に示すように、第２の基板１２の接続部４７Ａに導電部材１６を形成する（導電部材形成工程）。具体的には、第２の基板１２の接続部４７Ａに導電部材１６として、はんだ、或いは、接続部４７Ａ上にＣｕ、Ｎｉ、Ａｕ、はんだを順次積層した積層膜を形成する。積層膜を構成するＣｕ、Ｎｉ、及びＡｕは、それぞれめっき法により形成することができる。   Next, as shown in FIG. 11, the conductive member 16 is formed on the connection portion 47 </ b> A of the second substrate 12 (conductive member forming step). Specifically, the conductive member 16 is formed on the connection portion 47A of the second substrate 12 as a conductive member 16 or a laminated film in which Cu, Ni, Au, and solder are sequentially stacked on the connection portion 47A. Cu, Ni, and Au constituting the laminated film can be formed by plating.

次いで、図１２に示すように、接着性を有した第２の感光性樹脂６２上に第２の基板１２を接着させ、貫通孔５６に導電部材１６を挿入し、加熱により導電部材１６を溶融させて、導電部材１６と接続部３３Ａとを接続する（第２の基板配設工程）。これにより、第２の多層配線構造体４１は、第１の多層配線構造体１８と電気的に接続されて、電子部品内蔵基板１０が製造される。なお、導電部材１６のはんだを溶融させる際の加熱条件は、例えば、温度が２３０〜２５０℃、加熱時間を数秒〜１０秒程度とすることができる。   Next, as shown in FIG. 12, the second substrate 12 is bonded onto the second photosensitive resin 62 having adhesiveness, the conductive member 16 is inserted into the through hole 56, and the conductive member 16 is melted by heating. Thus, the conductive member 16 and the connecting portion 33A are connected (second substrate disposing step). Thereby, the second multilayer wiring structure 41 is electrically connected to the first multilayer wiring structure 18 to manufacture the electronic component built-in substrate 10. In addition, the heating conditions for melting the solder of the conductive member 16 can be, for example, a temperature of 230 to 250 ° C. and a heating time of about several seconds to 10 seconds.

本実施の形態の電子部品内蔵基板の製造方法によれば、第１の多層配線構造体１８を有する第１の基板１１と、第２の多層配線構造体４１を有する第２の基板１２とを形成後、第１及び第２の基板１１，１２の電気的な検査を行って、良品とされた第１及び第２の基板１１，１２間に電子部品１３を内蔵することにより、電子部品内蔵基板１０の歩留まりを向上させることができる。   According to the manufacturing method of the electronic component built-in substrate of the present embodiment, the first substrate 11 having the first multilayer wiring structure 18 and the second substrate 12 having the second multilayer wiring structure 41 are obtained. After the formation, the first and second substrates 11 and 12 are electrically inspected, and the electronic component 13 is embedded between the first and second substrates 11 and 12 which are regarded as non-defective products, thereby incorporating the electronic component. The yield of the substrate 10 can be improved.

また、接着性を有した感光性樹脂１４を用いることにより、例えば、第１の基板１１と第２の基板１２との間に毛細管現象によりアンダーフィル樹脂を形成する場合と比較して、第１の基板１１と第２の基板１２との間を精度良く封止することが可能となるため、電子部品内蔵基板１０の歩留まりを向上させることができる。   In addition, by using the photosensitive resin 14 having adhesiveness, for example, compared with the case where an underfill resin is formed between the first substrate 11 and the second substrate 12 by a capillary phenomenon, the first resin 11 is used. Since it becomes possible to seal between the board | substrate 11 and the 2nd board | substrate 12 with a sufficient precision, the yield of the electronic component built-in board | substrate 10 can be improved.

さらに、第１及び第２の基板１１，１２の面方向のサイズ（面積）が大きい場合でも、第１の基板１１と第２の基板１２との間を精度良く封止することができる。また、接着性を有した感光性樹脂１４として、感光性樹脂フィルムを用いることにより、感光性樹脂１４を短時間で容易に形成することができる。   Furthermore, even when the size (area) of the first and second substrates 11 and 12 in the surface direction is large, the gap between the first substrate 11 and the second substrate 12 can be accurately sealed. Moreover, the photosensitive resin 14 can be easily formed in a short time by using a photosensitive resin film as the photosensitive resin 14 having adhesiveness.

なお、本実施の形態では、感光性樹脂１４の具体例として、感光性樹脂フィルムを用いた場合を例に挙げて説明したが、感光性樹脂フィルムの代わりに、接着性を有した液状の感光性樹脂を塗布してもよい。液状の感光性樹脂は、例えば、スピンコート法により形成することができる。   In the present embodiment, as a specific example of the photosensitive resin 14, a case where a photosensitive resin film is used has been described as an example. However, instead of the photosensitive resin film, a liquid photosensitive resin having adhesiveness is used. An adhesive resin may be applied. The liquid photosensitive resin can be formed by, for example, a spin coating method.

さらに、本実施の形態では、接着性を有した感光性樹脂フィルムにより電子部品１３を封止すると共に第１の基板１１と第２の基板１２とを接着しているが、接着性を有した感光性樹脂フィルムの代わりに、非導電性樹脂または異方性導電樹脂を用いることができる。非導電性樹脂としては、例えば、非導電性フィルム（ＮＣＦ（Non Conductive Film））や非導電性ペースト（ＮＣＰ（Non Conductive Paste））等を用いることができる。異方性導電樹脂としては、例えば、異方性導電フィルム（ＡＣＦ（Anisotropic Conductive Film））や異方性導電ペースト（ＡＣＰ（Anisotropic Conductive Paste））等を用いることができる。   Further, in the present embodiment, the electronic component 13 is sealed with the photosensitive resin film having adhesiveness, and the first substrate 11 and the second substrate 12 are adhered, but the adhesiveness is maintained. A non-conductive resin or an anisotropic conductive resin can be used instead of the photosensitive resin film. As the nonconductive resin, for example, a nonconductive film (NCF (Non Conductive Film)), a nonconductive paste (NCP (Non Conductive Paste)), or the like can be used. As the anisotropic conductive resin, for example, an anisotropic conductive film (ACF (Anisotropic Conductive Film)), an anisotropic conductive paste (ACP (Anisotropic Conductive Paste)), or the like can be used.

非導電性樹脂または異方性導電樹脂を用いる場合は、図６及び図１０に示す工程、すなわち、開口部５５及び貫通孔５６を形成する工程を省略することができる。より詳しく述べると、第１の基板１１の上面を覆うように形成された第１の樹脂の上から、導電部材１５を有する電子部品１３を圧接し、導電部材１５を第１の樹脂に貫通させて接続部３４Ａと接続した後、第１の樹脂をキュアして硬化させる。同様に、図８に示す構造体の上面を覆うように形成された第２の樹脂の上から、導電部材１６を有する第２の基板１２を圧接し、導電部材１６を第２の樹脂に貫通させて接続部３３Ａと接続した後、第２の樹脂をキュアして硬化させる。   When a non-conductive resin or an anisotropic conductive resin is used, the process shown in FIGS. 6 and 10, that is, the process of forming the opening 55 and the through hole 56 can be omitted. More specifically, the electronic component 13 having the conductive member 15 is pressed from above the first resin formed so as to cover the upper surface of the first substrate 11, and the conductive member 15 is penetrated through the first resin. Then, after connecting to the connecting portion 34A, the first resin is cured and cured. Similarly, the second substrate 12 having the conductive member 16 is pressed from above the second resin formed so as to cover the upper surface of the structure shown in FIG. 8, and the conductive member 16 penetrates the second resin. Then, after connecting to the connecting portion 33A, the second resin is cured and cured.

さらに、本実施の形態では、接着性を有した第１及び第２の感光性樹脂６１，６２の代わりに、アンダーフィル樹脂を用いることができる。アンダーフィル樹脂としては、例えば、液状のエポキシ樹脂からなるものを用いることができる。   Furthermore, in this embodiment, an underfill resin can be used instead of the first and second photosensitive resins 61 and 62 having adhesiveness. As the underfill resin, for example, a resin made of a liquid epoxy resin can be used.

アンダーフィル樹脂を用いる場合は、導電部材１５を有する電子部品１３と導電部材１６を有する第２の基板１２とが第１の基板１１の上面に設置された状態で、第１の基板１１と第２の基板１２の間隙に、毛細管現象によりアンダーフィル樹脂を注入し、アンダーフィル樹脂をキュアして硬化させる。   When the underfill resin is used, the electronic component 13 having the conductive member 15 and the second substrate 12 having the conductive member 16 are installed on the upper surface of the first substrate 11 and the first substrate 11 Underfill resin is injected into the gap between the two substrates 12 by capillary action, and the underfill resin is cured and cured.

このように、接着性を有した第１及び第２の感光性樹脂６１，６２の代わりに、非導電性樹脂、異方性導電樹脂またはアンダーフィル樹脂を用いることにより、既存の製造工程及び製造設備を使用することができる。   Thus, by using non-conductive resin, anisotropic conductive resin, or underfill resin instead of the first and second photosensitive resins 61 and 62 having adhesiveness, the existing manufacturing process and manufacturing can be performed. Equipment can be used.

また、本実施の形態では、第１及び第２の基板１１，１２として、コアレス基板を用いた場合を例に挙げて説明したが、第１及び第２の基板１１，１２としてコア基板を有した配線基板を用いてもよく、本実施の形態と同様な効果を得ることができる。   In this embodiment, the case where coreless substrates are used as the first and second substrates 11 and 12 has been described as an example. However, the first and second substrates 11 and 12 have core substrates. The same wiring board may be used, and the same effect as this embodiment can be obtained.

（第２の実施の形態）
図１３は、本発明の第２の実施の形態に係る電子部品内蔵基板の断面図である。図１３において、第１の実施の形態の電子部品内蔵基板１０と同一構成部分には同一符号を付す。なお、図１３において、説明の便宜上、電子部品内蔵基板１０の構成要素の符号には−１を付し、電子部品内蔵基板１０上に設けられた構造体の構成要素の符号には−２を付す。 (Second Embodiment)
FIG. 13 is a cross-sectional view of an electronic component built-in substrate according to the second embodiment of the present invention. In FIG. 13, the same components as those of the electronic component built-in substrate 10 of the first embodiment are denoted by the same reference numerals. In FIG. 13, for convenience of explanation, −1 is attached to the reference numeral of the component of the electronic component built-in substrate 10, and −2 is added to the reference numeral of the component of the structure provided on the electronic component built-in substrate 10. Attached.

図１３に示すように、電子部品内蔵基板７０は、第１の実施の形態で説明した電子部品内蔵基板１０上に、さらに第２の基板１２−２と、電子部品１３−２と、接着性を有した感光性樹脂１４−２と、導電部材１５−２，１６−２とを設けた構成とされている。   As shown in FIG. 13, the electronic component built-in substrate 70 is formed on the electronic component built-in substrate 10 described in the first embodiment, and further has a second substrate 12-2, an electronic component 13-2, and an adhesive property. It is set as the structure which provided the photosensitive resin 14-2 which has these, and the electroconductive member 15-2, 16-2.

第２の基板１２−２は、第２の基板１２−１の上方に配置されており、第２の多層配線構造体４１−２を有する。第２の多層配線構造体４１−２は、柱状とされた導電部材１６−２を介して、第２の基板１２−１の第２の多層配線構造体４１−１と電気的に接続されている。   The second substrate 12-2 is disposed above the second substrate 12-1, and includes a second multilayer wiring structure 41-2. The second multilayer wiring structure 41-2 is electrically connected to the second multilayer wiring structure 41-1 of the second substrate 12-1 via the columnar conductive member 16-2. Yes.

電子部品１３−２は、第２の基板１２−１と第２の基板１２−２との間に配置されている。電子部品１３−２は、電極パッド１３Ａ−２を有する。電極パッド１３Ａ−２は、導電部材１５−２を介して、配線５３−１と電気的に接続されている。これにより、電子部品１３は、第２の多層配線構造体４１−１と電気的に接続されている。   The electronic component 13-2 is disposed between the second substrate 12-1 and the second substrate 12-2. The electronic component 13-2 includes an electrode pad 13A-2. The electrode pad 13A-2 is electrically connected to the wiring 53-1 via the conductive member 15-2. Thereby, the electronic component 13 is electrically connected to the second multilayer wiring structure 41-1.

感光性樹脂１４−２は、第２の基板１−１２と第２の基板１２−２との間に設けられている。感光性樹脂１４−２は、電子部品１３−２を封止すると共に、第２の基板１−１２と第２の基板１２−２との間を接着している。感光性樹脂１４−２は、開口部５５−２と、貫通孔５６−２とを有する。開口部５５−２及び貫通孔５６−２は、配線５３−１上に設けられた感光性樹脂１４−２に形成されている。開口部５５−２は、配線５３−１を露出しており、貫通孔５６−２は、配線５３−１と接続部４７Ａ−２とを露出する。   The photosensitive resin 14-2 is provided between the second substrate 1-12 and the second substrate 12-2. The photosensitive resin 14-2 seals the electronic component 13-2 and bonds the second substrate 1-12 and the second substrate 12-2. The photosensitive resin 14-2 has an opening 55-2 and a through hole 56-2. The opening 55-2 and the through hole 56-2 are formed in the photosensitive resin 14-2 provided on the wiring 53-1. The opening 55-2 exposes the wiring 53-1, and the through-hole 56-2 exposes the wiring 53-1 and the connecting portion 47A-2.

導電部材１５−２は、開口部５５−２に設けられており、電極パッド１３Ａ−２と配線５３−１とを電気的に接続している。導電部材１６−２は、貫通孔５６−２に設けられており、配線５３−１と接続部４７Ａ−２とを電気的に接続している。   The conductive member 15-2 is provided in the opening 55-2, and electrically connects the electrode pad 13A-2 and the wiring 53-1. The conductive member 16-2 is provided in the through hole 56-2, and electrically connects the wiring 53-1 and the connection portion 47A-2.

このように、３つの基板１１，１２−１，１２−２を積層させて、上下方向に隣り合う基板との間（本実施の形態の場合、第１の基板１１と第２の基板１２−１との間と、第２の基板１２−１と第２の基板１２−２との間）に電子部品１３−１，１３−２を配置し、上下方向に隣り合う基板間を接着性を有した感光性樹脂１４−１，１４−２で接着した電子部品内蔵基板７０においても、第１の実施の形態の電子部品内蔵基板１０と同様な効果を得ることができる。   In this way, the three substrates 11, 12-1, 12-2 are stacked and between the substrates adjacent in the vertical direction (in the case of the present embodiment, the first substrate 11 and the second substrate 12- 1 and between the second substrate 12-1 and the second substrate 12-2), the electronic components 13-1 and 13-2 are disposed, and adhesion between the substrates adjacent in the vertical direction is improved. Also in the electronic component built-in substrate 70 bonded with the photosensitive resins 14-1 and 14-2, the same effects as the electronic component built-in substrate 10 of the first embodiment can be obtained.

なお、本実施の形態では、３つの基板１１，１２−１，１２−２を積層させた場合を例に挙げたが、３つ以上の基板を積層させて、上下方向に隣り合う基板との間に電子部品１３を配置し、上下方向に隣り合う基板間を接着性を有した感光性樹脂１４で接着した電子部品内蔵基板においても、第１の実施の形態の電子部品内蔵基板１０と同様な効果を得ることができる。   In this embodiment, the case where the three substrates 11, 12-1, and 12-2 are stacked has been described as an example. However, three or more substrates are stacked and the substrate adjacent to the vertical direction is stacked. Also in the electronic component built-in substrate in which the electronic component 13 is arranged between them and the substrates adjacent in the vertical direction are bonded with the photosensitive resin 14 having adhesiveness, the same as the electronic component built-in substrate 10 in the first embodiment. Effects can be obtained.

さらに、本実施の形態では、接着性を有した感光性樹脂１４−１，１４−２を用いた場合を例に挙げて説明したが、接着性を有した感光性樹脂１４−１，１４−２の代わりに、第１の実施の形態と同様に、非導電性樹脂、異方性導電樹脂、アンダーフィル樹脂のいずれかの樹脂を用いてもよい。   Furthermore, in the present embodiment, the case where the photosensitive resins 14-1 and 14-2 having adhesiveness are used has been described as an example. However, the photosensitive resins 14-1 and 14- having adhesiveness are described. Instead of 2, any one of a non-conductive resin, an anisotropic conductive resin, and an underfill resin may be used as in the first embodiment.

また、電子部品内蔵基板７０は、先に説明した第１の実施の形態の電子部品内蔵基板１０の製造方法と同様な手法により製造することができる
以上、本発明の好ましい実施の形態について詳述したが、本発明はかかる特定の実施の形態に限定されるものではなく、特許請求の範囲内に記載された本発明の要旨の範囲内において、種々の変形・変更が可能である。 Further, the electronic component built-in substrate 70 can be manufactured by the same method as the method for manufacturing the electronic component built-in substrate 10 of the first embodiment described above. The preferred embodiments of the present invention are described in detail above. However, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims.

本発明は、歩留まりを向上させることのできる電子部品内蔵基板及びその製造方法に適用できる。   The present invention can be applied to an electronic component built-in substrate that can improve yield and a method of manufacturing the same.

従来の電子部品内蔵基板の断面図である。It is sectional drawing of the conventional electronic component built-in board | substrate. 本発明の第１の実施の形態に係る電子部品内蔵基板の断面図である。It is sectional drawing of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その１）である。It is FIG. (1) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その２）である。It is FIG. (2) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その３）である。It is FIG. (3) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その４）である。It is FIG. (4) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その５）である。It is FIG. (5) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その６）である。It is FIG. (6) which shows the manufacturing process of the electronic component built-in substrate based on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その７）である。It is FIG. (7) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その８）である。It is FIG. (8) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その９）である。It is FIG. (9) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第１の実施の形態に係る電子部品内蔵基板の製造工程を示す図（その１０）である。It is FIG. (10) which shows the manufacturing process of the electronic component built-in board | substrate which concerns on the 1st Embodiment of this invention. 本発明の第２の実施の形態に係る電子部品内蔵基板の断面図である。It is sectional drawing of the electronic component built-in board | substrate which concerns on the 2nd Embodiment of this invention.

符号の説明Explanation of symbols

１０，７０ 電子部品内蔵基板
１１ 第１の基板
１２，１２−１，１２−２ 第２の基板
１３，１３−１，１３−２ 電子部品
１３Ａ，１３Ａ−２ 電極パッド
１４，１４−１，１４−２ 感光性樹脂
１５，１５−２，１６，１６−２ 導電部材
１８ 第１の多層配線構造体
２４，２５，４２，４３ 保護膜
２６ 外部接続端子
２７，３１，４５，５１ 絶縁層
２８，２９，３３，３４，４６，４７，４７−２，５３，５３−１ 配線
２９Ａ，３３Ａ，３４Ａ，４７Ａ，４７Ａ−２ 接続部
３０，３２，４９，５２ ビア
４１，４１−１，４１−２ 第２の多層配線構造体
５５，５５−２ 開口部
５６，５６−２ 貫通孔
６１ 第１の感光性樹脂
６２ 第２の感光性樹脂
Ａ 電子部品配設領域 10, 70 Electronic component built-in substrate 11 First substrate 12, 12-1, 12-2 Second substrate 13, 13-1, 13-2 Electronic component 13A, 13A-2 Electrode pads 14, 14-1, 14 -2 photosensitive resin 15, 15-2, 16, 16-2 Conductive member 18 First multilayer wiring structure 24, 25, 42, 43 Protective film 26 External connection terminal 27, 31, 45, 51 Insulating layer 28, 29,33,34,46,47,47-2,53,53-1 wiring 29A, 33A, 34A, 47A, 47A-2 connection part 30, 32, 49, 52 via 41, 41-1, 41-2 Second multilayer wiring structure 55, 55-2 Opening 56, 56-2 Through hole 61 First photosensitive resin 62 Second photosensitive resin A Electronic component placement region

Claims (3)

電子部品が内蔵された電子部品内蔵基板の製造方法において、
第１の多層配線構造体を有する第１の基板を形成する第１の基板形成工程と、
第２の多層配線構造体を有する第２の基板を形成する第２の基板形成工程と、
接着性を有した第１の感光性樹脂により、前記電子部品を前記第１の基板に接着させて、前記電子部品と前記第１の多層配線構造体とを電気的に接続する電子部品接続工程と、
前記電子部品が配設された第１の基板の面と前記電子部品とを覆うように接着性を有した第２の感光性樹脂を形成する第２の感光性樹脂形成工程と、
前記第２の基板を前記第２の感光性樹脂上に接着させて、前記第１の基板の上方に前記第２の基板を配設する第２の基板配設工程とを含むことを特徴とする電子部品内蔵基板の製造方法。 In the manufacturing method of the electronic component built-in substrate in which the electronic component is embedded,
A first substrate forming step of forming a first substrate having a first multilayer wiring structure;
A second substrate forming step of forming a second substrate having a second multilayer wiring structure;
An electronic component connecting step of electrically connecting the electronic component and the first multilayer wiring structure by bonding the electronic component to the first substrate with a first photosensitive resin having adhesiveness When,
A second photosensitive resin forming step of forming a second photosensitive resin having adhesion so as to cover the surface of the first substrate on which the electronic component is disposed and the electronic component;
A second substrate disposing step of adhering the second substrate onto the second photosensitive resin and disposing the second substrate above the first substrate. A method of manufacturing an electronic component built-in substrate. 前記第２の基板配設工程は、前記第１の基板と第２の基板との間に、前記第１の多層配線構造体と前記第２の多層配線構造体とを電気的に接続する柱状の導電部材を形成する導電部材形成工程を有することを特徴とする請求項１記載の電子部品内蔵基板の製造方法。 The second substrate disposing step includes a columnar shape for electrically connecting the first multilayer wiring structure and the second multilayer wiring structure between the first substrate and the second substrate. electronic component-embedded board fabrication method as claimed in claim 1, wherein further comprising a conductive member forming step of forming a conductive member. 前記第１及び第２の感光性樹脂は、感光性樹脂フィルムであることを特徴とする請求項１または２記載の電子部品内蔵基板の製造方法。 Said first and second photosensitive resin according to claim 1 or 2 method of manufacturing an electronic component-embedded substrate wherein a is a photosensitive resin film.
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