JP4844180B2 - Power converter and control method thereof - Google Patents

Power converter and control method thereof Download PDF

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JP4844180B2
JP4844180B2 JP2006061981A JP2006061981A JP4844180B2 JP 4844180 B2 JP4844180 B2 JP 4844180B2 JP 2006061981 A JP2006061981 A JP 2006061981A JP 2006061981 A JP2006061981 A JP 2006061981A JP 4844180 B2 JP4844180 B2 JP 4844180B2
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智道 伊藤
基生 二見
庄一郎 古関
洋満 酒井
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Description

本発明は直流部を共有し、交流出力端子がリアクトルを介して接続される二組の三相電圧型ＰＷＭ変換器により構成される電力変換器に関し、特に三相電圧型ＰＷＭ変換器間を循環する零相電流の抑制に関する。   The present invention relates to a power converter configured by two sets of three-phase voltage type PWM converters that share a DC unit and whose AC output terminals are connected via a reactor, and in particular, circulates between the three-phase voltage type PWM converters. It relates to the suppression of zero-phase current.

電力変換器の容量を増やす方法として、特許文献１の図１記載のように二組の三相電圧型ＰＷＭ変換器の交流出力端子を、リアクトルを介して並列接続する方法が知られている。   As a method of increasing the capacity of a power converter, a method of connecting AC output terminals of two sets of three-phase voltage type PWM converters in parallel via a reactor as shown in FIG.

この構成では二組の三相電圧型ＰＷＭ変換器の間にトランスを介さないため、零相電流が両変換器を循環する。この零相電流には、スイッチングに伴い、原理的に流れうる零相電流のほか、スイッチングタイミングのばらつきなどによって、理論的には流れないはずの直流を含む低周波の零相電流が含まれる。零相電流は変換器の損失を増やすだけであるため、機器効率向上のためには、できるだけ零相電流を低減する必要がある。   In this configuration, since no transformer is interposed between the two sets of three-phase voltage type PWM converters, a zero-phase current circulates through both converters. This zero-phase current includes not only a zero-phase current that can flow in principle with switching, but also a low-frequency zero-phase current including a direct current that should not flow theoretically due to variations in switching timing. Since the zero-phase current only increases the loss of the converter, it is necessary to reduce the zero-phase current as much as possible in order to improve device efficiency.

この零相電流を低減する方法として、各相の電流検出値を加算し、その値に応じて出力電圧を制御し、零相電流を低減する方法が特許文献１にて提案されている。零相電流には直流成分も流れうるため、零相電流を検出する電流検出器はホールＣＴであることが望ましい。   As a method for reducing the zero-phase current, Patent Document 1 proposes a method for adding a current detection value of each phase and controlling the output voltage in accordance with the value to reduce the zero-phase current. Since a DC component can also flow in the zero-phase current, the current detector that detects the zero-phase current is preferably a Hall CT.

特許第３２５１６２８号公報（図１と、（００１１）段落の記載。）Japanese Patent No. 3251628 (FIG. 1 and description of paragraph (0011))

電力変換器が運転を開始すると半導体スイッチング素子やフィルタリアクトルにおいて損失が発生し、周囲温度が上昇する。周囲温度が上昇すると電流検出器の温度も上昇し、電流検出器の出力が温度ドリフトにより変化する。そのため、検出値には誤差が重畳する。   When the power converter starts operation, a loss occurs in the semiconductor switching element and the filter reactor, and the ambient temperature rises. When the ambient temperature rises, the temperature of the current detector also rises, and the output of the current detector changes due to temperature drift. Therefore, an error is superimposed on the detected value.

特許文献１に記載の方法により直流部が共通の二組の三相電圧型ＰＷＭ変換器を循環する零相電流を抑制する場合、該電流検出器の検出値に含まれる直流電流検出値と温度ドリフトによるオフセットとの見分けがつかないため、検出値に含まれる誤差分だけ零相を流すことになる。   When the zero-phase current circulating through two sets of three-phase voltage type PWM converters having a common DC section is suppressed by the method described in Patent Document 1, the DC current detection value and temperature included in the detection value of the current detector Since it cannot be distinguished from the offset due to drift, the zero phase is caused to flow by an error included in the detected value.

本発明の目的は、温度ドリフトによる電流検出誤差を低減し、二組の三相電圧型ＰＷＭ変換器を循環する零相電流を抑制することにある。   An object of the present invention is to reduce a current detection error due to temperature drift and to suppress a zero-phase current circulating through two sets of three-phase voltage type PWM converters.

本発明の電力変換器は、直流部を共有し、交流出力端子がリアクトルを介して接続される二組の三相電圧型ＰＷＭ変換器を備え、各三相電圧型ＰＷＭ変換器に電流検出器を備え、該電流検出器の出力の差を用いて三相電圧型ＰＷＭ変換器の零相出力電圧を変化させる。   The power converter of the present invention includes two sets of three-phase voltage type PWM converters that share a direct current section and whose AC output terminals are connected via a reactor, and each three-phase voltage type PWM converter has a current detector. The zero-phase output voltage of the three-phase voltage type PWM converter is changed using the difference in the output of the current detector.

本発明の電力変換器は精度よく零相電流を検出できる。また、該検出値を用いて零相電流を制御することで二組の三相電圧型ＰＷＭ変換器を循環する零相電流を精度よく抑制することができる。   The power converter of the present invention can detect the zero-phase current with high accuracy. Further, by controlling the zero-phase current using the detected value, the zero-phase current circulating through the two sets of three-phase voltage type PWM converters can be accurately suppressed.

本発明の詳細を図面を用いながら説明する。   Details of the present invention will be described with reference to the drawings.

本実施例を、図１を用いて説明する。図１に示す電力変換器は並列多重のコンバータである。図１の符号１は本実施例の電力変換器の主回路、１００は本実施例の電力変換器の論理部、８は交流電源、２０は負荷である。本実施例の電力変換器は、交流電源８より得られる交流電力を直流電力に変換し、負荷２０に供給する。   This embodiment will be described with reference to FIG. The power converter shown in FIG. 1 is a parallel multiplex converter. 1 is a main circuit of the power converter of this embodiment, 100 is a logic unit of the power converter of this embodiment, 8 is an AC power source, and 20 is a load. The power converter according to the present embodiment converts AC power obtained from the AC power supply 8 into DC power and supplies the DC power to the load 20.

電力変換器の主回路１は、直流部を共有する三相電圧型ＰＷＭ変換器２、３、トランス７、フィルタリアクトル４、５、直流コンデンサ６により構成される。直流コンデンサ６の端子電圧は電圧検出器１２で、三相電圧型ＰＷＭ変換器２の交流出力相電流は電流検出器１３、１４、１５で、三相電圧型ＰＷＭ変換器３の交流出力相電流は電流検出器１６、１７、１８で、三相電圧型ＰＷＭ変換器２、３を循環する零相電流は電流検出器１０、１１で、トランス７の二次側電圧は電圧検出器１９で検出され、検出値は論理部１００に入力される。   The main circuit 1 of the power converter includes three-phase voltage type PWM converters 2 and 3 that share a direct current section, a transformer 7, filter reactors 4 and 5, and a direct current capacitor 6. The terminal voltage of the DC capacitor 6 is the voltage detector 12, the AC output phase current of the three-phase voltage type PWM converter 2 is the current detector 13, 14, 15, and the AC output phase current of the three-phase voltage type PWM converter 3. Are the current detectors 16, 17 and 18, the zero-phase current circulating through the three-phase voltage type PWM converters 2 and 3 is detected by the current detectors 10 and 11, and the secondary side voltage of the transformer 7 is detected by the voltage detector 19. The detected value is input to the logic unit 100.

論理部１００は、三相電圧型ＰＷＭ変換器２、３の直流電圧が指令値Ｖdcref に追従するよう三相電圧型ＰＷＭ変換器２、３のＩＧＢＴのゲート信号Ｇate１、Ｇate２を算出する。具体的には、位相検出器１０１にてトランス７の二次側電圧の位相を算出し、電圧位相を電流制御器１０２、１０７に出力する。電流制御器１０２、１０７は、電圧位相を用いて各ＰＷＭ変換器の相電流をα−β変換およびｄ−ｑ変換し、ＰＷＭ変換器の有効電流が直流電圧制御器１０６にて直流コンデンサ電圧を指令値Ｖdcref に追従するよう算出された有効電流指令値に追従するよう、さらにＰＷＭ変換器の無効電流が０になるよう電圧ｄ軸成分およびｑ軸成分を算出し、その値を逆ｄ−ｑ変換、２相−３相変換を施して三相の電圧指令値を算出する。   The logic unit 100 calculates the gate signals Gate1 and Gate2 of the IGBTs of the three-phase voltage type PWM converters 2 and 3 so that the DC voltage of the three-phase voltage type PWM converters 2 and 3 follows the command value Vdcref. Specifically, the phase detector 101 calculates the phase of the secondary side voltage of the transformer 7 and outputs the voltage phase to the current controllers 102 and 107. The current controllers 102 and 107 perform α-β conversion and dq conversion on the phase current of each PWM converter using the voltage phase, and the effective current of the PWM converter converts the DC capacitor voltage in the DC voltage controller 106. The voltage d-axis component and the q-axis component are calculated so that the reactive current of the PWM converter becomes 0 so as to follow the active current command value calculated so as to follow the command value Vdcref, and these values are converted to the inverse dq. Conversion, two-phase to three-phase conversion are performed to calculate a three-phase voltage command value.

電流のα−β変換を（数１式）に示す。α−β変換をする時点で零相成分がキャンセルされるため、上記制御は零相と独立である。   The α-β conversion of current is shown in (Expression 1). Since the zero phase component is canceled at the time of α-β conversion, the above control is independent of the zero phase.

Figure 0004844180
Figure 0004844180

電流制御器１０７の出力値はＰＷＭ演算器１０９に入力され、ＰＷＭ演算器１０９はキャリアと電流制御器１０７の出力値の大小比較を行い、ゲート信号Ｇate２ を算出する。ゲート信号Ｇate２ は三相電圧型ＰＷＭ変換器３に入力され、ＩＧＢＴをオン、オフする。   The output value of the current controller 107 is input to the PWM calculator 109. The PWM calculator 109 compares the output values of the carrier and the current controller 107 and calculates the gate signal Gate2. The gate signal Gate2 is input to the three-phase voltage type PWM converter 3 to turn on / off the IGBT.

本発明のポイントである、零相電流制御部について説明する。三相電圧ＰＷＭ変換器２、３を循環する零相電流は電流検出器１０および電流検出器１１により検出される。電流検出器１０と電流検出器１１は同じ型式の電流検出器である。三相電圧ＰＷＭ変換器２、３を循環する零相電流に対して、電流検出器１０と電流検出器１１の電流方向は逆である。   The zero-phase current control unit, which is the point of the present invention, will be described. The zero-phase current circulating through the three-phase voltage PWM converters 2 and 3 is detected by the current detector 10 and the current detector 11. The current detector 10 and the current detector 11 are the same type of current detector. The current direction of the current detector 10 and the current detector 11 is opposite to the zero-phase current circulating through the three-phase voltage PWM converters 2 and 3.

変換器が運転すると、リアクトルなど周囲の電気部品の温度が上昇し、電流検出器１０、１１の温度も上がる。そのため、温度ドリフトの影響により電流検出値にオフセットが重畳する。電流検出器が同じ型式であれば、温度ドリフトによる影響は同様の傾向を示す。電流検出値における温度ドリフトによるオフセット相殺の原理を、図２を用いて説明する。   When the converter is operated, the temperature of surrounding electrical components such as the reactor rises, and the temperature of the current detectors 10 and 11 also rises. Therefore, an offset is superimposed on the current detection value due to the influence of temperature drift. If the current detector is the same type, the effect of temperature drift shows a similar trend. The principle of offset cancellation by temperature drift in the current detection value will be described with reference to FIG.

図２（ａ）、図２（ｂ）には電流検出器１０および電流検出器１１の電流検出値を示す。電流検出器１０および電流検出器１１の出力値には、温度ドリフトによるオフセットが重畳する。並列多重コンバータにおいて、三相電圧型ＰＷＭ変換器２、３の出力電流はほぼ等しく、フィルタリアクトル４、５での発熱もほぼ等しい。そのため、電流検出器の温度変化もほぼ等しく、電流検出器１０と１１の検出値に含まれる温度ドリフトによるオフセットも、ほぼ等しくなる。電流検出器１０と電流検出器１１の電流方向は、三相電圧型ＰＷＭ変換器２、３を循環する零相電流に対して逆であるため、真の電流検出値は符号が逆になる。   2A and 2B show current detection values of the current detector 10 and the current detector 11. Offsets due to temperature drift are superimposed on the output values of the current detector 10 and the current detector 11. In the parallel multiple converter, the output currents of the three-phase voltage type PWM converters 2 and 3 are substantially equal, and the heat generation in the filter reactors 4 and 5 is also substantially equal. Therefore, the temperature changes of the current detectors are also substantially equal, and the offset due to the temperature drift included in the detection values of the current detectors 10 and 11 is also substantially equal. Since the current directions of the current detector 10 and the current detector 11 are opposite to the zero-phase current circulating through the three-phase voltage type PWM converters 2 and 3, the sign of the true current detection value is reversed.

減算器１０３にて電流検出器１０と電流検出器１１の出力値を減算した結果を図２（ｃ）に示す。減算器出力値は電流検出器１０と１１の検出値における温度ドリフトが等しいため、ドリフトによるオフセットの大部分はキャンセルされ、真の電流検出値の倍の値になる。以上の理由により、精度よく零相電流を検出することができる。   The result of subtracting the output values of the current detector 10 and the current detector 11 by the subtractor 103 is shown in FIG. Since the subtractor output value has the same temperature drift in the detection values of the current detectors 10 and 11, most of the offset due to the drift is canceled and becomes a value twice the true current detection value. For the above reasons, the zero-phase current can be detected with high accuracy.

減算器１０３により算出された零相電流は零相電流制御器１０４に入力され、零相電流制御器１０４は減算器１０３の出力値を小さくする零相電圧調整分を算出し、加算器１０５に出力する。加算器１０５は零相電流制御器１０４と電流制御器１０２の出力値を加算し、新たな電圧指令値を算出し、その出力をＰＷＭ演算器１０８に入力し、ゲート信号Ｇate１を得る。ゲート信号Ｇate１は三相電圧型ＰＷＭ変換器２に入力され、ＩＧＢＴをオン、オフすることで三相電圧型ＰＷＭ変換器２から所望の交流電圧を出力することにより、零相電流を低減できる。   The zero-phase current calculated by the subtractor 103 is input to the zero-phase current controller 104, and the zero-phase current controller 104 calculates a zero-phase voltage adjustment for reducing the output value of the subtractor 103, and Output. The adder 105 adds the output values of the zero-phase current controller 104 and the current controller 102, calculates a new voltage command value, and inputs the output to the PWM calculator 108 to obtain the gate signal Gate1. The gate signal Gate1 is input to the three-phase voltage type PWM converter 2, and the zero-phase current can be reduced by outputting a desired alternating voltage from the three-phase voltage type PWM converter 2 by turning on and off the IGBT.

本実施例では電力変換器を並列多重コンバータとしたが、図４に記載のように、外部の有効電流指令値発生器２００より有効電流指令値を受け取り送電線間で電力を融通する電力変換器においても同様である。本実施例によれば、直流部を共有し、交流出力端子がリアクトルを介して接続される二組の三相電圧型ＰＷＭ変換器を有する電力変換器において、該ＰＷＭ変換器を循環する零相電流を精度よく検出することができ、その結果精度よく零相電流を制御することができる。   In this embodiment, the power converter is a parallel multiple converter. However, as shown in FIG. 4, the power converter receives an active current command value from an external active current command value generator 200 and accommodates power between transmission lines. The same applies to. According to the present embodiment, in a power converter having two sets of three-phase voltage type PWM converters that share a DC part and whose AC output terminals are connected via a reactor, zero phase that circulates through the PWM converter The current can be detected with high accuracy, and as a result, the zero-phase current can be controlled with high accuracy.

図３を用いて本実施例を説明する。本実施例と実施例１との差は、零相電流を相電流の和より算出する点のみである。本実施例によれば電流検出器の数を低減できるため、装置の簡素化が可能である。   This embodiment will be described with reference to FIG. The difference between the present embodiment and the first embodiment is only that the zero-phase current is calculated from the sum of the phase currents. According to the present embodiment, since the number of current detectors can be reduced, the apparatus can be simplified.

以下、実施例１と異なる点のみ説明する。また、図３において、図１と同一機能部は同一符号をつけ、重複する説明を防ぐ。本実施例において、電流検出器１３、１４、１５、１６、１７、１８は同じ型式の電流検出器である。三相電圧型ＰＷＭ変換器２の交流相電流は電流検出器１３、１４、１５により検出される。電流検出器の出力は電流制御器１０２および加算器１１２に入力される。加算器１１２は電流検出器１３、１４、１５の出力を加算し、零相成分を算出する。加算器１１２の出力は減算器１０３に入力される。同様に、三相電圧型ＰＷＭ変換器３の交流相電流は電流検出器１６、１７、１８により検出される。電流検出器の出力は電流制御器１０７および加算器１１３に入力される。   Only differences from the first embodiment will be described below. In FIG. 3, the same functional parts as those in FIG. In this embodiment, the current detectors 13, 14, 15, 16, 17, 18 are the same type of current detector. The AC phase current of the three-phase voltage type PWM converter 2 is detected by current detectors 13, 14, 15. The output of the current detector is input to the current controller 102 and the adder 112. The adder 112 adds the outputs of the current detectors 13, 14, and 15 to calculate a zero phase component. The output of the adder 112 is input to the subtracter 103. Similarly, the AC phase current of the three-phase voltage type PWM converter 3 is detected by the current detectors 16, 17 and 18. The output of the current detector is input to the current controller 107 and the adder 113.

加算器１１３は電流検出器１６、１７、１８の出力を加算し、零相成分を算出する。加算器１１３の出力は減算器１０３に入力される。ここで、三相電圧型ＰＷＭ変換器２、３を循環する零相電流に対し、電流検出器１３、１４、１５と電流検出器１６、１７、１８の電流方向が異なるため、零相成分の差をとることによりオフセットを相殺することができ、真の零相電流検出値の倍の値を得ることができる。ゆえに、精度よく零相電流を検出することができ、この値を用いて零相電流抑制制御を行うことにより、精度よく零相電流を抑制できる。   The adder 113 adds the outputs of the current detectors 16, 17, and 18 to calculate a zero phase component. The output of the adder 113 is input to the subtracter 103. Here, with respect to the zero-phase current circulating through the three-phase voltage type PWM converters 2 and 3, the current detectors 13, 14, and 15 and the current detectors 16, 17, and 18 have different current directions. By taking the difference, the offset can be canceled out, and a value double the true zero-phase current detection value can be obtained. Therefore, the zero-phase current can be detected with high accuracy, and the zero-phase current can be suppressed with high accuracy by performing the zero-phase current suppression control using this value.

本実施例によれば、直流部を共有し、交流出力端子がリアクトルを介して接続される二組の三相電圧型ＰＷＭ変換器を有する電力変換器において、該ＰＷＭ変換器を循環する零相電流を精度よく検出することができ、その結果精度よく零相電流を制御することができる。さらに、零相電流検出用電流検出器を削減できるため、装置の簡素化が可能である。   According to the present embodiment, in a power converter having two sets of three-phase voltage type PWM converters that share a DC part and whose AC output terminals are connected via a reactor, zero phase that circulates through the PWM converter The current can be detected with high accuracy, and as a result, the zero-phase current can be controlled with high accuracy. Furthermore, since the number of zero-phase current detection current detectors can be reduced, the apparatus can be simplified.

図５を用いて本実施例を説明する。本実施例と実施例１との差は、電流検出器のオフセットの低減方法が異なる点である。以降、実施例１と異なる点のみ説明する。また、図５において、図１と同一機能部は同一符号をつけ、重複する説明を防ぐ。   The present embodiment will be described with reference to FIG. The difference between the present embodiment and the first embodiment is that the method for reducing the offset of the current detector is different. Hereinafter, only differences from the first embodiment will be described. Further, in FIG. 5, the same functional parts as those in FIG.

電流検出器１０と電流検出器１１の出力は加算器１１０に入力され、加算される。真の電流検出値は符号が逆であるため、電流検出値を加算することによりキャンセルされ、オフセット値のみが残る。電流検出値の和は電流検出器１０と電流検出器１１のオフセット値の和となるため、乗算器１１４で１／２を乗算することにより電流検出器１０と１１のオフセット平均値を算出できる。減算器１１１において、電流検出器１０の出力から乗算器１１４の出力を減算することにより、大部分のオフセットがキャンセルされた零相電流を得る。ゆえに、零相電流を精度よく検出できる。   The outputs of the current detector 10 and the current detector 11 are input to the adder 110 and added. Since the true current detection value has the opposite sign, it is canceled by adding the current detection value, and only the offset value remains. Since the sum of the current detection values is the sum of the offset values of the current detector 10 and the current detector 11, the offset average value of the current detectors 10 and 11 can be calculated by multiplying the multiplier 114 by 1/2. The subtractor 111 subtracts the output of the multiplier 114 from the output of the current detector 10 to obtain a zero-phase current with most of the offset canceled. Therefore, the zero-phase current can be detected with high accuracy.

本実施例では、三相電圧型ＰＷＭ変換器の並列数を２としたが、並列数が２以外でも零相電流検出値の和を並列数で除算することでオフセットを算出できるため、本実施例と同様に零相電流を精度よく検出することができる。本実施例によれば、直流部を共有し、交流出力端子がリアクトルを介して接続される二組の三相電圧型ＰＷＭ変換器を有する電力変換器において、該ＰＷＭ変換器を循環する零相電流を精度よく検出することができ、その結果精度よく零相電流を制御することができる。   In this embodiment, the parallel number of the three-phase voltage type PWM converter is set to 2. However, even if the parallel number is other than 2, the offset can be calculated by dividing the sum of the zero-phase current detection values by the parallel number. As in the example, the zero-phase current can be detected with high accuracy. According to the present embodiment, in a power converter having two sets of three-phase voltage type PWM converters that share a DC part and whose AC output terminals are connected via a reactor, zero phase that circulates through the PWM converter The current can be detected with high accuracy, and as a result, the zero-phase current can be controlled with high accuracy.

実施例１の電力変換器の説明図。FIG. 3 is an explanatory diagram of a power converter according to the first embodiment. 実施例１の電流検出器オフセットを低減する原理の説明図。FIG. 3 is an explanatory diagram of the principle of reducing the current detector offset according to the first embodiment. 実施例２の電力変換器の説明図。Explanatory drawing of the power converter of Example 2. FIG. 実施例１の別の電力変換器の説明図。Explanatory drawing of another power converter of Example 1. FIG. 実施例３の電力変換器の説明図。Explanatory drawing of the power converter of Example 3. FIG.

符号の説明Explanation of symbols

１…主回路、２、３…三相電圧型ＰＷＭ変換器、４、５…フィルタリアクトル、６…直流コンデンサ、７、９…トランス、８…交流電源、１０、１１、１３、１４、１５、１６、１７、１８…電流検出器、１２、１９…電圧検出器、２０…負荷、１００…論理部、１０１…位相検出器、１０２、１０７…電流制御器、１０３、１１１…減算器、１０４…零相電流制御器、１０５、１１０、１１２、１１３…加算器、１０６…直流電圧制御器、１０８、１０９…ＰＷＭ演算器、１１４…乗算器、２００…有効電流指令値発生器。
DESCRIPTION OF SYMBOLS 1 ... Main circuit, 2, 3 ... Three-phase voltage type PWM converter, 4, 5 ... Filter reactor, 6 ... DC capacitor, 7, 9 ... Transformer, 8 ... AC power supply 10, 11, 13, 14, 15, 16, 17, 18 ... current detector, 12, 19 ... voltage detector, 20 ... load, 100 ... logic unit, 101 ... phase detector, 102, 107 ... current controller, 103, 111 ... subtractor, 104 ... Zero phase current controller, 105, 110, 112, 113 ... adder, 106 ... DC voltage controller, 108, 109 ... PWM calculator, 114 ... multiplier, 200 ... active current command value generator.

Claims (1)

直流部を共有し、交流出力端子がリアクトルを介して接続される二組の三相電圧型ＰＷＭ変換器によりなる電力変換器であって、
前記二組の三相電圧型ＰＷＭ変換器の零相電流をそれぞれ一括して検出する二組の電流検出器と、前記二組の三相電圧型ＰＷＭ変換器の交流出力相電流をそれぞれ検出する二組の三つの電流検出器と、前記交流出力相電流を検出する二組の電流検出器の出力を用いて、前記二組の三相電圧型ＰＷＭ変換器をそれぞれ個別に制御する二組の電流制御器と、前記零相電流を検出する二組の電流検出器の出力を減算する減算器と、前記減算器の出力値を小さくする零相電圧調整分を算出する零相電流制御器と、を有し、
前記零相電流制御器の出力と前記零相電流を検出する二組の電流検出器の片方の出力とを用いて、片方の三相電圧型ＰＷＭ変換器の零相出力電圧を変化させることを特徴とする電力変換器。 It is a power converter composed of two sets of three-phase voltage type PWM converters that share a DC part and whose AC output terminals are connected via a reactor,
Detecting the two sets of the current detector to detect the two sets of the zero-phase current of the three-phase voltage-PWM converter collectively respectively, the two sets of three-phase voltage type PWM converter AC output phase currents, respectively and two sets of three of the current detector, wherein using the output of the two sets of the current detector for detecting an AC output phase currents, the two sets of three-phase voltage-type PWM converter two sets of controlling individually a current controller, a subtractor for subtracting the output of the two sets of the current detector for detecting the zero-phase current, a zero-phase current controller for calculating a zero-phase voltage adjustment amount to reduce the output value of the subtracter Have
Using the output of the zero-phase current controller and the output of one of the two sets of current detectors that detect the zero-phase current , the zero-phase output voltage of one of the three-phase voltage type PWM converters is changed. A featured power converter.
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