JP4825538B2 - 半導体装置の製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims description 200
- 238000004519 manufacturing process Methods 0.000 title claims description 70
- 238000000034 method Methods 0.000 claims description 93
- 239000000853 adhesive Substances 0.000 claims description 48
- 230000001070 adhesive effect Effects 0.000 claims description 48
- 239000000758 substrate Substances 0.000 claims description 46
- 238000005530 etching Methods 0.000 claims description 30
- 238000000227 grinding Methods 0.000 claims description 14
- 235000012431 wafers Nutrition 0.000 description 118
- 238000003384 imaging method Methods 0.000 description 91
- 239000011521 glass Substances 0.000 description 84
- 239000010410 layer Substances 0.000 description 53
- 239000002390 adhesive tape Substances 0.000 description 16
- 229920005989 resin Polymers 0.000 description 12
- 239000011347 resin Substances 0.000 description 12
- 239000000463 material Substances 0.000 description 10
- 238000010586 diagram Methods 0.000 description 8
- 230000004048 modification Effects 0.000 description 8
- 238000012986 modification Methods 0.000 description 8
- 238000007789 sealing Methods 0.000 description 8
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 6
- 229910018503 SF6 Inorganic materials 0.000 description 6
- SFZCNBIFKDRMGX-UHFFFAOYSA-N sulfur hexafluoride Chemical compound FS(F)(F)(F)(F)F SFZCNBIFKDRMGX-UHFFFAOYSA-N 0.000 description 6
- 229960000909 sulfur hexafluoride Drugs 0.000 description 6
- 239000000428 dust Substances 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 238000001312 dry etching Methods 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 230000011218 segmentation Effects 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 4
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000000926 separation method Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 238000001311 chemical methods and process Methods 0.000 description 2
- 238000010924 continuous production Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 239000011737 fluorine Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 229920001187 thermosetting polymer Polymers 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 238000011900 installation process Methods 0.000 description 1
- 239000011344 liquid material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H01L2924/151—Die mounting substrate
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Description
本発明の第1の実施の形態につき、図5乃至図8を参照して説明する。
次いで、前記ガラス板300の表面(上面)に、第2のレジスト層41を選択的に形成する(図7−(E))。
また、半導体ウエハ240とガラス板300とを貼り付けるために使用される透明接着剤29は、塗布の量(厚さ)の調整、及び塗布の品質(ボイド等)の管理を、個片化されたチップ単位ではなく半導体ウエハ単位で行なうことができ、処理効率を向上させることができる。
次に、本発明の第2の実施の形態につき、図9乃至図12を参照して説明する。
次いで、前記ガラス板300の表面(上面)に、第2のレジスト層71を選択的に形成する(図11−(E))。
しかる後、配線基板21の裏面に半田ボールからなる外部接続用端子22を配設して、固体撮像装置600を形成する(図11−(L))。
(付記1) 一方の主面に複数個の半導体素子が形成された半導体基板の当該一方の主面上に、透明部材を配設する工程と、
前記透明部材を、前記半導体素子の所定の領域に対応させて分割する第1の分割工程と、
前記透明部材を、前記半導体素子の外形に対応させて分割する第2の分割工程と、
前記透明部材の分割位置に対応させて、前記半導体基板を半導体素子に分割する分割工程と、を有することを特徴とする半導体装置の製造方法。
(付記2) 前記透明基板は、前記半導体基板の有効領域と同等以上の面積を有することを特徴とする付記1記載の半導体装置の製造方法。
(付記3) 前記透明基板、或いは前記半導体基板は、それぞれ選択エッチング法により分割されることを特徴とする付記1記載の半導体装置の製造方法。
(付記4) 前記透明部材に対する第1の分割工程と第2の分割工程が、同時になされることを特徴とする付記1記載の半導体装置の製造方法。
(付記5) 前記透明部材に対する第2の分割工程と半導体基板に対する分割工程が、連続してなされることを特徴とする付記1記載の半導体装置の製造方法。
(付記6) 前記第半導体素子の所定の領域が、受光領域であることを特徴とする付記11記載の半導体装置の製造方法。
(付記7) 前記透明部材を配設する工程後に前記透明部材を基台として前記半導体基板の裏面を研削する裏面研削工程を更に含むことを特徴とする付記1記載の半導体装置の製造方法。
(付記8) 前記選択エッチング法は、ウエット式エッチングであることを特徴とする付記3記載の半導体装置の製造方法。
(付記9) 前記透明部材のエッチング及び前記半導体基板のエッチングには、同一の薬液が用いられ、エッチング時間を調整することによりエッチング量を調整して前記透明部材及び前記半導体基板を個片化することを特徴とする付記8記載の半導体装置の製造方法。
(付記10) 前記選択エッチング法は、ドライ式エッチングであることを特徴とする付記3記載の半導体装置の製造方法。
(付記11) 半導体素子の上方に透明部材が配設された半導体装置の製造方法であって、
半導体ウエハの有効領域の面積と同一又はそれ以上の大きさを有する透明部材を、少なくとも前記半導体ウエハの前記有効領域の上方に配設する透明部材配設工程と、
当該透明部材配設工程後、前記透明部材の一部と前記半導体ウエハの一部に化学的処理を施して前記透明部材と前記半導体ウエハを個片化する個片化工程と、を含むことを特徴とする半導体装置の製造方法。
(付記12) 前記半導体ウエハ上に設けられた第1のレジストパターン内であって、前記個片化工程において前記化学的処理が施される前記半導体ウエハの前記一部を除いた部分に接着部材を設ける接着部材配設工程を更に含み、
当該接着部材配設工程後、前記透明部材配設工程において、前記接着部材及び前記第1のレジストパターンを介して前記透明部材を配設することを特徴とする付記11記載の半導体装置の製造方法。
(付記13) 前記半導体ウエハに形成された受光面の周囲に接着部材を貼り付ける接着部材貼付工程を更に含み、
当該接着部材貼付工程後、前記透明部材配設工程において、前記接着部材及び前記半導体ウエハ上に設けられた第1のレジストを介して前記透明部材を配設することを特徴とする付記11記載の半導体装置の製造方法。
(付記14) 前記接着部材は、前記半導体ウエハと略同一の大きさを有する接着テープから前記半導体ウエハに形成された前記受光面に相当する箇所を切り抜いた形状を有する接着テープであることを特徴とする付記13記載の半導体装置の製造方法。
(付記15) 前記透明部材配設工程において、前記透明部材を反った状態で押圧しながら前記半導体ウエハの前記有効領域の上方に配設することを特徴とする付記11記載の半導体装置の製造方法。
24 固体撮像素子
25 受光面
30 透明部材
40、70 第1のレジスト層
41、71 第2のレジスト
55 空間形成部
60 接着テープ
240 半導体ウエハ
500、600 固体撮像装置
Claims (8)
- 一方の主面に複数個の半導体素子が形成された半導体基板の当該一方の主面上に、透明部材を配設する工程と、
前記透明部材を、前記半導体素子の所定の領域に対応させて分割する第1の分割工程と、
前記透明部材を、前記半導体素子の外形に対応させて分割する第2の分割工程と、
前記第2の分割工程による前記透明部材の分割位置に対応させて、前記半導体基板を半導体素子に分割する分割工程と、を有し、
前記透明部材に対する第2の分割工程と前記半導体基板に対する分割工程とが、エッチング法により連続してなされる、
ことを特徴とする半導体装置の製造方法。 - 前記透明部材は、前記半導体基板の有効領域と同等以上の面積を有することを特徴とする請求項1記載の半導体装置の製造方法。
- 前記透明部材に対する第1の分割工程と第2の分割工程が、同時になされることを特徴とする請求項1又は2記載の半導体装置の製造方法。
- 前記半導体素子の前記所定の領域が、受光領域であることを特徴とする請求項1乃至3の何れか一項記載の半導体装置の製造方法。
- 前記透明部材を配設する工程後に前記透明部材を基台として前記半導体基板の裏面を研削する裏面研削工程を更に含むことを特徴とする請求項1乃至4の何れか一項記載の半導体装置の製造方法。
- 前記エッチング法は、ドライ式エッチングであることを特徴とする請求項1乃至5の何れか一項記載の半導体装置の製造方法。
- 前記透明部材を配設する工程に先立って、
前記半導体素子の前記所定の領域に対応する第1の開口と、前記半導体基板に対する分割工程による分割位置に対応する第2の開口とを有するレジスト層を、前記半導体基板上に形成する工程と、
前記第1の開口内に接着剤を塗布する工程と、
を更に有する請求項1乃至6の何れか一項記載の半導体装置の製造方法。 - 前記透明部材を配設する工程に先立って、
前記半導体素子の前記所定の領域を囲む接着部材を、前記半導体基板上に配設する工程と、
前記半導体素子の前記接着部材の外側に、前記半導体基板に対する分割工程による分割位置に対応する開口を有するレジスト層を、前記半導体基板上に塗布する工程と、
を更に有する請求項1乃至6の何れか一項記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
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JP2006041025A JP4825538B2 (ja) | 2006-02-17 | 2006-02-17 | 半導体装置の製造方法 |
US11/437,606 US7655505B2 (en) | 2006-02-17 | 2006-05-22 | Manufacturing method of semiconductor device |
TW095118094A TWI313057B (en) | 2006-02-17 | 2006-05-22 | Manufacturing method of semiconductor device |
KR1020060053469A KR100758887B1 (ko) | 2006-02-17 | 2006-06-14 | 반도체 장치의 제조 방법 |
CNB2006100915947A CN100511579C (zh) | 2006-02-17 | 2006-06-14 | 半导体器件的制造方法 |
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JP2006041025A JP4825538B2 (ja) | 2006-02-17 | 2006-02-17 | 半導体装置の製造方法 |
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JP4825538B2 true JP4825538B2 (ja) | 2011-11-30 |
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JP (1) | JP4825538B2 (ja) |
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CN (1) | CN100511579C (ja) |
TW (1) | TWI313057B (ja) |
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KR101811945B1 (ko) * | 2016-03-28 | 2017-12-22 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 및 이를 제조하는 방법 |
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US7993977B2 (en) * | 2007-07-02 | 2011-08-09 | Micron Technology, Inc. | Method of forming molded standoff structures on integrated circuit devices |
US7911018B2 (en) * | 2007-10-30 | 2011-03-22 | Panasonic Corporation | Optical device and method of manufacturing the same |
US20090121300A1 (en) * | 2007-11-14 | 2009-05-14 | Micron Technology, Inc. | Microelectronic imager packages and associated methods of packaging |
US20090256222A1 (en) * | 2008-04-14 | 2009-10-15 | Impac Technology Co., Ltd. | Packaging method of image sensing device |
JP2010161163A (ja) * | 2009-01-07 | 2010-07-22 | Disco Abrasive Syst Ltd | 撮像基板の加工方法 |
TWI398949B (zh) * | 2009-07-29 | 2013-06-11 | Kingpak Tech Inc | 模造成型之影像感測器封裝結構製造方法及封裝結構 |
JP5235829B2 (ja) * | 2009-09-28 | 2013-07-10 | 株式会社東芝 | 半導体装置の製造方法、半導体装置 |
TWI430415B (zh) * | 2009-12-01 | 2014-03-11 | Xintec Inc | 晶片封裝體及其製造方法 |
JP5520646B2 (ja) * | 2010-03-17 | 2014-06-11 | 富士フイルム株式会社 | マイクロレンズ非搭載の光電変換膜積層型固体撮像素子及び撮像装置 |
JP2013118230A (ja) * | 2011-12-01 | 2013-06-13 | Canon Inc | 固体撮像装置 |
CN108496179A (zh) * | 2017-04-12 | 2018-09-04 | 深圳市汇顶科技股份有限公司 | 光学指纹传感器和光学指纹传感器的封装方法 |
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JPH07263415A (ja) | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | 半導体装置の製造方法 |
TW511256B (en) | 2001-12-27 | 2002-11-21 | Yi-Liang Liu | Light emitting diode package and manufacturing method for the light emitting diode package |
TW544887B (en) | 2002-05-27 | 2003-08-01 | Yi-Liang Liu | COB package structure of image sensor and the manufacturing method thereof |
KR100571948B1 (ko) * | 2002-11-19 | 2006-04-18 | 산요덴키가부시키가이샤 | 반도체 집적 장치 및 그 제조 방법 |
JP4401066B2 (ja) | 2002-11-19 | 2010-01-20 | 三洋電機株式会社 | 半導体集積装置及びその製造方法 |
JP3955541B2 (ja) | 2003-03-26 | 2007-08-08 | 富士フイルム株式会社 | 固体撮像装置の製造方法 |
JP2005056998A (ja) * | 2003-08-01 | 2005-03-03 | Fuji Photo Film Co Ltd | 固体撮像装置およびその製造方法 |
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- 2006-06-14 KR KR1020060053469A patent/KR100758887B1/ko not_active IP Right Cessation
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KR101811945B1 (ko) * | 2016-03-28 | 2017-12-22 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지 및 이를 제조하는 방법 |
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CN100511579C (zh) | 2009-07-08 |
KR20070082836A (ko) | 2007-08-22 |
US7655505B2 (en) | 2010-02-02 |
CN101026084A (zh) | 2007-08-29 |
KR100758887B1 (ko) | 2007-09-19 |
TW200733367A (en) | 2007-09-01 |
TWI313057B (en) | 2009-08-01 |
JP2007220968A (ja) | 2007-08-30 |
US20070196954A1 (en) | 2007-08-23 |
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