JP4754985B2 - 磁気センサモジュール - Google Patents
磁気センサモジュール Download PDFInfo
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- JP4754985B2 JP4754985B2 JP2006041340A JP2006041340A JP4754985B2 JP 4754985 B2 JP4754985 B2 JP 4754985B2 JP 2006041340 A JP2006041340 A JP 2006041340A JP 2006041340 A JP2006041340 A JP 2006041340A JP 4754985 B2 JP4754985 B2 JP 4754985B2
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- magnetoresistive element
- semiconductor magnetoresistive
- semiconductor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- Measuring Magnetic Variables (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Hall/Mr Elements (AREA)
- Transmission And Conversion Of Sensor Element Output (AREA)
Description
前記半導体磁気抵抗素子と、前記外部ケースとの位置決めを行なうようにしてアジマスずれを無くすようにしたことを特徴とする。
図1は、本発明の半導体磁気抵抗素子の実施形態(実施例1)を示す上面図で、図2は、図1に示した半導体磁気抵抗素子の底面図、図3は、リードフレーム上に半導体磁気抵抗素子チップを実装し、ワイヤーボンディングを施した状態を示す斜視図、図4は、本発明の半導体磁気抵抗素子の上部斜め方向から見た斜視図、図5は、図4に示した本発明の半導体磁気抵抗素子を下部斜め方向から見た斜視図である。
図15に示すように樹脂モールドした半導体磁気抵抗素子8をプリント基板13上に半田付けし、さらにこのプリント基板13と端子ピン10を差込みハンダ付けにより形成した。SmCo系磁石を挿入した磁石ケースをプリント基板13の裏面側に取り付けて半導体磁気抵抗素子を完成させた。完成した半導体磁気抵抗素子に厚さ0.1mmのステンレス製CANを被せ、CANの裏面側をエポキシ樹脂で封止して半導体磁気抵抗素子を完成させた。
上述した実施例1の方法で作製した半導体磁気抵抗素子と比較例1の方法で作製した半導体磁気抵抗素子の各々30個の歯車回転検出測定を実施した結果から、A相とZ相との位相ずれを測定した結果を図8及び表1に示す。この表1には、本発明と従来技術により作製した半導体磁気抵抗素子各30個のA相−Z相間の位相差測定結果が示されている。
2 リードフレームの台座
3 リードフレームの足
4 金ワイヤー
8 半導体磁気抵抗素子
9 バイアス磁石
10 出力ピン
11 磁石ケース
12 接続配線
13 プリント基板
18 外部ケース
19 充填樹脂
21 磁気抵抗素子チップ
22 リードフレームの台座
23 リードフレームの足
24 金ワイヤー
25 封止樹脂
26 磁石挿入用穴
27 アジマス位置合わせ用溝
38 外部ケース
40 感磁面上金属部
41 突起
42 基材取付け用ネジ穴
43 磁気抵抗素子挿入穴
44 段差
Claims (3)
- 複数の半導体磁気抵抗素子チップが、リードフレーム上にダイボンドされているとともにワイヤボンドされており、前記半導体磁気抵抗素子チップ及び前記リードフレームが、該リードフレームの裏面に磁石挿入用穴を形成するように封止樹脂で一体成形され、該封止樹脂の外周部に複数の溝からなるアジマス位置合わせ部を設け、前記一体成形された形状は、外周部が円形部と直線部とを併せ持った形状である半導体磁気抵抗素子と、
前記アジマス位置合わせ部と嵌め合わされる突起からなる複数の嵌合部を有する円形の外部ケースとを備え、
前記半導体磁気抵抗素子と、前記外部ケースとの位置決めを行なうようにしてアジマスずれを無くすようにしたことを特徴とする磁気センサモジュール。 - 前記外部ケースに前記半導体磁気抵抗素子を挿入する挿入穴を設け、該挿入穴の周縁部に前記嵌合部を設けて、前記アジマス位置合わせ部に前記嵌合部を嵌め合わせることにより、前記半導体磁気抵抗素子チップと前記外部ケースとの位置決めを行なうことを特徴とする請求項1に記載の磁気センサモジュール。
- 前記外部ケースに挿入された前記半導体磁気抵抗素子の感磁面の前面で、かつ前記挿入穴の前面に非磁性金属部材を設けたことを特徴とする請求項1又は2に記載の磁気センサモジュール。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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JP2006041340A JP4754985B2 (ja) | 2006-02-17 | 2006-02-17 | 磁気センサモジュール |
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JP2006041340A JP4754985B2 (ja) | 2006-02-17 | 2006-02-17 | 磁気センサモジュール |
Publications (2)
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JP2007218799A JP2007218799A (ja) | 2007-08-30 |
JP4754985B2 true JP4754985B2 (ja) | 2011-08-24 |
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JP2006041340A Active JP4754985B2 (ja) | 2006-02-17 | 2006-02-17 | 磁気センサモジュール |
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Families Citing this family (41)
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US7816772B2 (en) * | 2007-03-29 | 2010-10-19 | Allegro Microsystems, Inc. | Methods and apparatus for multi-stage molding of integrated circuit package |
US9823090B2 (en) | 2014-10-31 | 2017-11-21 | Allegro Microsystems, Llc | Magnetic field sensor for sensing a movement of a target object |
US8486755B2 (en) * | 2008-12-05 | 2013-07-16 | Allegro Microsystems, Llc | Magnetic field sensors and methods for fabricating the magnetic field sensors |
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US9812588B2 (en) | 2012-03-20 | 2017-11-07 | Allegro Microsystems, Llc | Magnetic field sensor integrated circuit with integral ferromagnetic material |
US10234513B2 (en) | 2012-03-20 | 2019-03-19 | Allegro Microsystems, Llc | Magnetic field sensor integrated circuit with integral ferromagnetic material |
US9494660B2 (en) | 2012-03-20 | 2016-11-15 | Allegro Microsystems, Llc | Integrated circuit package having a split lead frame |
JP2013250244A (ja) * | 2012-06-04 | 2013-12-12 | Nidec Sankyo Corp | 磁気センサ装置 |
US9411025B2 (en) | 2013-04-26 | 2016-08-09 | Allegro Microsystems, Llc | Integrated circuit package having a split lead frame and a magnet |
US10495699B2 (en) | 2013-07-19 | 2019-12-03 | Allegro Microsystems, Llc | Methods and apparatus for magnetic sensor having an integrated coil or magnet to detect a non-ferromagnetic target |
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JPH10144824A (ja) * | 1996-11-08 | 1998-05-29 | Sony Corp | 半導体パッケージおよび半導体パッケージ収納用のトレイ |
JP2002365352A (ja) * | 2001-06-12 | 2002-12-18 | Aisin Seiki Co Ltd | 磁界検出装置 |
JP2005337866A (ja) * | 2004-05-26 | 2005-12-08 | Asahi Kasei Corp | 磁性体検出器及び半導体パッケージ |
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