JP4724708B2 - 無線icタグ - Google Patents
無線icタグ Download PDFInfo
- Publication number
- JP4724708B2 JP4724708B2 JP2007504593A JP2007504593A JP4724708B2 JP 4724708 B2 JP4724708 B2 JP 4724708B2 JP 2007504593 A JP2007504593 A JP 2007504593A JP 2007504593 A JP2007504593 A JP 2007504593A JP 4724708 B2 JP4724708 B2 JP 4724708B2
- Authority
- JP
- Japan
- Prior art keywords
- wireless
- hole
- tag
- semiconductor chip
- pulse width
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
- H01L21/823425—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures manufacturing common source or drain regions between a plurality of conductor-insulator-semiconductor structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Semiconductor Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
前記ROMへの認識番号の書き込みは、前記ROMを構成するトランジスタに接続される上下層の配線間を導通させる第1スルーホールの有無によって行われ、
前記パルス幅検出回路の前記抵抗の値は、それぞれが互いに異なる位置で抵抗体に接続されている、上下層の一方に設けられている一つの配線と他方に設けられている複数の配線とを接続させるスルーホールの形成候補位置の内の一つに、第2スルーホールが形成されていることによって調整され、
前記第1スルーホールと前記第2スルーホールは、前記半導体チップ上の同一の絶縁層に形成されているものである。
Claims (5)
- 固有の認識番号が書き込まれたROMを有するメモリ回路と、リーダから発信されたパルス幅の異なる複数のクロック信号を、抵抗および容量の値に基づいて検出するパルス幅検出回路とが形成された半導体チップを有し、
前記ROMへの認識番号の書き込みは、前記ROMを構成するトランジスタに接続される上下層の配線間を導通させる第1スルーホールの有無によって行われ、
前記パルス幅検出回路の前記抵抗の値は、それぞれが互いに異なる位置で抵抗体に接続されている、上下層の一方に設けられている一つの配線と他方に設けられている複数の配線とを接続させるスルーホールの形成候補位置の内の一つに、第2スルーホールが形成されていることによって調整され、
前記第1スルーホールと前記第2スルーホールは、前記半導体チップ上の同一の絶縁層に形成されていることを特徴とする無線ICタグ。 - 絶縁フィルムと、前記絶縁フィルムの一面に形成された導体膜からなるアンテナとをさらに有し、前記半導体チップは、前記アンテナに電気的に接続されていることを特徴とする請求項1記載の無線ICタグ。
- 前記半導体チップは、バンプ電極を介して前記アンテナに電気的に接続され、樹脂によって封止されていることを特徴とする請求項2記載の無線ICタグ。
- 前記リーダから発信される前記クロック信号の周波数は、2.45GHzであることを特徴とする請求項1記載の無線ICタグ。
- 前記抵抗体は、拡散抵抗からなることを特徴とする請求項1記載の無線ICタグ。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2005/003025 WO2006090459A1 (ja) | 2005-02-24 | 2005-02-24 | 無線icタグおよびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2006090459A1 JPWO2006090459A1 (ja) | 2008-07-17 |
JP4724708B2 true JP4724708B2 (ja) | 2011-07-13 |
Family
ID=36927110
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007504593A Expired - Fee Related JP4724708B2 (ja) | 2005-02-24 | 2005-02-24 | 無線icタグ |
Country Status (4)
Country | Link |
---|---|
US (1) | US7800200B2 (ja) |
JP (1) | JP4724708B2 (ja) |
TW (1) | TW200636596A (ja) |
WO (1) | WO2006090459A1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101313317B (zh) * | 2005-11-24 | 2012-10-03 | Nxp股份有限公司 | 数据载体、用于数据载体的电路、以及信号询问方法 |
US8018323B2 (en) * | 2006-01-30 | 2011-09-13 | Baohua Qi | RFID sensor device based on pulse-processing |
US8013714B2 (en) * | 2006-03-27 | 2011-09-06 | Baohua Qi | RFID sensor using pulse processing |
JP4986114B2 (ja) * | 2006-04-17 | 2012-07-25 | ルネサスエレクトロニクス株式会社 | 半導体集積回路及び半導体集積回路の設計方法 |
US8026795B2 (en) * | 2007-02-22 | 2011-09-27 | Baohua Qi | RFID sensor array and sensor group based on pulse-processing |
JP2009123035A (ja) * | 2007-11-16 | 2009-06-04 | Hitachi Ltd | 半導体装置 |
JP4535209B2 (ja) * | 2008-04-14 | 2010-09-01 | 株式会社村田製作所 | 無線icデバイス、電子機器及び無線icデバイスの共振周波数の調整方法 |
JP2013134553A (ja) * | 2011-12-26 | 2013-07-08 | Tetsuro Wada | 電子タグ |
US10002266B1 (en) | 2014-08-08 | 2018-06-19 | Impinj, Inc. | RFID tag clock frequency reduction during tuning |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5772364A (en) * | 1980-10-24 | 1982-05-06 | Matsushita Electric Ind Co Ltd | Integrated circuit |
JP2002184872A (ja) * | 2000-12-15 | 2002-06-28 | Hitachi Ltd | 認識番号を有する半導体装置、その製造方法及び電子装置 |
JP2003209194A (ja) * | 2001-12-19 | 2003-07-25 | Samsung Electronics Co Ltd | 半導体装置及びその製造方法 |
WO2005015763A1 (ja) * | 2003-08-11 | 2005-02-17 | Hitachi, Ltd. | 読み出し方法および応答器および質問器 |
-
2005
- 2005-02-24 WO PCT/JP2005/003025 patent/WO2006090459A1/ja not_active Application Discontinuation
- 2005-02-24 JP JP2007504593A patent/JP4724708B2/ja not_active Expired - Fee Related
- 2005-02-24 US US11/722,942 patent/US7800200B2/en not_active Expired - Fee Related
-
2006
- 2006-01-06 TW TW095100624A patent/TW200636596A/zh unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5772364A (en) * | 1980-10-24 | 1982-05-06 | Matsushita Electric Ind Co Ltd | Integrated circuit |
JP2002184872A (ja) * | 2000-12-15 | 2002-06-28 | Hitachi Ltd | 認識番号を有する半導体装置、その製造方法及び電子装置 |
JP2003209194A (ja) * | 2001-12-19 | 2003-07-25 | Samsung Electronics Co Ltd | 半導体装置及びその製造方法 |
WO2005015763A1 (ja) * | 2003-08-11 | 2005-02-17 | Hitachi, Ltd. | 読み出し方法および応答器および質問器 |
Also Published As
Publication number | Publication date |
---|---|
WO2006090459A1 (ja) | 2006-08-31 |
JPWO2006090459A1 (ja) | 2008-07-17 |
US20070285254A1 (en) | 2007-12-13 |
TW200636596A (en) | 2006-10-16 |
US7800200B2 (en) | 2010-09-21 |
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