JP4667703B2 - Multilayer ceramic electronic components - Google Patents

Multilayer ceramic electronic components Download PDF

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Publication number
JP4667703B2
JP4667703B2 JP2002063309A JP2002063309A JP4667703B2 JP 4667703 B2 JP4667703 B2 JP 4667703B2 JP 2002063309 A JP2002063309 A JP 2002063309A JP 2002063309 A JP2002063309 A JP 2002063309A JP 4667703 B2 JP4667703 B2 JP 4667703B2
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Japan
Prior art keywords
internal electrode
multilayer ceramic
thickness
electrode
ceramic
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JP2003264118A (en
Inventor
秀樹 大森
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Murata Manufacturing Co Ltd
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Murata Manufacturing Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • H01G2/065Mountings specially adapted for mounting on a printed-circuit support for surface mounting, e.g. chip capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes

Description

【0001】
【発明の属する技術分野】
この発明は積層セラミック電子部品に関し、特に積層されるセラミック層、セラミック層間に形成される内部電極、およびセラミック層の端面に形成され内部電極の端部に接続される外部電極を有する、たとえば積層セラミックコンデンサ、積層セラミックインダクタ、積層セラミックバリスタおよび積層セラミックサーミスタなどの積層セラミック電子部品に関する。
【0002】
【従来の技術】
積層セラミックコンデンサは、セラミック素子内部に複数枚の内部電極を、セラミック層を介して積層・配設し、この内部電極を素子端部に形成した外部電極に接続している。ところで、比較的低容量の積層セラミックコンデンサは、内部電極の積層枚数が少なくてすむが、内部電極が少なくなれば等価直列抵抗が増加するという問題が生じる。そして、この問題を解決するために、従来から、内部電極の厚みを厚くすることが行われている。
【0003】
【発明が解決しようとする課題】
ところで、積層セラミックコンデンサは、セラミック素子と内部電極とが同時に焼成されるが、セラミックと内部電極とは焼成時の収縮量が異なるため、焼成後は内部電極がセラミック素子内に引っ込んだ状態となり、外部電極との接合が不十分になることがある。内部電極の厚みを厚くすると、焼成時の収縮がより大きくなり、外部電極との接合信頼性がさらに劣化するという問題が発生していた。
図3のような、内部電極の引き出し部だけ厚みを厚くして接合領域を大きくしたもの(特開平5−335175号)も案出されているが、これでも厚くした分は焼成収縮によって大きく引っ込んでしまうため、外部電極との接合不良の根本的な解決策ではなかった。
一旦引っ込んだ内部電極を露出させるためには、外部電極形成前にセラミック素子をバレル研磨等することが行われるが、工程が長時間化するばかりか、セラミック素子にワレやカケ、キズ等が発生し易く好ましくなかった。
上述のような問題は、積層セラミックインダクタ、積層セラミックバリスタおよび積層セラミックサーミスタなどの他の積層セラミック電子部品においても存在する。
【0004】
それゆえに、この発明の主たる目的は、内部電極と外部電極との接合性がよく、等価直列抵抗が小さい、積層セラミックコンデンサなどの積層セラミック電子部品を提供することである。
【0005】
【課題を解決するための手段】
この発明にかかる積層セラミック電子部品は、セラミック素子と、セラミック素子内部に配設され、引き出し部によってセラミック素子の表面に導出された内部電極と、セラミック素子外面に形成され、内部電極の引き出し部と接続された外部電極とを有し、内部電極はセラミック素子とともに焼成することによって形成される積層セラミック電子部品において、内部電極の厚みを4μm未満であって、かつ内部電極とセラミック素子の収縮の応力によるデラミネーションの発生を防止するための厚みするとともに、内部電極の引き出し部と外部電極との接合性を十分に確保するためにかつ内部電極と外部電極との接合界面における接触抵抗を減少するために、内部電極の引き出し部の厚みを内部電極の厚みより薄くしたことを特徴とする、積層セラミック電子部品である。
この発明にかかる積層セラミック電子部品では、内部電極と引き出し部との間に段差部が形成されたり、引き出し部がセラミック素子の表面側に向って徐々に薄くなるように形成されたりしてもよい。
【0006】
この発明にかかる積層セラミック電子部品では、内部電極の引き出し部の厚みが内部電極の厚みより薄くされるので、引き出し部の焼成時の収縮量が少なくなる。そのため、この発明にかかる積層セラミック電子部品では、製造する際にたとえばバレル研磨工程が不要となったり短時間化できるとともに、内部電極と外部電極との接合性がよくなる。内部電極と外部電極との接合性がよくなると、その接合界面における接触抵抗の減少により、等価直列抵抗が小さく誘電損失の小さい積層セラミックコンデンサなどの積層セラミック電子部品が得られる。
【0007】
この発明の上述の目的、その他の目的、特徴および利点は、図面を参照して行う以下の発明の実施の形態の詳細な説明から一層明らかとなろう。
【0008】
【発明の実施の形態】
図1はこの発明にかかる積層セラミックコンデンサの一例を示す図解図である。図1に示す積層セラミックコンデンサ10は、直方体状のセラミック素子12を含む。セラミック素子12は、誘電体からなる多数のセラミック層14を含む。これらのセラミック層14は積層される。セラミック層14間には、内部電極16aおよび16bが交互に形成される。この場合、内部電極16aは引き出し部(図1のAで示す部分)がセラミック素子12の一端部に延びて形成され、内部電極16bは引き出し部(図1のBで示す部分)がセラミック素子12の他端部に延びて形成される。また、内部電極16aおよび16bは、図1のCで示す部分でセラミック層14を介して重なり合い容量が形成される。さらに、内部電極16aおよび16bの引き出し部は、それぞれ、内部電極の厚みより薄くなるように形成される。この場合、各引き出し部は全て略等しい厚みに形成される。そのため、内部電極16aおよび16bと引き出し部との間には、段差部18aおよび18bがそれぞれ形成される。
【0009】
セラミック素子12の一端部には、外部電極20aが内部電極16aに接続されるように形成される。外部電極20aは、セラミック素子12の一端部に形成されるAgやCuからなる焼付電極22aを含む。焼付電極22a上には、Niからなる第1めっき膜24aが形成され、第1めっき膜24a上には、Snからなる第2めっき膜26aが形成される。
【0010】
同様に、セラミック素子12の他端部には、焼付電極22bやめっき膜24b、26bからなる外部電極20bが内部電極16bに接続されるように形成される。
【0011】
次に、図1に示す積層セラミックコンデンサ10の製造方法の一例について説明する。
【0012】
図1に示す積層セラミックコンデンサ10を製造するためには、まず、セラミック素子12のセラミック層14となる誘電体材料からなるセラミックグリーンシートが準備される。
【0013】
そのセラミックグリーンシート上には、内部電極材料をスクリーン印刷やグラビア印刷等で印刷することによって、内部電極と引き出し部となる内部電極材料層が形成される。この場合、内部電極材料層は引き出し部の厚みが内部電極の厚みより薄くなるように形成される。
【0014】
そして、それらのセラミックグリーンシートが積層され、押圧、切断後焼成されることによって、セラミック素子12が形成される。
【0015】
セラミック素子12の両端部には、AgやCu等の導電ペーストを塗布・焼き付けした焼付電極22aおよび22b、Niの電気めっきによる第1めっき膜24aおよび24b、Snの電気めっきによる第2めっき膜26aおよび26bからなる外部電極20aおよび20bが形成される。
【0016】
図1に示す積層セラミックコンデンサ10では、内部電極16aおよび16bの引き出し部の厚みが内部電極の厚みより薄く形成されるので、引き出し部の収縮量が少なくなる。そのため、この積層セラミックコンデンサ10では、内部電極16aおよび16bと外部電極20aおよび20bとの接合性がよくなる。したがって、セラミック素子12表面に、引き出し部を露出させるためのバレル研磨工程を短時間化したり、省略させることができる。また、内部電極16aおよび16bの引き出し部と外部電極20aおよび20bとの接合性がよくなると、その接合界面における接触抵抗の減少により、等価直列抵抗が小さく誘電損失も小さくできる。
【0017】
(実施例1)
実施例1では、上述の積層セラミックコンデンサ10およびその製造方法において以下のようにした。
セラミックグリーンシート上に、Pdからなる内部電極材料を取得容量を確保できる厚みとして2μmの厚みで、かつ比抵抗が大きくならない程度の厚みとして引き出し部を1μmの厚みでスクリーン印刷した。
これらグリーンシートを所定枚数積層圧着し、個々のチップに切断した後、空気中で焼成した。
この場合、内部電極16aおよび16bは合計で10枚とした。
焼付電極22a、22bは、Agからなる電極材料を800℃で焼付けることによって形成した。
製造された積層セラミックコンデンサ10は、縦2.0mm、横1.2mm、厚み1.2mmであった。
製造される積層セラミックコンデンサ10は、目標とする静電容量が10.0pFである。
製造した積層セラミックコンデンサ10は、10000個であった。
【0018】
(比較例1)
比較例1では、実施例1と比べて、引き出し部の厚みを2μmとした。
【0019】
(比較例2)
比較例2では、実施例1と比べて、内部電極および引き出し部の厚みをともに1μmとした。
【0020】
(比較例3)
比較例3では、実施例1と比べて、引き出し部の厚みを2μmとし、内部電極の厚みを1μmとした。
【0021】
(比較例4)
比較例4では、実施例1と比べて、引き出し部の厚みを2μmとし、内部電極の厚みを4μmとした。
【0022】
そして、実施例1、比較例1、比較例2、比較例3および比較例4で製造した積層セラミックコンデンサについて、取得容量C、等価直列抵抗ESRおよび誘電損失DFの各特性を測定した。その結果を表1に示す。
【0023】
【表1】

Figure 0004667703
【0024】
表1の結果より、比較例1では、内部電極および外部電極の接合性が十分に確保されず、取得容量Cの不足、等価直列抵抗ESRおよび誘電損失の増大が発生している。
また、比較例2および比較例3では、内部電極がセラミック層を介して重なり合う部分の実効面積が取れず、取得容量Cの不足が発生している。
比較例4では、容量は取得できるものの内部電極の厚みが4μmと厚いため、内部電極の収縮とセラミック素子の収縮の応力による、デラミネーションが発生した。
それに対して、実施例1では、取得容量Cが十分であり、等価直列抵抗ESRが小さく、誘電損失DFも少なく、各特性が良好である。
【0025】
図2はこの発明にかかる積層セラミックコンデンサの他の例を示す図解図である。図2に示す積層セラミックコンデンサ10は、図1に示す積層セラミックコンデンサ10と比べて、内部電極16aおよび16bの引き出し部が、内部電極16aおよび16b側からセラミック素子12の端部側に向って徐々に薄くなるように形成されている。
図2に示す積層セラミックコンデンサ10でも、図1に示す積層セラミックコンデンサ10と同様の効果を奏する。
【0026】
上述の実施例からわかるように、この発明では、内部電極の引き出し部の厚みを、焼成時に引っ込まないように薄くすることで、外部電極との接合を良好にするというものである。したがって、この趣旨を逸脱しないような種々の設計変更等は全く任意に行えばよい。
特に内部電極の引き出し部の厚みは、少なくともセラミック素子の表面に露出する端部およびその近傍で薄くされていればよく、必ずしも引き出し部全体が薄くされている必要はない。
【0027】
また、上述の実施例では積層セラミックコンデンサを例にとって説明したが、この発明は、積層セラミックバリスタ、積層セラミックインダクタ、積層セラミック複合部品、積層セラミックサーミスタ、多層基板など、セラミック素子中に内部電極や導体が形成された構造を有する種々の積層セラミック電子部品に適用することが可能である。
【0028】
【発明の効果】
この発明によれば、製造が簡略化できるとともに内部電極と外部電極との接合性がよく、等価直列抵抗が小さい、積層セラミックコンデンサなどの積層セラミック電子部品が得られる。
【図面の簡単な説明】
【図1】この発明にかかる積層セラミックコンデンサの一例を示す図解図である。
【図2】この発明にかかる積層セラミックコンデンサの他の例を示す図解図である。
【図3】従来の積層セラミックコンデンサの一例を示す図解図である。
【符号の説明】
10 積層セラミックコンデンサ
12 セラミック素子
14 セラミック層
16a、16b 内部電極
18a,18b 段差部
20a、20b 外部電極
22a、22b 焼付電極
24a、24b 第1めっき被膜
26a、26b 第2めっき被膜[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a multilayer ceramic electronic component, and more particularly to a multilayer ceramic layer, an internal electrode formed between ceramic layers, and an external electrode formed on an end surface of the ceramic layer and connected to the end of the internal electrode, for example The present invention relates to a multilayer ceramic electronic component such as a capacitor, a multilayer ceramic inductor, a multilayer ceramic varistor, and a multilayer ceramic thermistor.
[0002]
[Prior art]
In a multilayer ceramic capacitor, a plurality of internal electrodes are laminated and disposed through a ceramic layer inside a ceramic element, and the internal electrodes are connected to external electrodes formed at the end of the element. By the way, the relatively low capacity monolithic ceramic capacitor requires a small number of laminated internal electrodes, but there is a problem that the equivalent series resistance increases if the number of internal electrodes is reduced. In order to solve this problem, the thickness of the internal electrode has been conventionally increased.
[0003]
[Problems to be solved by the invention]
By the way, in the multilayer ceramic capacitor, the ceramic element and the internal electrode are fired at the same time, but since the ceramic and the internal electrode have different shrinkage amounts during firing, the internal electrode is in a state of being retracted into the ceramic element after firing. Bonding with external electrodes may be insufficient. When the thickness of the internal electrode is increased, there is a problem that shrinkage during firing becomes larger and the reliability of bonding with the external electrode is further deteriorated.
As shown in FIG. 3, there has been devised a structure in which only the lead-out portion of the internal electrode is thickened to increase the joining region (Japanese Patent Laid-Open No. 5-335175). Therefore, it was not a fundamental solution for poor bonding with external electrodes.
In order to expose the internal electrode that has been retracted, the ceramic element is barrel-polished before forming the external electrode. However, not only does the process take a long time, but cracks, scratches, scratches, etc. occur in the ceramic element. It was easy to do and was not preferable.
The above problems also exist in other multilayer ceramic electronic components such as multilayer ceramic inductors, multilayer ceramic varistors, and multilayer ceramic thermistors.
[0004]
SUMMARY OF THE INVENTION Therefore, a main object of the present invention is to provide a multilayer ceramic electronic component such as a multilayer ceramic capacitor that has a good bondability between an internal electrode and an external electrode and a low equivalent series resistance.
[0005]
[Means for Solving the Problems]
The multilayer ceramic electronic component according to the present invention includes a ceramic element, an internal electrode disposed inside the ceramic element and led out to the surface of the ceramic element by a lead-out part, and formed on the outer surface of the ceramic element. In a multilayer ceramic electronic component formed by firing together with a ceramic element, the thickness of the internal electrode is less than 4 μm, and the shrinkage stress between the internal electrode and the ceramic element In order to prevent the occurrence of delamination due to the above, the contact resistance at the interface between the internal electrode and the external electrode is reduced in order to ensure sufficient bonding between the internal electrode lead portion and the external electrode. for, characterized in that the thickness of the lead portions of the internal electrodes thinner than the thickness of the internal electrode A laminated ceramic electronic components.
In the multilayer ceramic electronic component according to the present invention, a stepped portion may be formed between the internal electrode and the lead portion, or the lead portion may be formed so as to become gradually thinner toward the surface side of the ceramic element. .
[0006]
In the multilayer ceramic electronic component according to the present invention, since the thickness of the lead portion of the internal electrode is made thinner than the thickness of the internal electrode, the amount of shrinkage during firing of the lead portion is reduced. For this reason, in the multilayer ceramic electronic component according to the present invention, for example, a barrel polishing step is not required or can be shortened in manufacturing, and the bonding property between the internal electrode and the external electrode is improved. When the bondability between the internal electrode and the external electrode is improved, a multilayer ceramic electronic component such as a multilayer ceramic capacitor having a small equivalent series resistance and a small dielectric loss can be obtained due to a decrease in contact resistance at the joint interface.
[0007]
The above object, other objects, features, and advantages of the present invention will become more apparent from the following detailed description of the embodiments of the present invention with reference to the drawings.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 is an illustrative view showing one example of a multilayer ceramic capacitor according to the present invention. A multilayer ceramic capacitor 10 shown in FIG. 1 includes a rectangular parallelepiped ceramic element 12. The ceramic element 12 includes a number of ceramic layers 14 made of a dielectric. These ceramic layers 14 are laminated. Internal electrodes 16 a and 16 b are alternately formed between the ceramic layers 14. In this case, the internal electrode 16a is formed by extending the lead portion (portion indicated by A in FIG. 1) to one end portion of the ceramic element 12, and the internal electrode 16b is formed by the lead portion (portion indicated by B in FIG. 1). It extends to the other end. Further, the internal electrodes 16a and 16b overlap with each other through the ceramic layer 14 at a portion indicated by C in FIG. Furthermore, the lead portions of the internal electrodes 16a and 16b are formed so as to be thinner than the thickness of the internal electrodes. In this case, all the lead portions are formed to have substantially the same thickness. Therefore, step portions 18a and 18b are formed between the internal electrodes 16a and 16b and the lead portion, respectively.
[0009]
An external electrode 20a is formed at one end of the ceramic element 12 so as to be connected to the internal electrode 16a. The external electrode 20 a includes a baked electrode 22 a made of Ag or Cu formed at one end of the ceramic element 12. A first plating film 24a made of Ni is formed on the baking electrode 22a, and a second plating film 26a made of Sn is formed on the first plating film 24a.
[0010]
Similarly, an outer electrode 20b made of a baked electrode 22b and plating films 24b and 26b is formed at the other end of the ceramic element 12 so as to be connected to the inner electrode 16b.
[0011]
Next, an example of a method for manufacturing the multilayer ceramic capacitor 10 shown in FIG. 1 will be described.
[0012]
In order to manufacture the multilayer ceramic capacitor 10 shown in FIG. 1, first, a ceramic green sheet made of a dielectric material that becomes the ceramic layer 14 of the ceramic element 12 is prepared.
[0013]
On the ceramic green sheet, the internal electrode material layer is formed by printing the internal electrode material by screen printing, gravure printing, or the like. In this case, the internal electrode material layer is formed such that the thickness of the lead portion is smaller than the thickness of the internal electrode.
[0014]
And the ceramic element 12 is formed by laminating | stacking those ceramic green sheets, baking after pressing and cutting | disconnection.
[0015]
On both ends of the ceramic element 12, there are baked electrodes 22a and 22b coated and baked with a conductive paste such as Ag or Cu, first plated films 24a and 24b by Ni electroplating, and a second plated film 26a by Sn electroplating. And external electrodes 20a and 20b made of 26b are formed.
[0016]
In the monolithic ceramic capacitor 10 shown in FIG. 1, since the thickness of the lead portions of the internal electrodes 16a and 16b is formed thinner than the thickness of the internal electrodes, the shrinkage amount of the lead portions is reduced. Therefore, in this multilayer ceramic capacitor 10, the bondability between the internal electrodes 16a and 16b and the external electrodes 20a and 20b is improved. Therefore, the barrel polishing step for exposing the lead portion on the surface of the ceramic element 12 can be shortened or omitted. In addition, when the connection between the lead portions of the internal electrodes 16a and 16b and the external electrodes 20a and 20b is improved, the equivalent series resistance can be reduced and the dielectric loss can be reduced due to the reduction of the contact resistance at the junction interface.
[0017]
Example 1
In Example 1, the above-described multilayer ceramic capacitor 10 and the manufacturing method thereof were performed as follows.
On the ceramic green sheet, an internal electrode material made of Pd was screen-printed with a thickness of 2 μm as a thickness capable of securing an acquisition capacity and with a thickness of 1 μm as a thickness that does not increase the specific resistance.
A predetermined number of these green sheets were laminated and pressure-bonded, cut into individual chips, and fired in air.
In this case, the total number of internal electrodes 16a and 16b was ten.
The baking electrodes 22a and 22b were formed by baking an electrode material made of Ag at 800 ° C.
The manufactured multilayer ceramic capacitor 10 had a length of 2.0 mm, a width of 1.2 mm, and a thickness of 1.2 mm.
The manufactured multilayer ceramic capacitor 10 has a target capacitance of 10.0 pF.
The number of manufactured multilayer ceramic capacitors 10 was 10,000.
[0018]
(Comparative Example 1)
In Comparative Example 1, compared with Example 1, the thickness of the lead-out portion was 2 μm.
[0019]
(Comparative Example 2)
In Comparative Example 2, as compared with Example 1, both the internal electrode and the lead portion had a thickness of 1 μm.
[0020]
(Comparative Example 3)
In Comparative Example 3, as compared with Example 1, the thickness of the lead portion was 2 μm, and the thickness of the internal electrode was 1 μm.
[0021]
(Comparative Example 4)
In Comparative Example 4, as compared with Example 1, the thickness of the lead portion was 2 μm, and the thickness of the internal electrode was 4 μm.
[0022]
Then, the characteristics of the obtained capacitance C, equivalent series resistance ESR, and dielectric loss DF were measured for the multilayer ceramic capacitors manufactured in Example 1, Comparative Example 1, Comparative Example 2, Comparative Example 3, and Comparative Example 4. The results are shown in Table 1.
[0023]
[Table 1]
Figure 0004667703
[0024]
From the results shown in Table 1, in Comparative Example 1, sufficient bondability between the internal electrode and the external electrode is not ensured, resulting in insufficient acquisition capacitance C, increased equivalent series resistance ESR, and dielectric loss.
In Comparative Example 2 and Comparative Example 3, the effective area of the portion where the internal electrodes overlap through the ceramic layer cannot be obtained, and the acquisition capacity C is insufficient.
In Comparative Example 4, although the capacity could be obtained, the thickness of the internal electrode was as thick as 4 μm, so delamination occurred due to the stress of the internal electrode contraction and the ceramic element contraction.
On the other hand, in Example 1, the acquisition capacitance C is sufficient, the equivalent series resistance ESR is small, the dielectric loss DF is small, and each characteristic is good.
[0025]
FIG. 2 is an illustrative view showing another example of the multilayer ceramic capacitor according to the present invention. In the multilayer ceramic capacitor 10 shown in FIG. 2, compared with the multilayer ceramic capacitor 10 shown in FIG. 1, the lead-out portions of the internal electrodes 16 a and 16 b gradually move from the internal electrodes 16 a and 16 b side toward the end portion side of the ceramic element 12. It is formed to be thin.
The multilayer ceramic capacitor 10 shown in FIG. 2 has the same effect as the multilayer ceramic capacitor 10 shown in FIG.
[0026]
As can be seen from the above-described embodiments, in the present invention, the thickness of the lead portion of the internal electrode is made thin so as not to be retracted at the time of firing, thereby improving the bonding with the external electrode. Therefore, various design changes and the like that do not depart from this spirit may be performed arbitrarily.
In particular, the thickness of the lead portion of the internal electrode may be thinned at least at the end portion exposed in the surface of the ceramic element and in the vicinity thereof, and the whole lead portion is not necessarily thinned.
[0027]
In the above-described embodiments, the multilayer ceramic capacitor has been described as an example. However, the present invention is not limited to a multilayer ceramic varistor, a multilayer ceramic inductor, a multilayer ceramic composite part, a multilayer ceramic thermistor, a multilayer substrate, and the like. The present invention can be applied to various multilayer ceramic electronic components having a structure in which is formed.
[0028]
【The invention's effect】
According to the present invention, it is possible to obtain a multilayer ceramic electronic component such as a multilayer ceramic capacitor that can be simplified in manufacture, has good bondability between the internal electrode and the external electrode, and has a small equivalent series resistance.
[Brief description of the drawings]
FIG. 1 is an illustrative view showing one example of a multilayer ceramic capacitor according to the present invention;
FIG. 2 is an illustrative view showing another example of the multilayer ceramic capacitor according to the present invention;
FIG. 3 is an illustrative view showing one example of a conventional multilayer ceramic capacitor.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 Multilayer ceramic capacitor 12 Ceramic element 14 Ceramic layer 16a, 16b Internal electrode 18a, 18b Step part 20a, 20b External electrode 22a, 22b Baking electrode 24a, 24b 1st plating film 26a, 26b 2nd plating film

Claims (3)

セラミック素子と、
前記セラミック素子内部に配設され、引き出し部によって前記セラミック素子の表面に導出された内部電極と、
前記セラミック素子外面に形成され、前記内部電極の引き出し部と接続された外部電極とを有し、
前記内部電極は前記セラミック素子とともに焼成することによって形成される積層セラミック電子部品において、
前記内部電極の厚みを4μm未満であって、かつ前記内部電極と前記セラミック素子の収縮の応力によるデラミネーションの発生を防止するための厚みするとともに、
前記内部電極の引き出し部と前記外部電極との接合性を十分に確保するためにかつ前記内部電極と前記外部電極との接合界面における接触抵抗を減少するために、前記内部電極の引き出し部の厚みを前記内部電極の厚みより薄くしたことを特徴とする、積層セラミック電子部品。
A ceramic element;
An internal electrode disposed inside the ceramic element and led to the surface of the ceramic element by a lead portion;
An external electrode formed on the outer surface of the ceramic element and connected to the lead portion of the internal electrode;
In the multilayer ceramic electronic component formed by firing the internal electrode together with the ceramic element,
The thickness of the internal electrode is less than 4 μm and the thickness for preventing the occurrence of delamination due to the shrinkage stress of the internal electrode and the ceramic element ,
The thickness of the lead portion of the internal electrode in order to sufficiently secure the bondability between the lead portion of the internal electrode and the external electrode and to reduce the contact resistance at the joint interface between the internal electrode and the external electrode. The multilayer ceramic electronic component is characterized in that is made thinner than the thickness of the internal electrode.
前記内部電極と前記引き出し部との間に段差部が形成された、請求項1に記載の積層セラミック電子部品。  The multilayer ceramic electronic component according to claim 1, wherein a step portion is formed between the internal electrode and the lead portion. 前記引き出し部は前記セラミック素子の表面側に向って徐々に薄くなるように形成された、請求項1に記載の積層セラミック電子部品。  The multilayer ceramic electronic component according to claim 1, wherein the lead-out portion is formed so as to be gradually thinner toward a surface side of the ceramic element.
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