JP4458814B2 - 静電破壊保護装置 - Google Patents
静電破壊保護装置 Download PDFInfo
- Publication number
- JP4458814B2 JP4458814B2 JP2003375383A JP2003375383A JP4458814B2 JP 4458814 B2 JP4458814 B2 JP 4458814B2 JP 2003375383 A JP2003375383 A JP 2003375383A JP 2003375383 A JP2003375383 A JP 2003375383A JP 4458814 B2 JP4458814 B2 JP 4458814B2
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- mos transistor
- well
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- protection
- drain
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- 230000015556 catabolic process Effects 0.000 claims description 66
- 239000000758 substrate Substances 0.000 claims description 29
- 239000004065 semiconductor Substances 0.000 claims description 17
- 230000000694 effects Effects 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 239000012535 impurity Substances 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 239000002784 hot electron Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
以上は、接地電位Vss側に設けられた第1のMOSトランジスタTrAと第2のMOSトランジスタTrBから成る静電破壊保護装置について述べたが、高電源電位HVdd側に設けられた第3のMOSトランジスタTrCと第4のMOSトランジスタTrDから成る静電破壊保護装置についても同様な効果を奏する。
高電源電位HVddより小さい電源電位であるが、電源電位Vddの代わりに、高電源電位HVddを用いてもよい。
Claims (5)
- 第1導電型の半導体基板と、
前記半導体基板上に形成された端子と、
前記半導体基板の表面に形成された第2導電型ウエルと、
前記第2導電型ウエル内に形成され、互いに離間された複数の第1導電型ウエルと、
前記複数の第1導電型ウエルのそれぞれの表面に1つずつ形成され、前記端子と所定の電位の間に直列接続された複数の保護トランジスタと、
前記保護トランジスタの基板である前記第1導電型ウエルを、その保護トランジスタとこれに隣接する保護トランジスタとの接続点に接続したことを特徴とする静電破壊保護装置。 - 前記第2導電型ウエルが互いに離間された複数の第2導電型ウエルに分割され、それら複数の第2導電型ウエル内に、それぞれ前記第1導電型ウエルが形成されていることを特徴とする請求項1に記載の静電破壊保護装置。
- 第1導電型の半導体基板と、
前記半導体基板上に形成された端子と、
前記半導体基板の表面に形成され、互いに離間された複数の第2導電型ウエルと、
前記複数の第2導電型ウエルのそれぞれの表面に1つずつ形成され、前記端子と所定の電位の間に直列接続された複数の保護トランジスタと、
前記保護トランジスタの基板である前記第2導電型ウエルを、その保護トランジスタとこれに隣接する保護トランジスタとの接続点に接続したことを特徴とする静電破壊保護装置。 - 前記保護トランジスタは単一のソース・ドレイン構造であることを特徴とする請求項1乃至請求項3のいずれか1つに記載の静電破壊保護装置。
- 前記保護トランジスタのソース及びドレイン構造は、DDD構造またはLDD構造であることを特徴とする請求項1乃至請求項3のいずれか1つに記載の静電破壊保護装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003375383A JP4458814B2 (ja) | 2003-11-05 | 2003-11-05 | 静電破壊保護装置 |
TW093131769A TWI241705B (en) | 2003-11-05 | 2004-10-20 | Electrostatic breakdown protection device |
KR1020040088226A KR100719010B1 (ko) | 2003-11-05 | 2004-11-02 | 정전 파괴 보호 장치 |
US10/979,804 US7274071B2 (en) | 2003-11-05 | 2004-11-03 | Electrostatic damage protection device with protection transistor |
CNB200410089762XA CN100517689C (zh) | 2003-11-05 | 2004-11-05 | 静电破坏保护装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003375383A JP4458814B2 (ja) | 2003-11-05 | 2003-11-05 | 静電破壊保護装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005142261A JP2005142261A (ja) | 2005-06-02 |
JP4458814B2 true JP4458814B2 (ja) | 2010-04-28 |
Family
ID=34631362
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003375383A Expired - Fee Related JP4458814B2 (ja) | 2003-11-05 | 2003-11-05 | 静電破壊保護装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7274071B2 (ja) |
JP (1) | JP4458814B2 (ja) |
KR (1) | KR100719010B1 (ja) |
CN (1) | CN100517689C (ja) |
TW (1) | TWI241705B (ja) |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7285827B1 (en) * | 2005-08-02 | 2007-10-23 | Spansion Llc | Back-to-back NPN/PNP protection diodes |
US20090267147A1 (en) * | 2006-04-14 | 2009-10-29 | Nxp B.V. | Esd protected rf transistor |
JP2008010667A (ja) * | 2006-06-29 | 2008-01-17 | Mitsumi Electric Co Ltd | 半導体装置 |
JP4584222B2 (ja) * | 2006-09-26 | 2010-11-17 | シャープ株式会社 | 高耐圧トランジスタの製造方法 |
JP2008091687A (ja) * | 2006-10-03 | 2008-04-17 | Matsushita Electric Ind Co Ltd | 半導体集積回路装置 |
US7804669B2 (en) | 2007-04-19 | 2010-09-28 | Qualcomm Incorporated | Stacked ESD protection circuit having reduced trigger voltage |
US7709924B2 (en) * | 2007-07-16 | 2010-05-04 | International Business Machines Corporation | Semiconductor diode structures |
US7969697B2 (en) * | 2008-04-22 | 2011-06-28 | Exar Corporation | Low-voltage CMOS space-efficient 15 KV ESD protection for common-mode high-voltage receivers |
DE102008047850B4 (de) | 2008-09-18 | 2015-08-20 | Austriamicrosystems Ag | Halbleiterkörper mit einer Schutzstruktur und Verfahren zum Herstellen derselben |
US8134813B2 (en) * | 2009-01-29 | 2012-03-13 | Xilinx, Inc. | Method and apparatus to reduce footprint of ESD protection within an integrated circuit |
US8378422B2 (en) * | 2009-02-06 | 2013-02-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Electrostatic discharge protection device comprising a plurality of highly doped areas within a well |
CN101707363B (zh) * | 2009-07-22 | 2012-12-19 | 彩优微电子(昆山)有限公司 | 一种具有实时检测功能的静电破坏保护电路及其控制方法 |
US20110310514A1 (en) * | 2010-06-17 | 2011-12-22 | Shao-Chang Huang | Electrostatic discharge protection circuit |
JP5678542B2 (ja) * | 2010-09-24 | 2015-03-04 | 富士通セミコンダクター株式会社 | 電源状態判定回路を有する集積回路 |
JP5656658B2 (ja) * | 2011-01-14 | 2015-01-21 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体装置 |
JP2014036186A (ja) * | 2012-08-10 | 2014-02-24 | Tokai Rika Co Ltd | Esd保護素子構造 |
JP2014056972A (ja) * | 2012-09-13 | 2014-03-27 | Ricoh Co Ltd | 静電破壊保護回路及び半導体集積回路 |
US9633992B1 (en) * | 2016-02-23 | 2017-04-25 | Vanguard International Semiconductor Corporation | Electrostatic discharge protection device |
US10340266B2 (en) * | 2017-10-02 | 2019-07-02 | Globalfoundries Singapore Pte. Ltd. | ESD protection circuit and method of making the same |
CN108335681B (zh) * | 2018-02-13 | 2021-05-25 | 京东方科技集团股份有限公司 | 一种用于薄膜晶体管的防静电单元、驱动电路及显示装置 |
CN110571212A (zh) * | 2018-06-06 | 2019-12-13 | 中芯国际集成电路制造(上海)有限公司 | 静电保护结构及其形成方法和工作方法、静电保护电路 |
JP2020035307A (ja) * | 2018-08-31 | 2020-03-05 | エイブリック株式会社 | 定電流回路 |
TWI710096B (zh) * | 2019-09-04 | 2020-11-11 | 智原科技股份有限公司 | 靜電放電防護裝置 |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2723904B2 (ja) * | 1988-05-13 | 1998-03-09 | 富士通株式会社 | 静電保護素子及び静電保護回路 |
US5028819A (en) * | 1990-06-08 | 1991-07-02 | Zilog, Inc. | High CMOS open-drain output buffer |
JPH05267586A (ja) | 1992-03-18 | 1993-10-15 | Sanyo Electric Co Ltd | 出力保護回路 |
US5473500A (en) * | 1994-01-13 | 1995-12-05 | Atmel Corporation | Electrostatic discharge circuit for high speed, high voltage circuitry |
US5675168A (en) * | 1994-04-01 | 1997-10-07 | Matsushita Electric Industrial Co., Ltd. | Unsymmetrical MOS device having a gate insulator area offset from the source and drain areas, and ESD protection circuit including such a MOS device |
US5602409A (en) * | 1995-07-13 | 1997-02-11 | Analog Devices, Inc. | Bidirectional electrical overstress protection circuit for bipolar and bipolar-CMOS integrated circuits |
US5593911A (en) * | 1995-07-26 | 1997-01-14 | Taiwan Semiconductor Manufacturing Company Ltd. | Method of making ESD protection circuit with three stages |
US5780897A (en) * | 1995-11-13 | 1998-07-14 | Digital Equipment Corporation | ESD protection clamp for mixed voltage I/O stages using NMOS transistors |
JP2894328B2 (ja) | 1997-06-20 | 1999-05-24 | 日本電気株式会社 | Esd保護回路 |
US6404269B1 (en) * | 1999-09-17 | 2002-06-11 | International Business Machines Corporation | Low power SOI ESD buffer driver networks having dynamic threshold MOSFETS |
JP2001358297A (ja) * | 2000-06-14 | 2001-12-26 | Nec Corp | 静電保護回路 |
US6396107B1 (en) * | 2000-11-20 | 2002-05-28 | International Business Machines Corporation | Trench-defined silicon germanium ESD diode network |
KR100362180B1 (ko) * | 2000-12-26 | 2002-11-23 | 주식회사 하이닉스반도체 | 고내압회로의 정전방전 보호소자의 제조방법 |
JP4025023B2 (ja) * | 2001-01-18 | 2007-12-19 | 株式会社東芝 | 半導体装置 |
US6963111B2 (en) * | 2003-06-13 | 2005-11-08 | Texas Instruments Incorporated | Efficient pMOS ESD protection circuit |
-
2003
- 2003-11-05 JP JP2003375383A patent/JP4458814B2/ja not_active Expired - Fee Related
-
2004
- 2004-10-20 TW TW093131769A patent/TWI241705B/zh not_active IP Right Cessation
- 2004-11-02 KR KR1020040088226A patent/KR100719010B1/ko not_active IP Right Cessation
- 2004-11-03 US US10/979,804 patent/US7274071B2/en active Active
- 2004-11-05 CN CNB200410089762XA patent/CN100517689C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN100517689C (zh) | 2009-07-22 |
TWI241705B (en) | 2005-10-11 |
KR20050043640A (ko) | 2005-05-11 |
US20050121725A1 (en) | 2005-06-09 |
CN1614779A (zh) | 2005-05-11 |
JP2005142261A (ja) | 2005-06-02 |
US7274071B2 (en) | 2007-09-25 |
TW200520199A (en) | 2005-06-16 |
KR100719010B1 (ko) | 2007-05-17 |
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