JP4450113B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP4450113B2 JP4450113B2 JP2009533196A JP2009533196A JP4450113B2 JP 4450113 B2 JP4450113 B2 JP 4450113B2 JP 2009533196 A JP2009533196 A JP 2009533196A JP 2009533196 A JP2009533196 A JP 2009533196A JP 4450113 B2 JP4450113 B2 JP 4450113B2
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- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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Description
本発明は、日本国特許出願:特願2007−242396号(2007年9月19日出願)の優先権主張に基づくものであり、同出願の全記載内容は引用をもって本書に組み込み記載されているものとする。
本発明は、主に複数の半導体パッケージや受動部品を組み合わせて、それらを3次元的に実装した高密度実装半導体装置に関するものである。
従来の技術では、図28に示す様にCSPの側面207と第1の可撓性回路基板203及び第2の可撓性回路基板とが接着されていないため、第1及び第2の可撓性回路基板203、204が固定されていない領域208が長い(一般的なBGAタイプのCSPの外形寸法から推定して2〜3mm)。このように可撓性回路基板がCSPと固定されていない領域208が長いと、上下のCSPをはんだボール205で接続する際のリフロー工程において、はんだボール205が再溶融した時にCSPと固定されていない領域208の可撓性回路基板が動きやすくなり、再溶融後に固まった後のはんだ形状のばらつき(特に高さ方向のばらつき)が大きくなってしまい、CSPとしての平坦性が悪くなる(はんだボール205のコプラナリティの値が大きい)可能性がある。
2 第2のBGAタイプのCSP
3 可撓性回路基板
4 接着層
5 はんだボール
6 ソルダーレジスト
7 外部端子
8 層間絶縁層
9 はんだボール搭載面とは表裏反対面
10 ヒーターステージ
11 可撓性回路基板のうち接着層以外の部分
12 支持体
13 CSPと可撓性回路基板との隙間
14 支持体の外形寸法
15 CSPの外形寸法
16 支持体の内径寸法
17 CSPの最外部のはんだボールの端から端までの距離
18 支持体の端部
19 CSPの側面
20 CSPの側面の一部分
21 CSPの側面のうち、はんだボール搭載面に近い領域
22 加圧ツール
23 はんだボール搭載面
24 CSPの最外部のはんだボール
25 CSPの外端部よりも内側の領域
26 CSPの外端部よりも内側であってCSPの最外部のはんだボールよりも外側の領域
27 フラックス
28 本発明の実施形態1の半導体装置
29 BGAタイプ以外の半導体パッケージ
30 リード端子
31 第3のBGAタイプのCSP
32 受動部品(コンデンサ、抵抗、インダクタ)
33 第1の外部端子
34 第2の外部端子
35 第4のBGAタイプのCSP
36 半導体パッケージ
37 第1のCSPの外端部から第2のCSPの外端部までの幅
38 第1のCSPの最外部のはんだボールの端から第2のCSPの最外部のはんだボールの端までの距離
39 第1のCSPと可撓性回路基板との隙間
40 第2のCSPと可撓性回路基板との隙間
41 実施例1を作製するために用いたCSP
42 支持体の表面上で可撓性回路基板と接触する面
43 溝
44 非粘着剤層
45 可撓性回路基板と接触する面
46 回路基板
47 本発明の実施例1の半導体装置
48 真空吸着用穴
49 可撓性回路基板のうち折り曲げたい箇所
50 ヒーターステージ上で可撓性回路基板を固定している領域
200 従来の半導体装置
201 第1のBGAタイプのCSP
202 第2のBGAタイプのCSP
203 第1の可撓性回路基板
204 第2の可撓性回路基板
205 はんだボール
206 接着剤
207 第1のBGAタイプのCSPの側面
208 可撓性回路基板が固定されていない領域
209 可撓性回路基板
210 最外部のはんだボール
211 はんだボールの高さ方向の成分の張力が加わっている部分の可撓性回路基板
212 はんだボールの高さ方向
213 はんだボールの端
図1(a)は本発明の実施形態1に係る半導体装置の断面図である。図1(a)に示す本発明の半導体装置は、第1のBGAタイプのCSP(以下「第1のCSP」という。)1、可撓性回路基板3、及び可撓性回路基板3と第1のCSP1とを接着させるための接着層4を備えている。接着層4としては、エポキシ樹脂系の熱硬化性接着剤やポリイミド系の熱可塑性樹脂などを用いれば良いが、熱履歴の管理が不要で取り扱いが容易であることや、接着後にキュア(熱処理)工程が不要であること等から、実施形態1では接着層4にはガラス転移温度が約70℃〜140℃の熱可塑性のポリイミド樹脂を用いる。
図30〜図33に本発明の実施形態2に係る半導体装置の製造方法を示す。図中では第1のBGAタイプのCSP1と可撓性回路基板3とを接続した後、可撓性回路基板3を折り曲げてCSP1の側面19、及びCSP1のはんだボール搭載面とは表裏反対面9に接着させる工程までを示している。その後の工程は、実施形態1に示す製造方法と同様なので割愛する。
図34〜図36に本発明の実施形態3に係る半導体装置の製造方法を示す。本実施形態3を説明する図においても、第1のBGAタイプのCSP1と可撓性回路基板3とを接続した後、可撓性回路基板3を折り曲げてCSP1の側面19、及びCSP1のはんだボール搭載面とは表裏反対面9に接着させる工程までを示しており、その後の工程は、実施形態1に示す製造方法と同様なので割愛している。
図1、2、3で説明した本発明の実施形態1に類似した構造で、第1のCSP1と可撓性回路基板3とを接着させる方法が異なる例として、以下に本発明の実施形態4を説明する。
図12(a)、(b)、(c)に本発明の実施形態5に係る半導体装置の断面図を示す。本発明の実施形態5の半導体装置は、それぞれ図1(a)、図8、図9に示す本発明の実施形態1または4の半導体装置と第2のCSP2とを組み合わせて互いに積層した3次元実装型半導体装置である。
図16に本発明の実施形態6に係る半導体装置の断面図を示す。本発明の実施形態6は、図12(a)に示す本発明の実施形態5と類似している3次元実装型半導体装置であるが、実施形態5とは異なり、図8に示す本発明の実施形態1の半導体装置とBGAタイプ以外の半導体パッケージ29とを組み合わせて互いに積層した3次元実装型半導体装置である。このように本発明の半導体装置は必ずしも全てBGAタイプのチップサイズパッケージから構成される必要はなく、図16に示すようにリード端子30を外部端子7として用いたパッケージを積層しても構わない。
図17に本発明の実施形態7に係る半導体装置の断面図を示す。図17に示す本発明の実施形態7は、図12に示す本発明の実施形態5と類似している構造であるが、本発明の半導体装置を2つと、その他に別の半導体パッケージを1つ組み合わせて互いに積層した3次元実装型半導体装置となっている(図17中では、図8に示す本発明の実施形態1の半導体装置を2つを用い、その他に第3のCSP31を用いて、3つのデバイスを3次元実装している例を示している)。
図18に本発明の実施形態8に係る半導体装置の断面図を示す。図18に示す本発明の実施形態8は、図12に示す本発明の実施形態5の半導体装置と類似している構造であるが、本発明の実施形態1(または2)と受動部品(コンデンサ、抵抗、インダクタ)32とを組み合わせて、それぞれを3次元実装しているところが特徴である(図18では図8に示す本発明の実施形態1の半導体装置を用いた例を示している)。
図19に本発明の実施形態9に係る半導体装置の断面図を示す。図19に示す本発明の実施形態9では、実施形態1から8までに示した半導体装置と異なり、1つの可撓性回路基板3の第1の外部端子33上に複数のCSPを実装しているところが特徴である(図19では断面で見た場合、2つのCSP1及び2が1つの可撓性回路基板3上に実装されているように描写されている)。可撓性回路基板3は折り曲げられてCSPのはんだボール搭載面23とは表裏反対面9側に接着され、可撓性回路基板3の第2の外部端子34上に半導体パッケージ36、及び受動部品(コンデンサ、抵抗、インダクタ)32が実装されている。
図1〜7、図12、図13〜15及び図24を用いて本発明の実施例1を説明する。
図27(c)に本発明の実施例2を示す。まず初めに図27(a)に本発明の実施例1に用いたDDR2−SDRAM−CSP41を8個実装した回路基板46(CSP41以外の部品は図を簡略化するために省略している)を示す。CSP41の8個分の実装占有面積は、CSP間の隙間(2mm)も含めると1067.2mm2であった。
Claims (24)
- 外部端子としてはんだボールを備えた半導体パッケージが、基板の両面に外部端子を有する一つの可撓性回路基板の片面側の該外部端子と該はんだボールによって接続され、該可撓性回路基板が該半導体パッケージを包むように折り曲げられて該半導体パッケージの該外部端子面とは表裏反対面側に接着されている半導体装置であって、
該可撓性回路基板が該半導体パッケージの側面の少なくとも一部と接着され、且つ該半導体パッケージのはんだボール搭載面側に位置する該可撓性回路基板が、該半導体パッケージの外端部よりも内側の領域であって、且つ該半導体パッケージに搭載された最外部のはんだボールよりも外側である領域で折り曲げられていることを特徴とする半導体装置。 - 前記可撓性回路基板の、前記最外部のはんだボールよりも外側で折り曲げられた部分から前記半導体パッケージの側面までの部分と、前記最外部のはんだボールとが互いに接触しないことを特徴とする請求項1に記載の半導体装置。
- 前記可撓性回路基板の表面のうち前記半導体パッケージと接続される側の片面上の領域であって、前記半導体パッケージの側面、及び前記半導体パッケージの外部端子面と表裏反対面と接触する領域の少なくとも一部に接着層が設けられていることを特徴とする請求項1又は2に記載の半導体装置。
- 前記半導体パッケージの側面、及び前記半導体パッケージの外部端子面と表裏反対面のうち、前記可撓性回路基板と接触する領域の少なくとも一部に接着層が設けられていることを特徴とする請求項1又は2に記載の半導体装置。
- 前記接着層が熱可塑性樹脂であることを特徴とする請求項3又は4に記載の半導体装置。
- 前記熱可塑性樹脂は、ガラス転移温度が70℃〜140℃の熱可塑性のポリイミド樹脂であることを特徴とする請求項5に記載の半導体装置。
- 前記接着層が熱硬化性樹脂であることを特徴とする請求項3又は4に記載の半導体装置。
- 前記熱可塑性樹脂又は熱硬化性樹脂の厚さが20μm以上であることを特徴とする請求項5〜7のいずれか一に記載の半導体装置。
- 前記可撓性回路基板と前記半導体パッケージとの間にアンダーフィル樹脂が充填されていないことを特徴とする請求項1〜8のいずれか一に記載の半導体装置。
- 半導体パッケージ又は受動部品を複数組み合わせて積層させた3次元実装型パッケージであって、請求項1〜9のいずれか一に記載の半導体装置を少なくとも1以上含むことを特徴とする半導体装置。
- 前記受動部品がコンデンサ、抵抗、インダクタのうちの1以上であることを特徴とする請求項10に記載の半導体装置。
- 請求項1〜11のいずれか一に記載の半導体装置が実装されていることを特徴とする回路基板又はモジュール。
- 請求項1〜12のいずれか一に記載の半導体装置、回路基板、またはモジュールが実装されていることを特徴とする電子機器。
- 半導体パッケージと可撓性回路基板とがはんだボールを介して接続され一体となったデバイスの該可撓性回路基板を、該半導体パッケージの外端部より内側の領域であって、且つ該半導体パッケージに搭載された最外部のはんだボールよりも外側である領域で加熱しながら折り曲げて、該半導体パッケージの側面及び該半導体パッケージの外部端子面とは表裏反対面に接着させる工程を含むことを特徴とする、半導体装置の製造方法。
- 半導体パッケージと可撓性回路基板とがはんだボールを介して接続され一体となったデバイスの、該半導体パッケージと該可撓性回路基板との間の、該半導体パッケージの外端部より内側であって且つ最外部の該はんだボールよりも外側である領域に支持体を挿入する工程と、
該可撓性回路基板をヒーターステージ上で加熱しながら該支持体の端部で折り曲げて該半導体パッケージの側面及び該半導体パッケージの外部端子面とは表裏反対面に接着させる工程と、
該可撓性回路基板を折り曲げた後に該支持体を抜き去る工程と、
を有することを特徴とする、半導体装置の製造方法。 - 前記支持体を抜き去る前に、前記可撓性回路基板の最表面にある絶縁層のガラス転移温度以下まで前記ヒーターステージを冷却させる工程が含まれていることを特徴とする請求項15に記載の半導体装置の製造方法。
- 前記支持体がコの字形状であることを特徴とする請求項15又は16に記載の半導体装置の製造方法。
- 前記支持体の厚さが前記半導体パッケージと前記可撓性回路基板との隙間の厚さよりも薄く、前記支持体の外形サイズが前記半導体パッケージの外形サイズよりも小さいことを特徴とする請求項15〜17のいずれか一に記載の半導体装置の製造方法。
- 前記支持体の表面上であり、少なくとも前記可撓性回路基板と接触する面に溝が形成されていることを特徴とする請求項15〜18のいずれか一に記載の半導体装置の製造方法。
- 前記支持体の表面上であり、少なくとも前記可撓性回路基板と接触する面に非粘着剤層が形成されていることを特徴とする請求項15〜19のいずれか一に記載の半導体装置の製造方法。
- 前記非粘着剤が四フッ化エチレン樹脂(PTFE)、四フッ化エチレン・パーフルオロアルコキシエチレン共重合体樹脂(PFA)、四フッ化エチレン・六フッ化プロピレン共重合体樹脂(FEP)のうちのいずれかであることを特徴とする請求項20に記載の半導体装置の製造方法。
- 前記可撓性回路基板の、前記半導体パッケージの外端部となる領域よりも内側の領域で且つ前記半導体パッケージに搭載された最外部の前記はんだボールよりも外側である領域にあらかじめ折り目を形成する工程を含むことを特徴とする、請求項14に記載の半導体装置の製造方法。
- 前記半導体パッケージと前記可撓性回路基板とが一体となった前記デバイスをヒーターステージ上に固定し、前記可撓性回路基板を折り曲げることを特徴とする、請求項14に記載の半導体装置の製造方法。
- 前記ヒーターステージは、吸着手段を有し、前記デバイスを該吸着手段により吸着固定させた状態で前記可撓性回路基板を折り曲げることを特徴とする、請求項15〜23に記載の半導体装置の製造方法。
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