JP4116005B2 - デルタシグマ変調器およびそれを用いたスイッチング増幅回路 - Google Patents
デルタシグマ変調器およびそれを用いたスイッチング増幅回路 Download PDFInfo
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- JP4116005B2 JP4116005B2 JP2005043218A JP2005043218A JP4116005B2 JP 4116005 B2 JP4116005 B2 JP 4116005B2 JP 2005043218 A JP2005043218 A JP 2005043218A JP 2005043218 A JP2005043218 A JP 2005043218A JP 4116005 B2 JP4116005 B2 JP 4116005B2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M3/358—Continuously compensating for, or preventing, undesired influence of physical parameters of non-linear distortion, e.g. instability
- H03M3/36—Continuously compensating for, or preventing, undesired influence of physical parameters of non-linear distortion, e.g. instability by temporarily adapting the operation upon detection of instability conditions
- H03M3/366—Continuously compensating for, or preventing, undesired influence of physical parameters of non-linear distortion, e.g. instability by temporarily adapting the operation upon detection of instability conditions in feed-forward mode, e.g. using look-ahead circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/412—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
- H03M3/422—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
- H03M3/43—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a single bit one
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
- H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path
- H03M3/44—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with provisions for rendering the modulator inherently stable
- H03M3/446—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with provisions for rendering the modulator inherently stable by a particular choice of poles or zeroes in the z-plane, e.g. by positioning zeroes outside the unit circle, i.e. causing the modulator to operate in a chaotic regime
- H03M3/448—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with provisions for rendering the modulator inherently stable by a particular choice of poles or zeroes in the z-plane, e.g. by positioning zeroes outside the unit circle, i.e. causing the modulator to operate in a chaotic regime by removing part of the zeroes, e.g. using local feedback loops
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/39—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
- H03M3/436—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type
- H03M3/438—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path
- H03M3/452—Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the order of the loop filter, e.g. error feedback type the modulator having a higher order loop filter in the feedforward path with weighted feedforward summation, i.e. with feedforward paths from more than one filter stage to the quantiser input
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
- H03M3/502—Details of the final digital/analogue conversion following the digital delta-sigma modulation
- H03M3/506—Details of the final digital/analogue conversion following the digital delta-sigma modulation the final digital/analogue converter being constituted by a pulse width modulator
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Amplifiers (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
Description
本発明の一実施の形態について図1ないし図11を用いて説明すれば以下の通りである。
〔実施の形態2〕
本発明の他の実施の形態について図12ないし図18を用いて説明すれば以下の通りである。
3、13 ループフィルタ
4、14 コンパレータ
5、15 ループ遅延制御回路
6、16 パワースイッチ段
5a、15d AD変換器(量子化器)
5b ループ遅延選択回路
15e パルス幅選択回路
X 入力信号
V 出力信号
Claims (11)
- ループフィルタとコンパレータとを備えるデルタシグマ変調器において、
上記デルタシグマ変調器のループ上に、信号のループ遅延量を制御する1個または複数のループ遅延制御回路を備え、
上記ループ遅延制御回路は、上記ループ遅延量を、上記デルタシグマ変調器の入力信号の値、または、上記入力信号の成分を含む信号の値に依存して制御することを特徴とするデルタシグマ変調器。 - ループフィルタとコンパレータとを備えるデルタシグマ変調器において、
上記デルタシグマ変調器のループ上に、上記コンパレータによって量子化された信号の最小パルス幅を制御するパルス幅制御回路を備え、
上記パルス幅制御回路は、上記最小パルス幅を、上記デルタシグマ変調器の入力信号の値、または、上記入力信号の成分を含む信号の値に依存して制御することを特徴とするデルタシグマ変調器。 - 上記ループ遅延制御回路は、上記入力信号を量子化するための量子化器と、上記ループ遅延制御回路の入力信号に対して上記ループ遅延量を複数通りに設定して出力する遅延発生回路と、上記遅延発生回路により上記ループ遅延量が設定された信号のいずれかを上記量子化器の出力値に応じて選択し上記ループ遅延制御回路の出力信号として出力するループ遅延選択回路とを備えていることを特徴とする請求項1に記載のデルタシグマ変調器。
- 上記ループ遅延量は上記デルタシグマ変調器の基本動作周期TsまたはTs/2、の整数倍であることを特徴とする請求項3に記載のデルタシグマ変調器。
- 上記パルス幅制御回路は、上記入力信号を量子化するための量子化器と、上記パルス幅制御回路の入力信号に対して上記最小パルス幅を複数通りに設定して出力する最小パルス幅設定回路と、上記最小パルス幅設定回路により上記最小パルス幅が設定された信号のいずれかを上記量子化器の出力値に応じて選択し上記ループ遅延制御回路の出力信号として出力するパルス幅選択回路とを備えていることを特徴とする請求項2に記載のデルタシグマ変調器。
- デジタル回路で構成されることを特徴とする請求項1ないし5のいずれかに記載のデルタシグマ変調器。
- 上記ループフィルタおよび上記コンパレータはアナログ回路で構成され、上記デルタシグマ変調器の入力信号はアナログ信号であることを特徴とする請求項1ないし5のいずれかに記載のデルタシグマ変調器。
- 上記ループフィルタは、1個以上の積分器と各上記積分器への入力信号または各上記積分器からの出力信号を増幅または減衰させるためのゲイン段とを備えていることを特徴とする請求項1ないし7のいずれかに記載のデルタシグマ変調器。
- 請求項1ないし8のいずれかに記載のデルタシグマ変調器を備え、上記デルタシグマ変調器の出力端子にパワースイッチ段の入力端子が接続され、上記パワースイッチ段の出力端子から負荷へ電力を供給することを特徴とするスイッチング増幅回路。
- 請求項1ないし8のいずれかに記載のデルタシグマ変調器を備え、上記デルタシグマ変調器のループ内にパワースイッチ段が配置され、上記パワースイッチ段の出力端子から負荷へ電力を供給することを特徴とするスイッチング増幅回路。
- 上記ループフィルタは1個以上の時間連続型積分器と1個以上の離散時間型積分器とを備えていることを特徴とする請求項10に記載のスイッチング増幅回路。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005043218A JP4116005B2 (ja) | 2005-02-18 | 2005-02-18 | デルタシグマ変調器およびそれを用いたスイッチング増幅回路 |
US11/354,916 US7248193B2 (en) | 2005-02-18 | 2006-02-16 | Delta-sigma modulator and its application to switching amplification circuit |
Applications Claiming Priority (1)
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JP2005043218A JP4116005B2 (ja) | 2005-02-18 | 2005-02-18 | デルタシグマ変調器およびそれを用いたスイッチング増幅回路 |
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JP2006229787A JP2006229787A (ja) | 2006-08-31 |
JP4116005B2 true JP4116005B2 (ja) | 2008-07-09 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2017098670A (ja) * | 2015-11-19 | 2017-06-01 | オンキヨー株式会社 | パルス幅変調器およびそのプログラム |
JP2017098671A (ja) * | 2015-11-19 | 2017-06-01 | オンキヨー株式会社 | パルス幅変調器およびそのプログラム |
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EP1538752A1 (en) * | 2003-11-28 | 2005-06-08 | Freescale Semiconductor, Inc. | Clock pulse generator apparatus with reduced jitter clock phase |
TWI282211B (en) * | 2005-01-17 | 2007-06-01 | Realtek Semiconductor Corp | Power amplifier and method for correcting error of output signals thereof |
JP4675138B2 (ja) * | 2005-04-14 | 2011-04-20 | シャープ株式会社 | スイッチング増幅器 |
KR100819307B1 (ko) * | 2005-07-15 | 2008-04-02 | 삼성전자주식회사 | 델타-시그마 변조된 신호를 사용하는 전력 증폭기의 입력정합 장치 및 방법 |
KR100746201B1 (ko) * | 2006-05-13 | 2007-08-03 | 삼성전자주식회사 | Pwm변조기와 이를 구비하는 d급 증폭기 |
US20080005215A1 (en) * | 2006-06-30 | 2008-01-03 | Ess Technology, Inc. | System and method for reducing click using signal averaging on a high order modulator output |
US7782129B2 (en) * | 2006-06-30 | 2010-08-24 | Ess Technology, Inc. | System and method to reduce audio artifacts from an audio signal by reducing the order of the control loop |
US7786912B2 (en) * | 2006-12-01 | 2010-08-31 | Intersil Americas Inc. | Sigma delta converter system and method |
US8779956B2 (en) | 2006-12-01 | 2014-07-15 | Intersil Americas Inc. | Sigma-delta converter system and method |
JP4818900B2 (ja) * | 2006-12-25 | 2011-11-16 | シャープ株式会社 | ディジタルアンプおよびスイッチング回数制御方法 |
GB2453939A (en) * | 2007-10-22 | 2009-04-29 | Ubidyne Inc | Clockless analogue band-pass delta-sigma modulator |
US7576673B2 (en) * | 2007-11-30 | 2009-08-18 | Infineon Technologies Ag | Increasing the dynamic range of pulse width modulation in analog to digital converters |
US8416880B2 (en) * | 2008-03-31 | 2013-04-09 | Nxp B.V. | Digital modulator |
US8195221B2 (en) * | 2008-06-30 | 2012-06-05 | Intel Corporation | Loop delay compensation for continuous time sigma delta analog to digital converter |
WO2010076671A1 (en) * | 2009-01-05 | 2010-07-08 | Freescale Semiconductor, Inc. | Current sensing circuitry and integrated circuit and method for sensing a current |
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IT201700045616A1 (it) * | 2017-04-27 | 2018-10-27 | St Microelectronics Srl | Circuito per il trattamento di segnali, dispositivo sensore ed apparecchiatura corrispondenti |
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-
2006
- 2006-02-16 US US11/354,916 patent/US7248193B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017098670A (ja) * | 2015-11-19 | 2017-06-01 | オンキヨー株式会社 | パルス幅変調器およびそのプログラム |
JP2017098671A (ja) * | 2015-11-19 | 2017-06-01 | オンキヨー株式会社 | パルス幅変調器およびそのプログラム |
US9742381B2 (en) | 2015-11-19 | 2017-08-22 | Onkyo Corporation | Pulse width modulator and non-transitory computer readable medium for storing program for pulse width modulator |
Also Published As
Publication number | Publication date |
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JP2006229787A (ja) | 2006-08-31 |
US20060187099A1 (en) | 2006-08-24 |
US7248193B2 (en) | 2007-07-24 |
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