JP3520976B2 - Bonding structure of semiconductor device - Google Patents
Bonding structure of semiconductor deviceInfo
- Publication number
- JP3520976B2 JP3520976B2 JP2000008763A JP2000008763A JP3520976B2 JP 3520976 B2 JP3520976 B2 JP 3520976B2 JP 2000008763 A JP2000008763 A JP 2000008763A JP 2000008763 A JP2000008763 A JP 2000008763A JP 3520976 B2 JP3520976 B2 JP 3520976B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- sealing material
- protective film
- opening
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Description
【０００１】[0001]
【発明の属する技術分野】この発明は半導体装置の接合
構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device junction structure.
【０００２】[0002]
【従来の技術】図４は従来の半導体装置の接合構造の一
例の封止前の状態の一部の平面図を示し、図５は図４の
Ｘ−Ｘ線に沿う部分に相当する封止後の状態の断面図を
示したものである。この半導体装置の接合構造はChip O
n Filmといわれるもので、、長方形状の半導体装置１の
下面周辺部に設けられたバンプ電極２がフィルム基板
（回路基板）３の上面に設けられた接続端子４に熱圧着
されて接合されていることにより、フィルム基板３上に
半導体装置１が搭載されている。2. Description of the Related Art FIG. 4 is a plan view showing a part of a conventional junction structure of a semiconductor device in a state before sealing, and FIG. 5 shows a sealing corresponding to a portion along line XX in FIG. It is sectional drawing of the state after. The junction structure of this semiconductor device is Chip O
This is called an n film, and bump electrodes 2 provided on the peripheral portion of the lower surface of a rectangular semiconductor device 1 are bonded by thermocompression bonding to connection terminals 4 provided on the upper surface of a film substrate (circuit board) 3. As a result, the semiconductor device 1 is mounted on the film substrate 3.
【０００３】この場合、接続端子４を含むフィルム基板
３の上面において半導体装置１搭載領域およびその周囲
を少なくとも除く部分にはソルダーレジストからなる保
護膜５が設けられている。すなわち、半導体装置１搭載
領域およびその周囲に対応する部分における保護膜５に
は長方形状の開口部６が設けられている。また、半導体
装置１とフィルム基板３との間および半導体装置１の周
囲にはエポキシ系樹脂からなる封止材７が設けられてい
る。In this case, a protective film 5 made of a solder resist is provided on the upper surface of the film substrate 3 including the connection terminals 4 except at least the semiconductor device 1 mounting region and its periphery. That is, the rectangular opening 6 is provided in the protective film 5 in the portion corresponding to the mounting region of the semiconductor device 1 and its periphery. A sealing material 7 made of epoxy resin is provided between the semiconductor device 1 and the film substrate 3 and around the semiconductor device 1.
【０００４】ところで、封止材７を形成する場合、図示
していないが、ディスペンサーの封止材吐出用のノズル
を半導体装置１の例えば図４における下側（図５では右
側）の長辺に沿って移動させながら、その近傍における
フィルム基板３上に封止材を塗布（サイドポッティン
グ）している。そして、この塗布された封止材が毛細管
現象により半導体装置１とフィルム基板３との間に浸透
することにより、半導体装置１とフィルム基板３との間
および半導体装置１の周囲に封止材７を形成している。When forming the encapsulant 7, although not shown, a nozzle for ejecting the encapsulant of the dispenser is provided, for example, on the long side of the lower side (right side in FIG. 5) of FIG. 4 of the semiconductor device 1. While moving along, the sealing material is applied (side potting) on the film substrate 3 in the vicinity thereof. Then, the applied sealing material permeates between the semiconductor device 1 and the film substrate 3 due to the capillary phenomenon, so that the sealing material 7 is provided between the semiconductor device 1 and the film substrate 3 and around the semiconductor device 1. Is formed.
【０００５】この場合、半導体装置１の図４における下
側の長辺とこれに対向する保護膜５の開口部６の縁部と
の間隔Ｄが０．３〜０．５ｍｍ程度ないと、塗布した封
止材を半導体装置１とフィルム基板３との間に浸透させ
ることができない。そこで、従来では、半導体装置１の
４辺の外面と保護膜５の開口部６の４辺の縁部との間隔
Ｄが全て０．３〜０．５ｍｍ程度となるようにしてい
る。In this case, if the distance D between the lower long side of the semiconductor device 1 in FIG. 4 and the edge of the opening 6 of the protective film 5 facing the lower long side is not about 0.3 to 0.5 mm, the coating is performed. The encapsulating material cannot penetrate between the semiconductor device 1 and the film substrate 3. Therefore, conventionally, the distance D between the outer surface of the four sides of the semiconductor device 1 and the edge of the four sides of the opening 6 of the protective film 5 is all set to about 0.3 to 0.5 mm.
【０００６】[0006]
【発明が解決しようとする課題】ところが、図５に示す
ように、半導体装置１の右側の長辺の外面と保護膜５の
間から塗布されて半導体装置１とフィルム基板３との間
に浸透した封止材７が、保護膜５の開口部６の対辺側の
縁部までに至らず、この部分におけるフィルム基板３の
接続端子４を封止材７で覆うことができず露出してしま
う。このようなことは、図４における左右の接続端子４
についても生じることがある。接続端子４の露出部分
は、当然、酸化やマイグレーション等の不具合を発生す
るものであるから、従来では、半導体装置１の一対の長
辺に沿ってまたは周囲全体に沿って封止材を塗布してい
るが、封止材吐出用のノズルによる封止材塗布箇所が２
箇所または４箇所となるばかりでなく、その移動距離も
長くなり、このため封止材塗布作業が面倒であるという
問題があった。この発明の課題は、封止材塗布作業を簡
単とすることである。However, as shown in FIG. 5, it is applied between the outer surface of the long side on the right side of the semiconductor device 1 and the protective film 5 and penetrates between the semiconductor device 1 and the film substrate 3. The encapsulating material 7 does not reach the edge of the protective film 5 on the opposite side of the opening 6, and the connection terminal 4 of the film substrate 3 in this portion cannot be covered with the encapsulating material 7 and is exposed. . This is because the left and right connection terminals 4 in FIG.
Can also occur. Since the exposed portion of the connection terminal 4 naturally causes defects such as oxidation and migration, conventionally, the sealing material is applied along a pair of long sides of the semiconductor device 1 or along the entire periphery. However, there are two places where the sealing material is applied by the nozzle for discharging the sealing material.
There is a problem that not only the number of positions is four or four, but also the moving distance becomes long, which makes the work of applying the sealing material troublesome. An object of the present invention is to simplify the sealing material application work.
【０００７】[0007]
【課題を解決するための手段】この発明は、基板上に設
けた保護膜の内側に延出された接続端子と半導体装置に
設けられたバンプ電極を接合し、前記保護膜の開口部内
を封止材にて封止する半導体装置の接合構造において、
前記半導体装置は長方形状であり、前記半導体装置の一
の長辺側のみを前記封止材が塗布される辺側となし、前
記半導体装置の外面と前記保護膜の開口部の縁部との間
隔を、前記封止材が塗布される辺側で常に他の辺側より
も大きくなしたものである。この発明によれば、半導体
装置の外面と保護膜の開口部の縁部との間隔を、封止材
の塗布側において、他の側よりも大きくなしているの
で、間隔の小さい部分における保護膜の開口部の縁部ま
で、半導体装置と回路基板との間を浸透してきた封止材
を到達させることができ、ひいては封止材塗布作業を簡
単とすることができる。According to the present invention, a connection terminal extending inside a protective film provided on a substrate is bonded to a bump electrode provided on a semiconductor device to seal the inside of the opening of the protective film. In the joining structure of the semiconductor device that is sealed with a stopper,
The semiconductor device has a rectangular shape.
The long side only is defined as the side to which the sealing material is applied, and the distance between the outer surface of the semiconductor device and the edge of the opening of the protective film is set to the side to which the sealing material is applied. It is always larger than the other sides. According to the present invention, the gap between the outer surface of the semiconductor device and the edge of the opening of the protective film is made larger on the sealant application side than on the other side. The sealing material that has penetrated between the semiconductor device and the circuit board can reach the edge of the opening, and thus the sealing material application operation can be simplified.
【０００８】[0008]
【発明の実施の形態】図１はこの発明の一実施形態にお
ける半導体装置の接合構造の封止前の状態の一部の平面
図を示し、図２は図１のＸ−Ｘ線に沿う部分に相当する
封止後の状態の断面図を示したものである。これらの図
において、図４および図５と同一名称部分には同一の符
号を付し、その説明を適宜省略する。この実施形態で
は、図１において、半導体装置１の下側の長辺の外面と
これに対向する保護膜５の開口部６の縁部との間隔Ｄ１
は０．３〜０．５ｍｍ程度となっており、残りの３つの
間隔Ｄ２は０．２ｍｍ程度またはそれ以下となってい
る。1 is a plan view showing a part of a junction structure of a semiconductor device in a state before sealing according to an embodiment of the present invention, and FIG. 2 is a portion taken along line XX of FIG. It is a cross-sectional view of a state after sealing corresponding to FIG. In these figures, parts having the same names as those in FIGS. 4 and 5 are designated by the same reference numerals, and the description thereof will be omitted as appropriate. In this embodiment, in FIG. 1, the distance D 1 between the outer surface of the lower long side of the semiconductor device 1 and the edge of the opening 6 of the protective film 5 facing the outer surface.
Is about 0.3 to 0.5 mm, and the remaining three intervals D 2 are about 0.2 mm or less.
【０００９】そして、間隔Ｄ１の部分から封止材７を塗
布すると、この塗布された封止材７は毛細管現象により
半導体装置１とフィルム基板３との間に浸透し、３つの
間隔Ｄ２の部分において保護膜５の開口部６の縁部まで
またはその外側まで到達する。これは、３つの間隔Ｄ２
が間隔Ｄ１よりも小さくて０．２ｍｍ程度またはそれ以
下となっているからである。したがって、間隔Ｄ１の部
分に封止材７を塗布するだけの簡単な封止材塗布作業に
より、保護膜５の開口部６内における回路基板３の接続
端子４を封止材７で十分に覆うことができる。When the encapsulating material 7 is applied from the portion of the distance D 1 , the applied encapsulating material 7 penetrates between the semiconductor device 1 and the film substrate 3 due to the capillary phenomenon, and the three distances D 2 are applied. In the portion of (3), it reaches the edge of the opening 6 of the protective film 5 or the outside thereof. This is three intervals D 2
Is smaller than the distance D 1 and is about 0.2 mm or less. Therefore, the connecting material 4 of the circuit board 3 in the opening 6 of the protective film 5 can be sufficiently covered with the sealing material 7 by a simple sealing material applying operation of only applying the sealing material 7 to the space D 1. Can be covered.
【００１０】なお、図１を参照して説明すると、半導体
装置１の下面の左右辺部にバンプ電極が設けられていな
い場合、フィルム基板３にもそれに対応する接続端子が
設けられていないので、左右の間隔Ｄ２をＤ１として
も、別に問題はない。It should be noted that, with reference to FIG. 1, when bump electrodes are not provided on the left and right sides of the lower surface of the semiconductor device 1, the film substrate 3 is also not provided with corresponding connection terminals. Even if the left-right distance D 2 is set to D 1 , there is no problem.
【００１１】また、上記実施形態では、半導体装置１が
長方形状である場合について説明したが、これに限ら
ず、正方形状であってもよい。ただし、この場合、図３
に示すように、下側と右側の間隔Ｄ１を０．３〜０．５
ｍｍ程度とし、残りの２つの間隔Ｄ２を０．２ｍｍ程度
またはそれ以下とする。そして、２つの間隔Ｄ１の部分
に封止材を塗布すると、この塗布された封止材を残りの
２つの間隔Ｄ２の部分において保護膜５の開口部６の縁
部までまたはその外側まで到達させることができる。ま
た、半導体装置１がボンディングされる基板は、フィル
ム基板に限らず、フェノール樹脂やセラミック等の硬質
基板、又はガラス基板等を用いるChip onBoardやChip o
n Glass等の手法にも適用可能である。In the above embodiment, the case where the semiconductor device 1 has a rectangular shape has been described, but the present invention is not limited to this, and the semiconductor device 1 may have a square shape. However, in this case, FIG.
As shown in, the distance D 1 between the lower side and the right side is 0.3 to 0.5.
The remaining two distances D 2 are about 0.2 mm or less. When the sealing material is applied to the two spaces D 1 , the applied sealing material is applied to the edge of the opening 6 of the protective film 5 or the outside thereof in the remaining two distances D 2. Can be reached. The substrate to which the semiconductor device 1 is bonded is not limited to a film substrate, but a chip on board or a chip substrate using a hard substrate such as phenol resin or ceramic, or a glass substrate.
It can also be applied to methods such as n Glass.
【００１２】[0012]
【発明の効果】以上説明したように、この発明によれ
ば、半導体装置の外面と保護膜の開口部の縁部との間隔
を、封止材の塗布側において、他の側よりも大きくなし
ているので、間隔の小さい部分における保護膜の開口部
の縁部まで、半導体装置と回路基板との間を浸透してき
た封止材を到達させることができ、ひいては封止材塗布
作業を簡単とすることができる。As described above, according to the present invention, the gap between the outer surface of the semiconductor device and the edge of the opening of the protective film is set larger on the sealant application side than on the other side. Therefore, the sealing material that has permeated between the semiconductor device and the circuit board can reach the edge of the opening of the protective film in the portion with a small gap, which simplifies the sealing material application work. can do.
【図１】この発明の一実施形態における半導体装置の接
合構造の封止前の状態の一部の平面図。FIG. 1 is a plan view of a part of a junction structure of a semiconductor device in a state before sealing according to an embodiment of the present invention.
【図２】図１のＸ−Ｘ線に沿う部分に相当する封止後の
状態の断面図。FIG. 2 is a sectional view of a state after sealing corresponding to a portion along line XX in FIG.
【図３】この発明の他の実施形態における半導体装置の
接合構造の封止前の状態の一部の平面図。FIG. 3 is a partial plan view of a junction structure of a semiconductor device in another embodiment of the present invention before sealing.
【図４】従来の半導体装置の接合構造の一例の封止前の
状態の一部の平面図。FIG. 4 is a partial plan view of an example of a conventional junction structure of a semiconductor device before sealing.
【図５】図４のＸ−Ｘ線に沿う部分に相当する封止後の
状態の断面図。5 is a cross-sectional view of a state after sealing corresponding to a portion along line XX in FIG.
１ 半導体装置 ２ バンプ電極 ３ フィルム基板 ４ 接続端子 ５ 保護膜 ６ 開口部 ７ 封止材 1 Semiconductor device 2 bump electrodes 3 film substrate 4 connection terminals 5 protective film 6 openings 7 Sealant
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/28 H01L 21/56 H01L 21/60 311 ─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. 7 , DB name) H01L 23/28 H01L 21/56 H01L 21/60 311
Claims (2)
た接続端子と半導体装置に設けられたバンプ電極を接合
し、前記保護膜の開口部内を封止材にて封止する半導体
装置の接合構造において、前記半導体装置は長方形状で
あり、前記半導体装置の一の長辺側のみを前記封止材が
塗布される辺側となし、前記半導体装置の外面と前記保
護膜の開口部の縁部との間隔を、前記封止材が塗布され
る辺側で常に他の辺側よりも大きくなしたことを特徴と
する半導体装置の接合構造。1. A semiconductor in which a connection terminal extending inside a protective film provided on a substrate and a bump electrode provided in a semiconductor device are joined and the inside of the opening of the protective film is sealed with a sealing material. In the device junction structure, the semiconductor device has a rectangular shape.
The sealing material is provided only on one long side of the semiconductor device.
No side to be applied, and the distance between the outer surface of the semiconductor device and the edge of the opening of the protective film is always larger on the side to which the sealing material is applied than on the other sides. And a junction structure of a semiconductor device.
つの間隔のうち他の間隔よりも小さくなっている間隔は
０．２ｍｍ以下であり、前記他の間隔は０．３〜０．５
ｍｍ程度であることを特徴とする半導体装置の接合構
造。2. The invention according to claim 1 , wherein the
The spacing smaller than the other spacing is 0.2 mm or less, and the other spacing is 0.3 to 0.5.
A bonding structure for a semiconductor device, which is about mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000008763A JP3520976B2 (en) | 2000-01-18 | 2000-01-18 | Bonding structure of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000008763A JP3520976B2 (en) | 2000-01-18 | 2000-01-18 | Bonding structure of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001203302A JP2001203302A (en) | 2001-07-27 |
| JP3520976B2 true JP3520976B2 (en) | 2004-04-19 |
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| Application Number | Title | Priority Date | Filing Date |
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| JP2000008763A Expired - Fee Related JP3520976B2 (en) | 2000-01-18 | 2000-01-18 | Bonding structure of semiconductor device |
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Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050178498A1 (en) * | 2004-02-18 | 2005-08-18 | Au Optronics Corporation | Method for sealing electroluminescence display devices |
| JP4502204B2 (en) * | 2005-03-22 | 2010-07-14 | ルネサスエレクトロニクス株式会社 | Semiconductor device |
| US7872356B2 (en) * | 2007-05-16 | 2011-01-18 | Qualcomm Incorporated | Die stacking system and method |
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| JP2001203302A (en) | 2001-07-27 |
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