JP3419642B2 - Power module - Google Patents
Power moduleInfo
- Publication number
- JP3419642B2 JP3419642B2 JP2512297A JP2512297A JP3419642B2 JP 3419642 B2 JP3419642 B2 JP 3419642B2 JP 2512297 A JP2512297 A JP 2512297A JP 2512297 A JP2512297 A JP 2512297A JP 3419642 B2 JP3419642 B2 JP 3419642B2
- Authority
- JP
- Japan
- Prior art keywords
- power module
- semiconductor chip
- heat
- metal
- sintered body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、高発熱性の半導体
チップ等の電子部品を搭載するに際し、高い信頼性、放
熱性を要するパワーモジュールに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power module that requires high reliability and heat dissipation when mounting an electronic component such as a semiconductor chip having a high heat generating property.
【０００２】[0002]
【従来の技術】従来からパワーモジュールの構成部品と
して、アルミナ（Ａｌ2Ｏ3）、窒化アルミニウム（Ａｌ
Ｎ）、酸化ベリリウム（ＢｅＯ）などのセラミックス焼
結体を基板とし、その表面に導電層として銅（Ｃｕ）等
の回路板を一体に接合した回路基板が広く使用されてい
る。2. Description of the Related Art Alumina (Al 2 O 3 ) and aluminum nitride (Al
N), beryllium oxide (BeO), and other ceramics sintered bodies are used as substrates, and circuit boards in which a circuit board made of copper (Cu) or the like is integrally bonded to the surface thereof as a conductive layer are widely used.
【０００３】アルミナ焼結体を用いた回路基板は、熱伝
導性および電気伝導性に優れたＣｕ等の金属により回路
板を形成しているため、回路動作の遅延が少ないととも
に回路配線の寿命も永く、半田等の接合材料に対する濡
れ性が良く、セラミックス焼結体表面に半導体チップ
（ＩＣ素子）や電極板を高い接合強さで接合することが
でき、その結果、半導体チップから発生する熱の放散性
や半導体チップの動作信頼性を良好に保つことができ、
更にセラミックス基板の裏面にもＣｕ等の金属板を接合
することにより、セラミックス基板の応力緩和および熱
変形防止の目的をも達成できるという利点を有してい
る。A circuit board using an alumina sintered body has a circuit board made of a metal such as Cu having excellent thermal conductivity and electrical conductivity, so that the circuit operation is delayed little and the circuit wiring has a long life. For a long time, it has good wettability with a bonding material such as solder, and can bond a semiconductor chip (IC element) or an electrode plate to the surface of a ceramic sintered body with high bonding strength. As a result, the heat generated from the semiconductor chip It is possible to maintain good radiation performance and semiconductor chip operation reliability.
Further, by bonding a metal plate such as Cu to the back surface of the ceramic substrate, there is an advantage that the purpose of stress relaxation and thermal deformation prevention of the ceramic substrate can be achieved.
【０００４】しかしながら、半導体チップ端部と金属回
路端部との距離は、１〜２ｍｍと小さい場合が多く、セ
ラミックス基板の熱伝導率が小さいと熱放散性が不十分
となり、その結果熱抵抗が大きくなるために、半導体チ
ップの高出力化に対応できない問題があった。However, the distance between the end of the semiconductor chip and the end of the metal circuit is often as small as 1 to 2 mm, and if the thermal conductivity of the ceramic substrate is small, the heat dissipation becomes insufficient, resulting in a thermal resistance. Since the size of the semiconductor chip becomes large, there is a problem that it cannot cope with the high output of the semiconductor chip.
【０００５】上記理由から、熱伝導率の高いセラミック
焼結体を基板に用いることが注目を惹き、窒化アルミニ
ウム焼結体を用いたり、従来のアルミナ等のセラミック
焼結体の熱伝導率向上が図られたりしている。窒化アル
ミニウム等のセラミックス基板では、高い放熱性を得る
ために熱伝導率を大きくしようとすると、セラミックス
基板の不純物を低減させると共に、結晶粒界を少なく
し、結晶粒子の大きさを大きくする必要があるが、結晶
粒界を少なくして結晶粒子を大きくすると、セラミック
ス基板の強さが低下する問題がある。For the above reasons, it has attracted attention to use a ceramic sintered body having a high thermal conductivity for the substrate, and it is possible to improve the thermal conductivity of an aluminum nitride sintered body or a conventional ceramic sintered body such as alumina. It is planned. In a ceramic substrate such as aluminum nitride, if it is attempted to increase the thermal conductivity in order to obtain high heat dissipation, it is necessary to reduce impurities in the ceramic substrate, reduce grain boundaries, and increase the size of crystal grains. However, if the crystal grain boundaries are reduced and the crystal grains are increased, there is a problem in that the strength of the ceramic substrate decreases.
【０００６】特に、セラミックス基板に窒化アルミニウ
ムを用いた窒化アルミニウム回路基板においては、ヒー
トショックやヒートサイクルなどの熱衝撃や熱履歴によ
って生じる損傷に対して十分な耐久性をもたせるため、
Ｃｕ回路と窒化アルミニウム基板との間に介在させる接
合層の厚みを例えば２０μｍ以上に厚くする例が報告さ
れている（特開平６−１９６８２８号公報参照）。しか
しながら、接合層の厚みを厚くすると後工程での不要な
ろう材の除去が困難となること、熱抵抗が大きくなるな
どの問題がある。In particular, in an aluminum nitride circuit board using aluminum nitride as a ceramics board, in order to have sufficient durability against damage caused by thermal shock or heat history such as heat shock or heat cycle,
An example has been reported in which the thickness of the bonding layer interposed between the Cu circuit and the aluminum nitride substrate is increased to, for example, 20 μm or more (see Japanese Patent Laid-Open No. 6-196828). However, when the thickness of the bonding layer is increased, there are problems that it becomes difficult to remove an unnecessary brazing material in a later step and heat resistance increases.
【０００７】[0007]
【発明が解決しようとする課題】本発明は、上記の状況
に鑑みてなされたものである。本発明者らは、上記課題
を解決するべくいろいろ検討し、パワーモジュール上の
半導体チップと金属回路とを特定な配置関係にするとき
に、熱伝導率や機械的強さのさほど大きくないセラミッ
クス基板を用いても、ヒートショックやヒートサイクル
などの熱衝撃や熱履歴によって生じる損傷に対して十分
な耐久性を有し、熱伝導率の大きいセラミックス基板を
用いた場合と同様の熱抵抗を持ち熱放散性に優れるパワ
ーモジュールが得られるという知見を得て、本発明に至
ったものである。SUMMARY OF THE INVENTION The present invention has been made in view of the above situation. The present inventors have conducted various studies to solve the above problems, and when a semiconductor chip and a metal circuit on a power module are placed in a specific arrangement relationship, a ceramic substrate having a thermal conductivity and a mechanical strength that are not so large. Even if it is used, it has sufficient durability against damage caused by heat shock and heat history such as heat shock and heat cycle, and has the same thermal resistance as when using a ceramic substrate with high thermal conductivity The present invention has been achieved based on the finding that a power module excellent in radiation performance can be obtained.
【０００８】即ち、本発明の目的は、ヒートショックや
ヒートサイクルなどの熱衝撃や熱履歴によって生じる損
傷に対して十分な耐久性を有し、しかも熱放散性に優
れ、セラミックス基板の破損等に原因する絶縁破壊等の
絶縁不良などが発生しがたい高信頼性のパワーモジュー
ルを提供することにある。That is, the object of the present invention is to have sufficient durability against damage caused by heat shock or heat history such as heat shock or heat cycle, and also have excellent heat dissipation, and to prevent damage to the ceramic substrate. An object of the present invention is to provide a highly reliable power module in which insulation failure such as insulation breakdown is unlikely to occur.
【０００９】[0009]
【課題を解決するための手段】本発明は、セラミックス
基板の少なくとも一主面上に金属回路を設け、該金属回
路上に半導体チップが配置されてなるパワーモジュール
であって、該パワーモジュールを基板に対して垂直の方
向より眺め、前記半導体チップの重心から任意の方向に
半直線Ｌを引き、該半直線Ｌ上で半導体チップの端部と
金属回路端部との距離をＤ、半導体チップの重心から端
部までの距離をＷとするとき、Ｄ≧Ｗである半直線が少
なくとも１本以上存在するように前記半導体チップを配
置していることを特徴とするパワーモジュールである。The present invention is a power module in which a metal circuit is provided on at least one main surface of a ceramic substrate, and a semiconductor chip is disposed on the metal circuit. When viewed from a direction perpendicular to the half-line L, a half-line L is drawn in an arbitrary direction from the center of gravity of the semiconductor chip, and the distance between the end of the semiconductor chip and the metal circuit end is D on the half-line L. The power module is characterized in that the semiconductor chip is arranged such that at least one half line satisfying D ≧ W exists when the distance from the center of gravity to the end is W.
【００１０】また、好ましくは、Ｄ≧Ｗである半直線が
２本以上存在するように前記半導体チップを配置してな
ることを特徴とするパワーモジュールであり、更に好ま
しくは、全ての方向でＤ≧Ｗである半直線が存在するよ
うに前記半導体チップを配置してなることを特徴とする
パワーモジュールである。A power module is preferably characterized in that the semiconductor chips are arranged so that two or more half lines satisfying D ≧ W are present, and more preferably D in all directions. In the power module, the semiconductor chips are arranged so that a half line of ≧ W exists.
【００１１】更に、本発明は、セラミックス基板が窒化
アルミニウム焼結体又は窒化珪素焼結体からなることを
特徴とするパワーモジュールである。Further, the present invention is a power module characterized in that the ceramic substrate is made of an aluminum nitride sintered body or a silicon nitride sintered body.
【００１２】[0012]
【発明の実施の形態】以下、本発明について図をもって
詳しく説明する。図１は、本発明のパワーモジュールの
一例を示す図で、（ａ）は平面図、（ｂ）は（ａ）中の
点線Ａ−Ａ’部分での断面図である。本発明において、
半導体チップの重心Ｇから任意の方向に引いた半直線Ｌ
上で半導体チップの端部と金属回路端部との距離をＤ、
半導体チップの重心Ｇから該半導体の端部までの距離を
Ｗとするときに、Ｄ≧Ｗである半直線が少なくとも１本
以上存在するように半導体チップを金属回路上に配置す
ることが重要であり、本発明者らの検討によれば、前記
条件を満たすときにのみ本発明の目的を達成するパワー
モジュールを得ることができる。BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in detail below with reference to the drawings. 1A and 1B are views showing an example of a power module of the present invention, FIG. 1A is a plan view, and FIG. 1B is a sectional view taken along the dotted line AA ′ in FIG. In the present invention,
Half line L drawn from the center of gravity G of the semiconductor chip in any direction
The distance between the end of the semiconductor chip and the end of the metal circuit is D,
When the distance from the center of gravity G of the semiconductor chip to the end of the semiconductor is W, it is important to arrange the semiconductor chip on the metal circuit so that at least one half line with D ≧ W exists. Therefore, according to the study by the present inventors, it is possible to obtain a power module that achieves the object of the present invention only when the above condition is satisfied.
【００１３】この理由に付いては明かではないが、Ｄが
Ｗを下回ると金属回路の横方向への熱の流れが抑制さ
れ、放熱性が低下するためと考えられる。従って、前記
条件を満足するような半直線の数が多ければ多いほど放
熱効果が期待されるが、発明者らの検討結果では、２本
以上でその効果が顕著であり、全ての方向でＤ≧Ｗであ
る半直線が存在するように配置するときに最も放熱効果
が期待され、本発明の目的を達成するのに好適である。
特に、前記配置のしかたは、半導体チップが高出力にな
る場合に有効であり、半導体チップの発熱量が２００Ｗ
を越える場合に特に有効である。The reason for this is not clear, but it is considered that when D is less than W, the flow of heat in the lateral direction of the metal circuit is suppressed, and the heat dissipation is deteriorated. Therefore, the greater the number of half-lines satisfying the above condition, the more the heat-dissipating effect is expected. However, according to the results of the study conducted by the inventors, the effect is remarkable with two or more lines, and D is effective in all directions. The heat radiation effect is expected most when the arrangement is such that there exists a half line of ≧ W, which is suitable for achieving the object of the present invention.
In particular, the above arrangement is effective when the semiconductor chip has a high output, and the heat generation amount of the semiconductor chip is 200 W.
It is especially effective when it exceeds.
【００１４】半導体チップが複数個搭載するパワーモジ
ュールについては、最も大きな発熱量を呈する半導体チ
ップの金属回路上の配置が前記条件を満足すれば良い
が、その使用状況に応じて複数の半導体チップが前記条
件を満足するように配置すれば良いし、勿論全数の半導
体チップについて前記条件を満足する配置とすれば一層
良い。特に、発熱量が２００Ｗを越える半導体チップを
２つ以上搭載する場合には、その何れのチップについて
も上記配置構造を満足することがことさらに望ましい。In the case of a power module having a plurality of semiconductor chips mounted therein, the arrangement of the semiconductor chips exhibiting the largest heat generation on the metal circuit may satisfy the above conditions. It is only necessary to dispose so as to satisfy the above conditions, and it is more preferable to dispose so as to satisfy the above conditions for all semiconductor chips. In particular, when mounting two or more semiconductor chips that generate more than 200 W of heat, it is more desirable to satisfy the above arrangement structure for any of the chips.
【００１５】なお、一つの金属回路上に複数の半導体チ
ップを搭載する場合、個々の半導体チップの充分な放熱
性を確保するためには、半導体チップ相互の間隔は、例
えば２個の隣り合う半導体チップ各々の重心から当該半
導体の端部までの距離をそれぞれＷa、Ｗbとすると、
（Ｗa＋Ｗb）以上になるように配置すれば良い。即ち、
（Ｗa＋Ｗb）を前記Ｄと読み代えて配置すれば良い。When mounting a plurality of semiconductor chips on one metal circuit, in order to ensure sufficient heat dissipation of each semiconductor chip, the intervals between the semiconductor chips are, for example, two adjacent semiconductor chips. If the distances from the center of gravity of each chip to the edge of the semiconductor are Wa and Wb, respectively,
It may be arranged such that (Wa + Wb) or more. That is,
(Wa + Wb) may be replaced by the above D.
【００１６】本発明のセラミックス焼結体としては、ア
ルミナ、ムライト、窒化珪素、窒化アルミニウム、酸化
ベリリウムなどの電気絶縁性で耐熱性に優れる材料であ
ればいずれを用いても良く、その材料特性についても特
に制限はない。しかし、良好な放熱性を示すためには熱
伝導率が６０Ｗ／ｍＫ以上のものが好適であるし、回路
基板形成後の強さを確保するためには３５０ＭＰａ以上
の曲げ強さを有するセラミックス焼結体が好適である。As the ceramic sintered body of the present invention, any material having excellent electrical insulation and heat resistance such as alumina, mullite, silicon nitride, aluminum nitride, and beryllium oxide may be used. There is no particular limitation. However, a material having a thermal conductivity of 60 W / mK or more is suitable for exhibiting a good heat dissipation property, and a ceramic fired body having a bending strength of 350 MPa or more is ensured in order to secure the strength after forming the circuit board. Consolidation is preferred.
【００１７】これらセラミックス焼結体のうち、窒化ア
ルミニウム焼結体は熱伝導率が高いので、高出力パワー
モジュールに用いて有効であり、窒化珪素焼結体は熱伝
導率はやや小さいものの曲げ強さが大きいので有効であ
る。とりわけ、窒化珪素焼結体は窒化アルミニウム焼結
体を初めとするセラミックス焼結体に比べて熱膨張率が
小さいので、得られるパワーモジュールは熱衝撃に対す
る抵抗が強く一層信頼性に優れるので、好適である。Among these ceramics sintered bodies, the aluminum nitride sintered body has a high thermal conductivity and is therefore effective for use in a high output power module. The silicon nitride sintered body has a slightly low thermal conductivity, but has a high bending strength. It is effective because of its large size. In particular, since the silicon nitride sintered body has a smaller coefficient of thermal expansion than the ceramic sintered body such as the aluminum nitride sintered body, the power module obtained has high resistance to thermal shock and is further excellent in reliability. Is.
【００１８】本発明の接合層としては、ろう材ペースト
を用いて形成されたものが一般的である。前記ろう材ペ
ーストは、例えば金属回路板又は金属放熱板の材質がＣ
ｕである場合、ＡｇもしくはＡｇとＣｕを含むろう材で
あり、好ましくはＴｉ、Ｚｒ、Ｈｆ等の活性金属を含む
前記ろう材である。The joining layer of the present invention is generally formed by using a brazing paste. The brazing material paste is, for example, a metal circuit board or a metal radiator plate made of C
When it is u, it is a brazing material containing Ag or Ag and Cu, and preferably the brazing material containing an active metal such as Ti, Zr or Hf.
【００１９】セラミックス基板に形成される金属回路板
と金属放熱板の材質については、銅、ニッケル、アルミ
ニウム、モリブデン、タングステン等の金属もしくは前
記金属を主成分とする合金を用いる事が出来る。As a material for the metal circuit board and the metal heat dissipation plate formed on the ceramic substrate, a metal such as copper, nickel, aluminum, molybdenum, or tungsten, or an alloy containing the metal as a main component can be used.
【００２０】本発明のパワーモジュールの製造方法につ
いて一例をもって説明する。先ず、セラミックス基板
（最大表面粗さ１０μｍ以下程度に加工した焼結体）の
表面全体にＡｇとＣｕ及び活性金属としてＴｉを含むろ
う材ペーストを塗布し、次いでそのペースト面を覆うに
十分な広さのベタ金属板（Ｃｕ）を接触配置する。ベタ
金属板の配置されたセラミックス基板を熱処理して両者
の接合体を製造する。An example of the method of manufacturing the power module of the present invention will be described. First, a brazing material paste containing Ag, Cu and Ti as an active metal is applied to the entire surface of a ceramics substrate (sintered body processed to have a maximum surface roughness of about 10 μm or less), and then spread sufficiently to cover the paste surface. A solid metal plate (Cu) is placed in contact. The ceramics substrate on which the solid metal plate is arranged is heat-treated to manufacture a joined body of both.
【００２１】このようにして製造された接合体の金属板
上にエッチングレジストを用いて回路パターンをスクリ
ーン印刷し、レジスト回路パターンを形成させる。この
ときの回路パターン構造は本請求項１及び／又は２に従
う。A circuit pattern is screen-printed on the metal plate of the bonded body thus manufactured by using an etching resist to form a resist circuit pattern. The circuit pattern structure at this time complies with claim 1 and / or 2.
【００２２】次いで、エッチング処理してパターン外の
不要な金属やろう材等を除去した後、エッチングレジス
ト膜を除去して金属回路を有するセラミックス回路基板
とする。その後、金属回路の酸化と腐食を防止するた
め、必要に応じてＮｉメッキ等により選択的に金属回路
上に保護膜を形成する。Next, after etching processing to remove unnecessary metal and brazing material outside the pattern, the etching resist film is removed to obtain a ceramic circuit board having a metal circuit. Thereafter, in order to prevent oxidation and corrosion of the metal circuit, a protective film is selectively formed on the metal circuit by Ni plating or the like, if necessary.
【００２３】次に、半田レジストを付けたヒートシンク
にクリーム半田を塗布し、先の回路基板を載せて加熱し
接合する。更に、クリーム半田を塗った半導体チップを
所定の位置に置き、熱処理を行い接合した後、半導体チ
ップにリードワイヤーを接合する。電極を埋め込んだ樹
脂ケースの電極にクリーム半田を塗布してヒートシンク
にかぶせ、熱処理を行い接合する。最後に樹脂封止を行
いパワーモジュールとする。Next, cream solder is applied to a heat sink provided with a solder resist, and the above-mentioned circuit board is placed and heated to bond them. Further, the semiconductor chip coated with cream solder is placed at a predetermined position, heat-treated and bonded, and then a lead wire is bonded to the semiconductor chip. Cream solder is applied to the electrodes of the resin case in which the electrodes are embedded, and the electrodes are covered with a heat sink and heat-treated for bonding. Finally, resin sealing is performed to obtain a power module.
【００２４】以下、実施例に基づいて、本発明を更に詳
細に説明する。The present invention will be described in more detail based on the following examples.
【００２５】[0025]
〔実施例１〜４、比較例１、２〕熱伝導率１３０Ｗ／ｍ
Ｋ、厚み０．６３５ｍｍで大きさ５０×６０ｍｍの窒化
アルミニウム焼結体の両面にスクリーン印刷法により活
性金属（Ｔｉ）含有のＡｇ−Ｃｕ系ろう材ペーストを塗
布し乾燥した後、厚さ０．３ｍｍの金属回路用Ｃｕ板と
厚さ０．１５ｍｍの金属放熱用Ｃｕ板を接触配置させ、
真空中８３０℃で３０分間熱処理を行い窒化アルミニウ
ム基板とＣｕ板の接合体を得た。[Examples 1 to 4, Comparative Examples 1 and 2] Thermal conductivity 130 W / m
K, a thickness of 0.65 mm, and an aluminum nitride sintered body having a size of 50 × 60 mm, the active metal (Ti) -containing Ag—Cu-based brazing material paste was applied to both surfaces by a screen printing method, and was dried. A 3 mm Cu plate for metal circuits and a 0.15 mm thick Cu plate for metal heat dissipation are placed in contact with each other,
Heat treatment was performed in vacuum at 830 ° C. for 30 minutes to obtain a joined body of the aluminum nitride substrate and the Cu plate.
【００２６】前記接合体のＣｕ板上に紫外線硬化型エッ
チングレジストをスクリーン印刷法により回路パターン
を印刷し硬化させた。この時の回路パターンは、２４×
４２ｍｍ、３２×４２ｍｍ或いは２４×３０ｍｍとし
た。この後、塩化第２鉄溶液でパターン以外の不要なＣ
ｕを除去した。次いで、フッ化水素アンモニウムと過酸
化水素を含む水溶液で、Ｃｕ回路パターン間の不要ろう
材を除去した後、レジストを除去した。更に、無電解Ｎ
ｉメッキによりＣｕ回路の所定位置に選択的にＮｉ保護
膜を形成させた。An ultraviolet-curable etching resist was printed on the Cu plate of the above-mentioned bonded body by a screen printing method and cured. The circuit pattern at this time is 24 ×
It was 42 mm, 32 × 42 mm or 24 × 30 mm. After that, with the ferric chloride solution, unnecessary C except for the pattern is added.
u was removed. Then, after removing the unnecessary brazing material between the Cu circuit patterns with an aqueous solution containing ammonium hydrogen fluoride and hydrogen peroxide, the resist was removed. Furthermore, electroless N
A Ni protective film was selectively formed at a predetermined position on the Cu circuit by i plating.
【００２７】上記操作に従い、表１の実施例１、２及び
比較例１に示す窒化アルミニウム回路基板を完成させ
た。実施例３、４及び比較例２の試料については、セラ
ミックス基板として熱伝導率７０Ｗ／ｍＫ、厚み０．３
５ｍｍで大きさの６０×５０ｍｍの窒化珪素焼結体を用
いた以外は上記に示す方法で試料を得た。According to the above operation, the aluminum nitride circuit boards shown in Examples 1 and 2 of Table 1 and Comparative Example 1 were completed. For the samples of Examples 3 and 4 and Comparative Example 2, the ceramic substrate had a thermal conductivity of 70 W / mK and a thickness of 0.3.
A sample was obtained by the method described above except that a silicon nitride sintered body having a size of 5 mm and a size of 60 × 50 mm was used.
【００２８】これらの回路基板の金属回路の中央表面に
は底面積１６×２０ｍｍのトランジスタを発熱源として
装着し、裏面には厚み２．５ｍｍのＣｕ板をヒートシン
クとしてハンダ付けしてパワーモジュールを作製した。
この時、トランジスタの位置は、トランジスタの重心か
ら任意の方向に引いた半直線Ｌのうちトランジスタ端部
と金属回路端部との距離Ｄがトランジスタの重心からト
ランジスタの端部までの距離Ｗに比べて最も大きい半直
線（即ちＤ／Ｗが最大の半直線、複数有る場合には任意
の一本を選択する）を半直線Ｌ1とし、半時計方向に９
０度（半直線Ｌ2）、１８０度（半直線Ｌ1’）、２７０
度（半直線Ｌ2’）の角をなす半直線を引き、半直線Ｌ1
上のＤ（Ｄ1）及びＷ（Ｗ1）と半直線Ｌ1’上のＤ（Ｄ
1’）及びＷ（Ｗ1’）において、Ｄ1＝Ｄ1’、Ｗ1＝Ｗ
1’になるように配置し、同様にＤ2＝Ｄ2’、Ｗ2＝Ｗ
2’になるように配置した。作成したモジュールの熱抵
抗を測定した結果を表１に示す。A transistor having a bottom area of 16 × 20 mm is mounted as a heat source on the center surface of the metal circuit of these circuit boards, and a Cu plate having a thickness of 2.5 mm is soldered on the back surface as a heat sink to manufacture a power module. did.
At this time, the position of the transistor is such that the distance D between the transistor end and the metal circuit end of the half line L drawn from the center of gravity of the transistor in an arbitrary direction is compared with the distance W from the center of gravity of the transistor to the end of the transistor. The largest half-line (that is, the half-line having the largest D / W, and if there are multiple D / W, select an arbitrary one) as the half-line L1, and the counterclockwise direction is 9
0 degree (half line L2), 180 degree (half line L1 '), 270
Draw a half line that forms an angle of degrees (half line L2 ') and
D (D1) and W (W1) above and D (D
1 ') and W (W1'), D1 = D1 ', W1 = W
Arrange so as to be 1 ', similarly D2 = D2', W2 = W
Arranged to be 2 '. Table 1 shows the results of measuring the thermal resistance of the prepared module.
【００２９】[0029]
【表１】 [Table 1]
【００３０】表１に示す結果から明らかなように、実施
例１〜４に係るパワーモジュールは、放熱性に優れ、高
い信頼性を有する。また、実施例１と２を比較すると実
施例２の方が放熱性が優れていることが明らかである。
また、実施例３と４を比較すると実施例４の方が放熱性
が優れている。一方、比較例１及び２に係る回路基板を
用いたパワーモジュールは、充分な放熱性が得られない
ため、半導体の高集積化、高出力化に対応できない。As is clear from the results shown in Table 1, the power modules according to Examples 1 to 4 are excellent in heat dissipation and have high reliability. In addition, comparing Examples 1 and 2, it is clear that Example 2 has better heat dissipation.
Further, comparing Examples 3 and 4, Example 4 is superior in heat dissipation. On the other hand, the power modules using the circuit boards according to Comparative Examples 1 and 2 cannot obtain sufficient heat dissipation, and thus cannot cope with high integration and high output of semiconductors.
【００３１】[0031]
【発明の効果】本発明によれば、ことさらに熱伝導率の
高いセラミック基板を用いる必要がなく、ヒートショッ
クやヒートサイクルなどの熱衝撃、熱履歴によって生じ
る損傷に対して十分な耐久性を有し、しかも熱放散性に
優れ、セラミックス基板の破損等に原因する絶縁破壊等
の絶縁不良などが発生しがたい高信頼性のパワーモジュ
ールを容易に提供できる。EFFECTS OF THE INVENTION According to the present invention, it is not necessary to use a ceramic substrate having a particularly high thermal conductivity, and it has sufficient durability against damage caused by thermal shock such as heat shock or heat cycle and thermal history. Moreover, it is possible to easily provide a highly reliable power module which has excellent heat dissipation and is less likely to cause insulation failure such as insulation breakdown caused by damage to the ceramic substrate.
【図１】本発明のパワーモジュールの一例を示す図で、
（ａ）が平面図、（ｂ）が（ａ）中のＡ−Ａ’での断面
図。FIG. 1 is a diagram showing an example of a power module of the present invention,
(A) is a plan view and (b) is a cross-sectional view taken along line AA ′ in (a).
１：半導体チップ ２：半田 ３：金属板 ４：セラミックス基板 ５：ヒートシンク ６：封止樹脂 Ｌ：半導体チップの重心を通る半直線の一例 Ｄ：半導体チップ端部と金属回路端部との距離 Ｗ：半導体チップの重心から端部までの距離 Ｇ：半導体チップの重心 1: Semiconductor chip 2: Solder 3: Metal plate 4: Ceramic substrate 5: Heat sink 6: sealing resin L: An example of a half line passing through the center of gravity of the semiconductor chip D: Distance between end of semiconductor chip and end of metal circuit W: Distance from center of gravity of semiconductor chip to edge G: Center of gravity of semiconductor chip
Claims (4)
に金属回路を設け、該金属回路上に半導体チップを配置
してなるパワーモジュールであって、該パワーモジュー
ルを基板に対して垂直の方向より眺め、前記半導体チッ
プの重心から任意の方向に半直線を引き、該半直線上で
半導体チップの端部と金属回路端部との距離をＤ、半導
体チップの重心から端部までの距離をＷとするとき、Ｄ
≧Ｗである半直線が少なくとも１本以上存在するように
前記半導体チップを配置してなることを特徴とするパワ
ーモジュール。1. A power module in which a metal circuit is provided on at least one main surface of a ceramics substrate, and a semiconductor chip is arranged on the metal circuit. The power module is viewed from a direction perpendicular to the substrate. , A half line is drawn in an arbitrary direction from the center of gravity of the semiconductor chip, the distance between the end of the semiconductor chip and the end of the metal circuit on the half line is D, and the distance from the center of gravity of the semiconductor chip to the end is W. When you do, D
A power module, wherein the semiconductor chips are arranged so that at least one half line satisfying ≧ W exists.
ように前記半導体チップを配置してなることを特徴とす
る請求項１記載のパワーモジュール。2. The power module according to claim 1, wherein the semiconductor chips are arranged so that two or more half lines satisfying D ≧ W are present.
するように前記半導体チップを配置してなることを特徴
とする請求項１記載のパワーモジュール。3. The power module according to claim 1, wherein the semiconductor chip is arranged so that a half line satisfying D ≧ W exists in all directions.
結体又は窒化珪素焼結体からなることを特徴とする請求
項１、請求項２または請求項３記載のパワーモジュー
ル。4. The power module according to claim 1, wherein the ceramic substrate is made of an aluminum nitride sintered body or a silicon nitride sintered body.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2512297A JP3419642B2 (en) | 1997-02-07 | 1997-02-07 | Power module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2512297A JP3419642B2 (en) | 1997-02-07 | 1997-02-07 | Power module |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10223809A JPH10223809A (en) | 1998-08-21 |
| JP3419642B2 true JP3419642B2 (en) | 2003-06-23 |
Family
ID=12157144
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2512297A Expired - Fee Related JP3419642B2 (en) | 1997-02-07 | 1997-02-07 | Power module |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3419642B2 (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106488648A (en) * | 2016-09-26 | 2017-03-08 | 广东小天才科技有限公司 | A kind of circuit board cooling structure and electronic equipment |
| WO2020105734A1 (en) | 2018-11-22 | 2020-05-28 | デンカ株式会社 | Ceramic-copper composite, method for producing ceramic-copper composite, ceramic circuit board, and power module |
| JP7212700B2 (en) | 2018-12-28 | 2023-01-25 | デンカ株式会社 | CERAMIC-COPPER COMPOSITE, CERAMIC CIRCUIT BOARD, POWER MODULE, AND CERAMIC-COPPER COMPOSITE MANUFACTURING METHOD |
| WO2020203787A1 (en) | 2019-03-29 | 2020-10-08 | デンカ株式会社 | Silicon nitride substrate, silicon nitride-metal complex, silicon nitride circuit board, and semiconductor package |
-
1997
- 1997-02-07 JP JP2512297A patent/JP3419642B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH10223809A (en) | 1998-08-21 |
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