JP3070272B2 - Electronic circuit device - Google Patents
Electronic circuit deviceInfo
- Publication number
- JP3070272B2 JP3070272B2 JP4198498A JP19849892A JP3070272B2 JP 3070272 B2 JP3070272 B2 JP 3070272B2 JP 4198498 A JP4198498 A JP 4198498A JP 19849892 A JP19849892 A JP 19849892A JP 3070272 B2 JP3070272 B2 JP 3070272B2
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- case
- circuit
- board
- resistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【０００１】[0001]
【産業上の利用分野】本発明は、電子回路装置に関し、
詳しくは樹脂封止ハイブリッドＩＣに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit device,
Specifically, the present invention relates to a resin-sealed hybrid IC.
【０００２】[0002]
【従来の技術】従来の樹脂パッケージ型ハイブリッドＩ
Ｃは、リード取り出し構造によりＳＩＰタイプ及びＤＩ
Ｐタイプに分類されるが、樹脂封止モールドの場合、金
型又はケースに回路基板を予め挿入しておき、注型法、
浸漬法、トランスファ法などにより液状又は粉体状の熱
硬化性樹脂（例えばエポキシ樹脂やシリコーン樹脂）を
用いて封止している。2. Description of the Related Art Conventional resin package type hybrid I
C is SIP type and DI depending on the lead extraction structure
Although it is classified into P type, in the case of resin molding, the circuit board is inserted in the mold or case in advance, and the casting method,
The liquid or powdered thermosetting resin (for example, epoxy resin or silicone resin) is used for sealing by an immersion method, a transfer method, or the like.
【０００３】ＳＩＰタイプのハイブリッドＩＣの一例を
図５に示す。ケース１ａ内に回路基板２ａが収容され、
回路基板２ａには厚膜抵抗器Ｒ１、Ｒ２などの厚膜回路
素子あるいはフリップチップＩＣ等の組付回路素子が固
定される。ここで、通常、厚みのある組付回路素子は基
板の一方の主面に集められて搭載される（図においてＡ
面）。３ａはモールド樹脂部であり、ケース１ａ内に充
填されて回路素子の防湿並びに回路基板の固定を行って
いる。９ａは抵抗器Ｒ１、Ｒ２を保護する保護ガラスで
ある。FIG. 5 shows an example of an SIP type hybrid IC. The circuit board 2a is accommodated in the case 1a,
Thick film circuit elements such as thick film resistors R1 and R2 or assembled circuit elements such as flip chip ICs are fixed to the circuit board 2a. Here, usually, a thick assembled circuit element is collected and mounted on one main surface of the substrate (A in the figure).
surface). Reference numeral 3a denotes a mold resin portion, which is filled in the case 1a to protect the circuit elements from moisture and fix the circuit board. 9a is a protective glass for protecting the resistors R1 and R2.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら上記した
従来の樹脂パッケージ型ハイブリッドＩＣでは、主とし
て封止樹脂硬化時の収縮やその後の加熱・冷却による樹
脂の膨張・収縮する過程で、封止樹脂部３ａと回路基板
２ａとの間の収縮率や熱膨張率の差により両者間に応力
が発生し、この応力が回路基板２ａに固定された抵抗器
Ｒ１、Ｒ２に作用し、その結果、この抵抗器Ｒ１、Ｒ２
の抵抗値が、受承する応力に応じて変化してしまう欠点
があった。However, in the above-mentioned conventional resin package type hybrid IC, the sealing resin portion 3a is mainly formed during the process of contracting when the sealing resin is hardened and expanding and contracting the resin by heating and cooling thereafter. Due to the difference between the contraction rate and the coefficient of thermal expansion between the circuit board 2a and the circuit board 2a, stress is generated between the two, and this stress acts on the resistors R1 and R2 fixed to the circuit board 2a. R1, R2
Has the drawback that the resistance value of the changes according to the stress received.
【０００５】本発明者らの試験、解析によれば、封止樹
脂部３ａの硬化時の収縮により回路基板２ａには圧縮応
力及び面直方向の曲げ応力が作用し、この曲げ応力によ
り抵抗器Ｒ１、Ｒ２に圧縮応力又は引張り応力が生じる
ことがわかった。上記曲げ応力は回路基板２ａ各部にお
いてばらつくので、回路基板２ａ上の固定位置によって
抵抗器Ｒ１、Ｒ２の抵抗値がばらつき、その結果、回路
の出力がばらつく。According to tests and analysis by the present inventors, compressive stress and bending stress in the direction perpendicular to the surface act on the circuit board 2a due to shrinkage of the sealing resin portion 3a during curing. It was found that a compressive stress or a tensile stress was generated in R1 and R2. Since the bending stress varies in each part of the circuit board 2a, the resistance values of the resistors R1 and R2 vary depending on the fixed position on the circuit board 2a, and as a result, the output of the circuit varies.
【０００６】以下、試験結果を図６〜図９に基づいて説
明する。試験用の回路基板２０は、図６に示すように、
縦、横、厚さが１３ｍｍ×４７．５ｍｍ×０．８ｍｍの
寸法を有し、台座９０で回路基板２０の長手方向の両端
部を支持した。厚膜抵抗器Ｒは回路基板２０の短辺２１
から１５．３ｍｍの位置に固定され、回路基板２０の長
手方向中央を回路基板２０の長手方向と直角に向けて押
圧した。回路基板２０に加えられる応力と回路基板２０
に固定された厚膜抵抗器Ｒの抵抗値変化との関係を図７
に示す。図７から、押圧力（曲げ応力）と抵抗値の変化
とはほぼ直線関係にあり、この押圧力による回路基板２
０の湾曲により、厚膜抵抗器Ｒに圧縮応力が生じる場合
には抵抗減少、厚膜抵抗器Ｒに引張り応力が生じる場合
には抵抗増加が生じることがわかった。Hereinafter, test results will be described with reference to FIGS. As shown in FIG. 6, the test circuit board 20
The vertical, horizontal, and thickness dimensions were 13 mm × 47.5 mm × 0.8 mm, and the pedestal 90 supported both ends of the circuit board 20 in the longitudinal direction. The thick film resistor R is connected to the short side 21 of the circuit board 20.
, And the center of the circuit board 20 in the longitudinal direction was pressed at right angles to the longitudinal direction of the circuit board 20. Stress applied to circuit board 20 and circuit board 20
7 shows the relationship with the change in the resistance value of the thick film resistor R fixed to FIG.
Shown in From FIG. 7, it can be seen that the pressing force (bending stress) and the change in the resistance value are substantially linear, and the circuit board 2
It has been found that a curvature of 0 causes a decrease in resistance when a compressive stress occurs in the thick-film resistor R, and an increase in resistance when a tensile stress occurs in the thick-film resistor R.
【０００７】次に、図６の回路基板２０における反り量
（変位量）と抵抗値変化量との関係を調べた。その結果
を図８に示す。ただし、反り量は回路基板中央部の最大
変位量とした。図８から、回路基板２０の変位量（反り
量）と抵抗値変化量とがほぼ直線関係にあることがわか
る。なお、回路基板２０の両短辺２１、２２を支持して
中央部を押圧した場合、回路基板２０の変形により回路
基板２０の長手方向各部に作用する圧縮あるいは引張り
応力は図９に示すように、中央部が最大で両短辺２１、
２２でほぼ０となるように変化することがわかった。。Next, the relationship between the amount of warpage (the amount of displacement) and the amount of change in the resistance value of the circuit board 20 of FIG. 6 was examined. FIG. 8 shows the result. However, the amount of warpage was the maximum displacement at the center of the circuit board. From FIG. 8, it can be seen that the displacement amount (warpage amount) of the circuit board 20 and the resistance value change amount have a substantially linear relationship. When the central portion is pressed while supporting both short sides 21 and 22 of the circuit board 20, the compressive or tensile stress acting on each portion in the longitudinal direction of the circuit board 20 due to the deformation of the circuit board 20 is as shown in FIG. , The central part is at most both short sides 21,
It turned out that it changes to almost 0 at 22. .
【０００８】次に、厚膜抵抗器Ｒが上記位置に固定され
た回路基板２０を図５に示す位置にて実際にケ−ス１に
収容し、モールド樹脂部３ａで全面モールドした場合の
厚膜抵抗器Ｒの抵抗値変化を調べた。その結果、この厚
膜抵抗器Ｒの抵抗値変化率は室温状態で約−０．７％で
あった。また、従来のハイブリッドＩＣでは、回路基板
２ａの部品搭載面Ａが凹面となるように反ることもわか
った。この原因は、回路基板２ａの部品搭載面Ａには各
種の高さをもつ回路素子が固定されるので、それに合わ
せて回路素子搭載面Ａとそれに対面するケース１ａの内
面との間の寸法を確保する必要があり、その結果とし
て、部品搭載面Ａ側に充填されるモールド樹脂部はＢ面
側に充填されるモールド樹脂部よりも多くなるためと考
えられる。すなわち、厚く充填されたＡ面側のモールド
樹脂部の収縮量（収縮力）が薄く充填されたＢ面側のモ
ールド樹脂部の収縮量（収縮力）より大きいので、回路
基板２ａがＡ面を凹面とするように反るものと考えられ
る。Next, the circuit board 20 having the thick film resistor R fixed at the above position is actually accommodated in the case 1 at the position shown in FIG. The resistance value change of the film resistor R was examined. As a result, the rate of change of the resistance value of the thick film resistor R was about -0.7% at room temperature. It has also been found that in the conventional hybrid IC, the component mounting surface A of the circuit board 2a warps so as to be concave. This is because the circuit elements having various heights are fixed to the component mounting surface A of the circuit board 2a, and accordingly, the dimension between the circuit element mounting surface A and the inner surface of the case 1a facing it is adjusted. It is necessary to secure the mold resin portion, and as a result, it is considered that the mold resin portion filled on the component mounting surface A side is larger than the mold resin portion filled on the B surface side. That is, since the shrinkage amount (shrinkage force) of the thickly filled mold resin portion on the side A is larger than the shrinkage amount (shrinkage force) of the mold resin portion on the side B that is thinly filled, the circuit board 2a moves the A side. It is considered to be warped to be concave.
【０００９】上記の結果として、このような回路基板２
の反り（すなわち回路基板２の面直方向の曲げ応力）に
より、部品搭載面Ａ上に固定された厚膜抵抗器Ｒに圧縮
応力が加えられ、厚膜抵抗器Ｒの抵抗値が減少する。本
発明は、以上の問題点に鑑みなされたものであり、モー
ルド樹脂部と回路基板との間に生じる応力に起因する基
板一体形成型抵抗器（回路基板と一体に形成された抵抗
器）の抵抗値変動の低減を実現する電子回路装置を提供
することを、その目的としている。As a result of the above, such a circuit board 2
(That is, bending stress in the direction perpendicular to the surface of the circuit board 2), compressive stress is applied to the thick film resistor R fixed on the component mounting surface A, and the resistance value of the thick film resistor R decreases. The present invention is more has been made in view of the problems, groups due to the stress generated between the mold resin portion and the circuit board
Plate-integrated resistors ( resistance integrated with circuit board)
Providing an electronic circuit device which realizes a reduction in the resistance value variation of the vessel), and an object of the present invention.
【００１０】[0010]
【課題を解決するための手段】請求項１記載の本発明の
電子回路装置は、底面開口のケースと、表主面側にチッ
プ素子が搭載され前記ケース内に収容される回路基板
と、前記ケース内に充填され前記回路基板全面を被覆す
るモールド樹脂部と、一端が前記回路基板に固定され他
端が前記モールド樹脂部を貫通して外部に突出するリー
ドと、前記ケースの内面に配設されて前記回路基板の端
部を保持する基板嵌入溝と、前記回路基板と一体に形成
された基板一体形成型抵抗器とを備え、前記基板嵌入溝
は前記ケースの厚さ方向の中心部に形成されることを特
徴としている。請求項２記載の構成は請求項１記載の電
子回路装置において更に、前記基板一体形成型抵抗器は
前記回路基板に少なくとも一対形成され、前記一対の基
板一体形成型抵抗器は、オペアンプの出力端と−入力端
とを接続するフィードバック抵抗素子と、一端が前記オ
ペアンプの入力端に接続される入力抵抗素子とを構成す
ることを特徴としている。 According to a first aspect of the present invention, there is provided an electronic circuit device according to the present invention, wherein a case having a bottom opening, a circuit board having a chip element mounted on the front main surface side and housed in the case are provided. A mold resin portion filled in a case and covering the entire surface of the circuit board; a lead having one end fixed to the circuit board and the other end penetrating the mold resin portion and protruding to the outside; and disposed on an inner surface of the case. And a board fitting groove for holding an end of the circuit board, and integrally formed with the circuit board.
Wherein the substrate fitting groove is formed at the center in the thickness direction of the case. The configuration according to claim 2 is the same as the configuration according to claim 1.
In the slave circuit device, further, the integrated resistor formed on the substrate is
At least one pair is formed on the circuit board, and
The plate-integrated resistor is composed of the output terminal and the-input terminal of the operational amplifier.
And a feedback resistor element for connecting
And an input resistance element connected to the input
It is characterized by that.
【００１１】本発明でいう基板一体形成型抵抗器とし
て、印刷後、焼成して形成した厚膜抵抗体の他、各種Ｐ
ＶＤ法やＣＶＤ法で形成された薄膜抵抗体を採用するこ
とができる。これら抵抗器は、回路基板上に直接、一体
に形成される。As the integrated resistor formed on the substrate according to the present invention, in addition to a thick-film resistor formed by printing and firing, various P- type resistors can be used.
A thin film resistor formed by a VD method or a CVD method can be employed. These resistors are integrated directly on the circuit board
It is formed on.
【００１２】[0012]
【作用及び発明の効果】本発明では、回路基板がケース
内に挿入され、回路基板の端部が基板ガイド体の基板嵌
入溝に嵌入、保持された状態で、モールド樹脂部がケー
ス内に充填され、回路基板全面を被覆する。モールド樹
脂部の硬化、収縮により回路基板に圧縮応力が生じる
が、回路基板は基板嵌入溝の案内によりケースの厚さ方
向中心部に保持されている。したがって、回路基板の非
部品搭載面側にも従来より多量のモールド樹脂部を充填
でき、その結果、部品搭載面側のモールド樹脂部と非部
品搭載面側のモールド樹脂部がほぼ等量となって、回路
基板の上記両面に作用する圧縮応力がほぼ等しくなり、
その結果、回路基板に曲げ応力が発生せず、回路基板の
反りにより回路基板上に固定された基板一体形成型抵抗
器の抵抗値が変動しない。According to the present invention, the mold resin portion fills the case with the circuit board inserted into the case and the end portion of the circuit board fitted and held in the board fitting groove of the board guide body. Then, the entire surface of the circuit board is covered. Although the compressive stress is generated in the circuit board due to the curing and shrinkage of the mold resin portion, the circuit board is held at the center in the thickness direction of the case by the guide of the board fitting groove. Therefore, the non-component mounting surface side of the circuit board can be filled with a larger amount of molding resin than before, and as a result, the molding resin portion on the component mounting surface side and the molding resin portion on the non-component mounting surface side are almost equal. Thus, the compressive stresses acting on the both sides of the circuit board become substantially equal,
As a result, no bending stress is generated on the circuit board, and the resistance value of the integrated board type resistor fixed on the circuit board does not change due to the warpage of the circuit board.
【００１３】[0013]
【実施例】（実施例１） 本発明の電子回路装置の一実施例を図１〜図３に示す。
この電子回路装置はハイブリッドＩＣであって、ケ−ス
１と、ケ−ス１内に収容された回路基板２と、ケ−ス１
内に充填されたモールド樹脂部３と、一端が回路基板２
に固定され他端がモールド樹脂部３を貫通して外部に突
出するリード４と、ケース１の内面に配設されて回路基
板２の端部を保持する基板嵌入溝１２と、回路基板２と
一体に形成された基板一体形成型抵抗器Ｒ１、Ｒ２とを
備えている。なお、図１では回路基板２の主面上のモー
ルド樹脂部３は剥離して図示している。(Embodiment 1) FIGS. 1 to 3 show an embodiment of an electronic circuit device according to the present invention.
This electronic circuit device is a hybrid IC, and includes a case 1, a circuit board 2 housed in the case 1, and a case 1.
And a circuit board 2 having one end filled therein.
A lead 4 having the other end penetrating the mold resin portion 3 and protruding to the outside;
A board fitting groove 12 for holding an end of the board 2;
The resistors R1 and R2 formed integrally with the substrate are formed integrally.
Have . In FIG. 1, the mold resin portion 3 on the main surface of the circuit board 2 is illustrated as being separated.
【００１４】ケ−ス１は、縦、横、高さが５０ｍｍ×６
ｍｍ×１８ｍｍの直方中空体形状を有し、底面が開口さ
れている。ケ−ス１の壁厚は約１ｍｍで、ＰＢＴ樹脂の
射出成形により形成されている。ケ−ス１の長手方向両
端に位置する両内端面には、ガイド凹部１１（図３参
照）がそれぞれ凹設されている。ガイド凹部１１は縦、
横、高さが１ｍｍ×１．２ｍｍ×１１ｍｍとされ、一対
のガイド凹部１１は回路基板２の端部が嵌入される基板
嵌入溝１２となっている。The case 1 has a length, width and height of 50 mm × 6.
It has the shape of a rectangular hollow body of mm × 18 mm, and the bottom surface is open. Case 1 has a wall thickness of about 1 mm and is formed by injection molding of PBT resin. Guide recesses 11 (see FIG. 3) are formed in both inner end surfaces located at both ends in the longitudinal direction of the case 1, respectively . The guide recess 11 is vertical,
Horizontal, height is a 1 mm × 1.2 mm × 11 mm, a pair of guide recesses 1 1 has a substrate insertion groove 12 the end of the circuit board 2 is fitted.
【００１５】この実施例で重要な点は、回路基板２の主
面（部品搭載面Ａ、非部品搭載面Ｂ）に対面するケース
１の主内面は、互いに同形の平面であり、かつ、この基
板嵌入溝１２がケース１の内部においてその厚さ方向の
中心位置に形成されていることである。その結果、回路
基板２はケース１の内部空間の厚さ方向中央に保持され
ることとなる。An important point in this embodiment is that the main inner surfaces of the case 1 facing the main surfaces (the component mounting surface A and the non-component mounting surface B) of the circuit board 2 are planes having the same shape. The substrate fitting groove 12 is formed at the center position in the thickness direction inside the case 1. As a result, the circuit board 2 is held at the center of the internal space of the case 1 in the thickness direction.
【００１６】回路基板２はアルミナを素材とする単層も
しくは多層基板であって、回路基板２の両短辺２１、２
２はそれぞれガイド凹部１１に嵌入されて保持されてい
る。回路基板２の寸法は、縦、横、厚さ１３ｍｍ×４
７．５ｍｍ×０．８ｍｍであり、その線膨張率は約７．
５×１０-6／℃である。回路基板２には単層もしくは多
層の配線パタン（図示せず）が形成されている。回路基
板２の部品搭載面Ａに回路基板２の短辺２１に近接して
基板一体形成型抵抗器Ｒ１〜Ｒ２が固定され、基板一体
形成型抵抗器Ｒ１、Ｒ２上に保護ガラス９が被着されて
いる。The circuit board 2 is a single-layer or multilayer board made of alumina.
2 are fitted and held in the guide recesses 11 respectively. The dimensions of the circuit board 2 are vertical, horizontal and 13 mm thick x 4
It is 7.5 mm x 0.8 mm and has a linear expansion coefficient of about 7.
5 × 10 −6 / ° C. A single-layer or multi-layer wiring pattern (not shown) is formed on the circuit board 2. Close to the short side 21 of the circuit board 2 on the component mounting surface A of the circuit board 2
The resistors R1 and R2 integrated with the substrate are fixed, and the resistors
A protective glass 9 is applied on the forming resistors R1 and R2.
【００１７】基板一体形成型抵抗器Ｒ１、Ｒ２は、縦、
横、厚さが１．５ｍｍ×０．８５ｍｍ×１０μｍの長方
形の膜からなる。基板一体形成型抵抗器Ｒ１、Ｒ２は図
２に示すように、ＲｕＯ2 素材からなる厚膜導体ペース
トのスクリーン印刷技術により形成され、焼成された厚
膜抵抗体であって、それらの両端はＡｇ系を素材とする
厚さ約１０μｍの配線層５に接続されている。保護ガラ
ス９は厚膜ガラスペーストを焼成後で約１０μｍの厚さ
になるように印刷し、摂氏約５００度で約１時間加熱焼
成して形成した。The resistors R1 and R2 formed integrally with the substrate are vertical,
It is made of a rectangular film having a width of 1.5 mm × 0.85 mm × 10 μm. The figure shows the resistors R1 and R2 integrated with the substrate .
As shown in FIG. 2 , a thick film resistor formed by a screen printing technique of a thick film conductor paste made of a RuO 2 material and fired, and both ends of which are made of an Ag-based material and have a thickness of about 10 μm. Connected to layer 5. The protective glass 9 was formed by printing a thick film glass paste so as to have a thickness of about 10 μm after firing, and heating and firing at about 500 degrees Celsius for about 1 hour.
【００１８】モールド樹脂部３は、ケ−ス１内へ回路基
板２を挿入後、液状エポキシ樹脂エコゲル（日本ペルノ
ックスＫＫ製）をケ−ス１内に注入し、摂氏１２５度で
２時間熱硬化させ、冷却して形成される。このエポキシ
樹脂の体積収縮率は約９６％、線膨張率は約５１×１０
-6／℃である。上記した回路基板２上の回路は、図４に
示すようにモノリシックのオペアンプＯＰと、基板一体
形成型抵抗器Ｒ１〜Ｒ２をもつ初段センスアンプを構成
し、このオペアンプ増幅回路の電圧増幅率ｋは、基板一
体形成型抵抗器Ｒ１〜Ｒ２により決定される。After the circuit board 2 is inserted into the case 1, a liquid epoxy resin ecogel (manufactured by Nippon Pernox KK) is injected into the case 1, and heat-cured at 125 degrees Celsius for 2 hours. And formed upon cooling. This epoxy resin has a volume shrinkage of about 96% and a linear expansion coefficient of about 51 × 10
−6 / ° C. The circuit on the circuit board 2 includes a monolithic operational amplifier OP and a board integrated circuit as shown in FIG.
Configure the first stage sense amplifier having a form type resistor R1 to R2, the voltage amplification factor k of the operational amplifier amplifying circuit, substrate-
It is determined by the body forming resistors R1 and R2.
【００１９】以下、本実施例の特徴点を説明する。上記
したようにこの実施例では、基板嵌入溝１２に嵌入され
ることにより、回路基板１がケース１内の内部空間の上
記厚さ方向中心位置に固定される。その結果、部品搭載
面Ａ側のモールド樹脂部３１の量と、非部品搭載面Ｂ側
のモールド樹脂部３２の量とがほぼ等しくなり、その結
果としてモールド樹脂部３１からＡ面に作用する圧縮応
力と、モールド樹脂部３２からＢ面に作用する圧縮応力
とがほぼ等しくなり、これにより回路基板２の反りが防
止され、この反りにより主に生じる基板一体形成型抵抗
器Ｒ１、Ｒ２の変化を防止することができる。Hereinafter, the features of this embodiment will be described. As described above, in this embodiment, the circuit board 1 is fixed at the center position in the thickness direction of the internal space in the case 1 by being fitted into the board fitting groove 12. As a result, the amount of the molding resin portion 31 on the component mounting surface A side is substantially equal to the amount of the molding resin portion 32 on the non-component mounting surface B side. As a result, the compression acting on the A surface from the molding resin portion 31 The stress is substantially equal to the compressive stress acting on the surface B from the mold resin portion 32, thereby preventing the circuit board 2 from being warped. This warpage mainly causes the change in the resistors R1, R2 formed integrally with the board. Can be prevented.
【００２０】なお、部品搭載面Ａ側のモールド樹脂部３
１の充填量は、部品搭載面ＡにチップＯＰや抵抗器Ｒ
１、Ｒ２が固定される分だけ多少、減少し、その結果、
回路基板２は非部品搭載面Ｂを凹とする側に反ろうとす
るが、実際には、基板一体形成型抵抗器Ｒ１、Ｒ２など
の体積は僅かであり、逆に部品搭載面Ａには上記回路素
子の固定により回路素子に働く曲げ応力だけ回路基板２
を部品搭載面Ａを凹とする方向へ反らせる力が増加する
ので、両力が相殺しあう。The mold resin portion 3 on the component mounting surface A side
The filling amount of No. 1 indicates that the chip OP and the resistor R
1, somewhat reduced by the amount R2 is fixed, so that
Although the circuit board 2 tends to warp to the side where the non-component mounting surface B is concave, the volume of the substrate integrated type resistors R1 and R2 is small, and conversely, the component mounting surface A has Only the bending stress acting on the circuit element by fixing the circuit element is the circuit board 2
Is increased in the direction in which the component mounting surface A is concave, so that both forces cancel each other.
【００２１】以上の結果として、このオペアンプ電圧増
幅回路からなる初段センスアンプの電圧増幅率のばらつ
きを大幅に低減することができた。通常、微小な入力信
号電圧又は信号電流を増幅する初段センスアンプの電圧
増幅率はより大きな信号電圧を扱うその後の回路段に比
べて格段に高い安定度が要求されるが、本実施例によれ
ば電圧増幅率のばらつきを大幅に低減でき、このような
初段センスアンプに好適である。As a result, the variation in the voltage amplification ratio of the first-stage sense amplifier including the operational amplifier voltage amplifier circuit can be significantly reduced. Normally, the voltage amplification rate of the first-stage sense amplifier that amplifies a minute input signal voltage or signal current requires much higher stability than the subsequent circuit stages that handle a larger signal voltage. Thus, variations in the voltage amplification factor can be greatly reduced, and this is suitable for such a first-stage sense amplifier.
【００２２】（変形態様）上記実施例において、回路基
板２の表面にシリコンゲルを塗布したのち、ケース１内
に収容することはより効果がある。なお、塗布の場合
は、エポキシ樹脂の量が、Ａ、Ｂ両面で等しくなるよう
に回路基板２の両主面Ａ、Ｂの両面に等しい厚さで塗布
することが好ましい。(Modification) In the above embodiment, it is more effective to apply silicon gel to the surface of the circuit board 2 and then house it in the case 1. In the case of application, it is preferable to apply the epoxy resin with the same thickness on both main surfaces A and B of the circuit board 2 so that the amount of the epoxy resin is equal on both surfaces A and B.
【図１】実施例１を示す断面図、FIG. 1 is a sectional view showing a first embodiment;
【図２】実施例１を示す断面図、FIG. 2 is a sectional view showing Example 1.
【図３】実施例１を示す断面図、FIG. 3 is a sectional view showing the first embodiment;
【図４】実施例１の装置の一部等価回路図、FIG. 4 is a partial equivalent circuit diagram of the device of the first embodiment;
【図５】従来のハイブリッドＩＣの断面図、FIG. 5 is a sectional view of a conventional hybrid IC,
【図６】回路基板への曲げ力と基板一体形成型抵抗器の
抵抗値変化率との関係を試験するための試験装置を示す
模式図、FIG. 6 is a schematic diagram showing a test apparatus for testing the relationship between the bending force on the circuit board and the rate of change in the resistance value of the resistor formed integrally with the board ;
【図７】図６の試験装置による試験結果を示す特性図、FIG. 7 is a characteristic diagram showing test results obtained by the test apparatus of FIG. 6,
【図８】回路基板への変位量（厚さ方向）と基板一体形
成型抵抗器の抵抗値変化量との関係を示す特性図、FIG. 8: Displacement to circuit board (thickness direction) and board integrated type
Characteristic diagram showing the relationship between the resistance value change amount of the molded resistor,
【図９】回路基板の湾曲に伴い抵抗器に加わる応力の回
路基板の長手方向への変化を示す特性図、FIG. 9 is a characteristic diagram showing a change in a stress applied to the resistor in accordance with the bending of the circuit board in a longitudinal direction of the circuit board;
１はケース、２は回路基板、３はモールド樹脂部、４は
リード、Ｒ１、Ｒ２は基板一体形成型抵抗器、１１はガ
イド凹部、１２は基板嵌入溝1 is a case, 2 is a circuit board, 3 is a mold resin part, 4 is a lead, R1 and R2 are resistors integrated with a board , 11 is a guide recess, and 12 is a board fitting groove.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 長坂 崇 愛知県刈谷市昭和町１丁目１番地 日本 電装株式会社内 (72)発明者 加藤 暁子 愛知県刈谷市昭和町１丁目１番地 日本 電装株式会社内 (56)参考文献 実開 昭62−120358（ＪＰ，Ｕ) (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 23/28 H05K 1/16 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Takashi Nagasaka 1-1-1, Showa-cho, Kariya-shi, Aichi Japan Inside Denso Corporation (72) Inventor Akiko Kato 1-1-1, Showa-cho, Kariya-shi, Aichi Japan Nihon Denso Co., Ltd. (56) References Japanese Utility Model 62-120358 (JP, U) (58) Fields investigated (Int. Cl. 7 , DB name) H01L 23/28 H05K 1/16
Claims (2)
子が搭載され前記ケース内に収容される回路基板と、前
記ケース内に充填され前記回路基板全面を被覆するモー
ルド樹脂部と、一端が前記回路基板に固定され他端が前
記モールド樹脂部を貫通して外部に突出するリードと、
前記ケースの内面に配設されて前記回路基板の端部を保
持する基板嵌入溝と、前記回路基板と一体に形成された
基板一体形成型抵抗器とを備え、前記基板嵌入溝は前記
ケースの厚さ方向の中心部に形成されることを特徴とす
る電子回路装置。1. A case having a bottom opening, a circuit board on which a chip element is mounted on the front main surface side and housed in the case, a mold resin portion filled in the case and covering the entire surface of the circuit board; A lead having one end fixed to the circuit board and the other end penetrating the mold resin portion and protruding outside;
A board fitting groove disposed on an inner surface of the case and holding an end of the circuit board, and formed integrally with the circuit board;
An electronic circuit device , comprising: a resistor integrally formed with a substrate ; wherein the substrate fitting groove is formed at a central portion in a thickness direction of the case.
記基板一体形成型抵抗器は前記回路基板に少なくとも一At least one resistor is formed on the circuit board.
対形成され、前記一対の基板一体形成型抵抗器は、オペThe pair of resistors formed integrally with the substrate are
アンプの出力端と−入力端とを接続するフィードバックFeedback connecting the output and input of the amplifier
抵抗素子と、一端が前記オペアンプの入力端に接続されA resistor element, one end of which is connected to the input end of the operational amplifier;
る入力抵抗素子とを構成することを特徴とする電子回路Circuit comprising: an input resistance element;
装置。apparatus.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4198498A JP3070272B2 (en) | 1992-07-24 | 1992-07-24 | Electronic circuit device |
| US08/091,718 US5483217A (en) | 1992-07-15 | 1993-07-15 | Electronic circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4198498A JP3070272B2 (en) | 1992-07-24 | 1992-07-24 | Electronic circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0645478A JPH0645478A (en) | 1994-02-18 |
| JP3070272B2 true JP3070272B2 (en) | 2000-07-31 |
Family
ID=16392132
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4198498A Expired - Fee Related JP3070272B2 (en) | 1992-07-15 | 1992-07-24 | Electronic circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3070272B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010071724A (en) * | 2008-09-17 | 2010-04-02 | Mitsubishi Electric Corp | Resin molded semiconductor sensor and method of manufacturing the same |
| JP5147929B2 (en) * | 2010-11-24 | 2013-02-20 | 株式会社オートネットワーク技術研究所 | Switching unit |
| CN102653703B (en) * | 2011-03-01 | 2013-07-17 | 湖北中烟工业有限责任公司 | Top dressing flavor for improving influence of Chinese herbal medicine extract on cigarette taste |
-
1992
- 1992-07-24 JP JP4198498A patent/JP3070272B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0645478A (en) | 1994-02-18 |
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