JP2971181B2 - Electronic component and method for manufacturing the electronic component - Google Patents

Electronic component and method for manufacturing the electronic component

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Publication number
JP2971181B2
JP2971181B2 JP3128941A JP12894191A JP2971181B2 JP 2971181 B2 JP2971181 B2 JP 2971181B2 JP 3128941 A JP3128941 A JP 3128941A JP 12894191 A JP12894191 A JP 12894191A JP 2971181 B2 JP2971181 B2 JP 2971181B2
Authority
JP
Japan
Prior art keywords
chip
heat conductor
support
electronic component
conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP3128941A
Other languages
Japanese (ja)
Other versions
JPH04230056A (en
Inventor
デーリング アントン
オルブリッヒ ルートガー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Robert Bosch GmbH
Original Assignee
Robert Bosch GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Robert Bosch GmbH filed Critical Robert Bosch GmbH
Publication of JPH04230056A publication Critical patent/JPH04230056A/en
Application granted granted Critical
Publication of JP2971181B2 publication Critical patent/JP2971181B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4871—Bases, plates or heatsinks
    • H01L21/4875—Connection or disconnection of other leads to or from bases or plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32153—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate
    • H01L2224/32175—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic
    • H01L2224/32188—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being arranged next to each other, e.g. on a common substrate the item being metallic the layer connector connecting to a bonding area protruding from the surface of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、少なくとも１つのチッ
プを、唯一つのリードフレームによって形成されている
支持体に被着させ、さらに該チップを前記支持体の端子
に接続させ、少なくとも１つのチップが熱伝導体とコン
タクトするように構成する、電子構成素子を製造するた
めの方法に関する。BACKGROUND OF THE INVENTION The present invention relates to a method for attaching at least one chip to a support formed by a single lead frame, and connecting the chip to terminals of the support. Are configured to contact a thermal conductor, a method for manufacturing an electronic component.

【０００２】[0002]

【従来の技術】熱伝導体形式のヒートシンクを用いて熱
を放出する電力構成素子を設けることは公知である。こ
の構成素子は、多くの場合チップに外被を施す際に、ケ
ーシング形板にルーズに封入される。この場合上記素子
は、支持体として用いられるリードフレームの取付け面
を介してしかチップと熱接触していない。さらに表面実
装可能な構成素子に対して、ケーシングの一方の側（導
体基板に向いていない側）をヒートシンクとして構成
し、導体基板上に設けられた冷却アングル（Ｋｕｅｈｌ
ｗｉｎｋｅｌ）に結合することは公知である。ただしこ
の構成は、相応のスペースを必要とするものである。BACKGROUND OF THE INVENTION It is known to provide power components that emit heat using heat sinks of the thermal conductor type. This component is often loosely encapsulated in a casing plate when the chip is jacketed. In this case, the element is in thermal contact with the chip only via the mounting surface of the lead frame used as support. Further, for the component that can be surface-mounted, one side of the casing (the side not facing the conductive substrate) is configured as a heat sink, and a cooling angle (Kuehl) provided on the conductive substrate
binding is known. However, this configuration requires a corresponding space.

【０００３】[0003]

【発明が解決しようとする課題】本発明の課題は、従来
の欠点を解消し、特別な出費を伴うことのない良好な熱
放出を行うことのできる構成素子を製造することであ
る。SUMMARY OF THE INVENTION It is an object of the present invention to provide a component which overcomes the disadvantages of the prior art and which can provide good heat dissipation without any extra expense.

【０００４】[0004]

【課題を解決するための手段】前記課題は本発明によ
り、支持体の取付け面に貫通部を設け、それによって前
記取付け面から貫通部を仕切るフレームを形成し、前記
貫通部に熱伝導体を挿入して前記フレームと結合させ、
前記チップを前記熱伝導体に被着させ、支持体の端子と
接続させるようにして解決される。SUMMARY OF THE INVENTION According to the present invention, there is provided, in accordance with the present invention, a frame provided on a mounting surface of a support, thereby forming a frame separating the through portion from the mounting surface. Insert and combine with the frame,
The problem is solved by attaching the chip to the heat conductor and connecting the chip to terminals of a support.

【０００５】本発明による方法の有利な点は次のような
ことである。すなわち構成素子が表面に取付け可能であ
るべきか、あるいは導体基板に貫通して差し込まれ、当
該導体基板の裏側から堅固にろう付けされるべきかにか
かわらず、任意の構成素子形状を製造するために用いる
ことができることである。さらに上記利点に加えて、標
準型のリードフレームを支持体として使用することがで
きる利点がある。熱伝導体をリードフレームの取付け面
に収容することと、チップを熱伝導体の上に直接取付け
ることにより特に良好な熱放出が達成される。[0005] The advantages of the method according to the invention are as follows. That is, to produce any component shape, whether the component should be attachable to a surface or inserted through a conductive substrate and brazed firmly from the back side of the conductive substrate It can be used for In addition to the above advantages, there is an advantage that a standard type lead frame can be used as a support. Particularly good heat dissipation is achieved by housing the heat conductor on the mounting surface of the leadframe and mounting the chip directly on the heat conductor.

【０００６】従属項記載の手段により本発明の方法によ
る別の有利な構成例が可能である。大量生産に対して
は、リードフレームの取付け面に貫通部を形成するの
に、例えば打ち抜き加工、エッチング、腐食等の通常の
技術を用いて行うと特に有利である。リードフレームの
取付け面中の貫通部に相応して、熱伝導体を正確に寸法
合わせする際には、熱伝導体を支持体としてのリードフ
レームに接合ないし結合する手段として、有利には例え
ばプレス封止、低温溶接、接着又はろう付け等の通常の
手段を用いることができる。熱伝導体の表面の材質に応
じて、つまり表面が銀の場合には接着剤により、また表
面がニッケルの場合は、ろう付けにより、さらに表面が
金の場合は、ボンディングによって簡単にチップを熱伝
導体の上に取付けることができる。チップの被着は有利
には、通常の方法によって行うことができる。特にプラ
スチックによるプレス加工が有利である。これは特に熱
伝導体がチップの外装から突出しているような場合に有
利である。それにより適切な媒体と直接熱結合ができ
る。[0006] Further advantageous embodiments of the method according to the invention are possible by means of the dependent claims. For mass production, it is particularly advantageous to form the through-hole in the mounting surface of the lead frame using conventional techniques, such as, for example, punching, etching, corrosion and the like. In the case of precise sizing of the heat conductor in accordance with the penetrations in the mounting surface of the lead frame, the heat conductor is preferably connected to the lead frame as a support by means of, for example, a press. Conventional means such as sealing, low temperature welding, bonding or brazing can be used. Depending on the material of the surface of the heat conductor, the chip can be easily heated by an adhesive when the surface is silver, by brazing when the surface is nickel, or by bonding when the surface is gold. Can be mounted on conductors. The application of the chips can advantageously be effected in a customary manner. In particular, press working with plastic is advantageous. This is particularly advantageous when the thermal conductor protrudes from the chip sheath. This allows direct thermal bonding with a suitable medium.

【０００７】請求項１２による電子構成素子に対して、
熱伝導体を材料ブロック、例えば銅合金又はアルミニウ
ム等から製造すると有利である。なぜならチップから冷
却媒体までの熱抵抗が特に僅少に保たれるからである。
熱抵抗を低減させるための別の構成例では、熱伝導体を
リードフレームの取付け面に挿入収容することと、チッ
プを熱伝導体に直接取付けることが示されている。特に
有利な点は、ヒートシンクとして用いられる熱伝導体
（チップの外装から突出している）を介して適当な媒体
に、熱を直接放出できる点である。これは特に、表面に
実装可能な電力構成素子を金属コア導体基板に設ける場
合に有利である。この場合熱伝導体は、適切な接合過程
によって導体基板の金属コア（冷却体としての機能をは
たす）と直接接触する。[0007] With respect to the electronic component according to claim 12,
Advantageously, the thermal conductor is manufactured from a block of material, such as a copper alloy or aluminum. This is because the thermal resistance from the chip to the cooling medium is kept particularly low.
In another configuration example for reducing the thermal resistance, it is shown that the thermal conductor is inserted and accommodated in the mounting surface of the lead frame, and the chip is directly attached to the thermal conductor. A particular advantage is that heat can be released directly to a suitable medium via a thermal conductor (protruding from the chip sheath) used as a heat sink. This is particularly advantageous when the power component mountable on the surface is provided on the metal core conductor substrate. In this case, the heat conductor comes into direct contact with the metal core (acting as a cooling body) of the conductor substrate by an appropriate bonding process.

【０００８】[0008]

【実施例】次に本発明による実施例を図面に基づき詳細
に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments according to the present invention will be described in detail with reference to the drawings.

【００９】図１には支持体１０が示されており、この支
持体１０は、リードフレームのユニットによって形成さ
れている。このリードフレームのユニットは、端子１２
を有するフレーム１１と取付け面１３と接続ステー１４
とから成っている。接続ステー１４は、取付け面１３と
フレーム１１との間の接合ないし結合を行っている。本
発明による方法の第１ステップでは（この段階は既にリ
ードフレームの製造の際において行うこともできる）、
貫通部２０が、取付け面１３に設けられる（これによっ
てこの貫通部２０を仕切るフレーム１３′（図２〜４）
が形成される）。これは例えば打ち抜き加工、エッチン
グ、腐食（コロージオン）あるいはこれに適した技術に
よって行うことが可能である。FIG. 1 shows a support 10 which is formed by a lead frame unit. The unit of this lead frame has terminals 12
, Mounting surface 13 and connection stay 14
And consists of The connection stay 14 joins or connects the mounting surface 13 and the frame 11. In the first step of the method according to the invention (this step can already be performed during the manufacture of the lead frame)
A through portion 20 is provided on the mounting surface 13 (the frame 13 ′ thereby partitioning the through portion 20 (FIGS. 2-4))
Is formed). This can be done, for example, by stamping, etching, corrosion (collodion) or a technique suitable therefor.

【００１０】図２には、以下に記述するように準備処理
されたリードフレームと熱伝導体２１が示されている。
熱伝導体２１の表面２５は、貫通部２０に正確に適合す
るように構成されている。ヒートシンクとして用いられ
る熱伝導体２１は、１つの材料ブロックから製造されて
おり、その厚さはリードフレームの厚さの数倍である。
特にヒートシンク２１として適しているのは、熱伝導性
の高い材料、例えば銅合金又はアルミニウム等である。
チップ３０は、熱伝導体２１の表面２５に取付けられる
べきなので、そこにチップ３０の良好な接着を行うため
に、銀膜、ニッケル膜、又は金膜等を被着することがで
きるか、あるいは取付け方法に相応して別の材料を選択
する。FIG. 2 shows the lead frame and the heat conductor 21 prepared as described below.
The surface 25 of the thermal conductor 21 is configured to exactly fit the penetration 20. The thermal conductor 21 used as a heat sink is manufactured from one material block, and its thickness is several times the thickness of the lead frame.
Particularly suitable as the heat sink 21 is a material having high thermal conductivity, such as a copper alloy or aluminum.
Since the chip 30 is to be attached to the surface 25 of the heat conductor 21, a silver film, a nickel film, a gold film, or the like can be applied thereon for good adhesion of the chip 30, or Select another material according to the mounting method.

【００１１】図３には、貫通部２０に熱伝導体２１が挿
入収容された後のリードフレーム１０が示されている。
熱伝導体２１とリードフレーム１０との接合ないし結合
は、プレス封止、低温溶接、接着剤又はろう付け等によ
って適切な箇所２２に行うことができる。熱伝導体２１
の表面２５の性質状態に応じて、例えば表面２５が銀表
面の場合はチップ３０は直接熱伝導体２１上に接着さ
れ、ニッケル表面の場合はろう付けが行われ、当該表面
２５が金表面の場合は共融的ボンディングが行われる。
しかしながら本発明によるプロセスは、これらのプロセ
スに制限されるものではなく、チップに対して適当な全
ての取り付け手法を含むものである。チップ３０と端子
１２との接続は、例えばボンディング線３２を介して行
うことができる。FIG. 3 shows the lead frame 10 after the heat conductor 21 is inserted and accommodated in the through portion 20.
The joining or joining of the heat conductor 21 and the lead frame 10 can be performed at an appropriate location 22 by press sealing, low-temperature welding, adhesive or brazing, or the like. Thermal conductor 21
For example, when the surface 25 is a silver surface, the chip 30 is directly adhered onto the heat conductor 21, when the surface 25 is a nickel surface, brazing is performed, and when the surface 25 is a gold surface, In this case, eutectic bonding is performed.
However, the process according to the invention is not limited to these processes, but includes all suitable mounting techniques for the chip. The connection between the chip 30 and the terminal 12 can be made, for example, via a bonding wire 32.

【００１２】図４には、上記構成が示されおり、その後
ボンディング線３２を有するチップ３０は、外装３５の
中に次のようにして収容される。すなわち熱伝導体２１
の一方の側２６が外被３５から突出するように収容され
ている。この一方の側表面２６は、適当な冷却体と直接
接触させることができるようになり、この冷却体によっ
て熱が放出される。それ故チップ３０と冷却体との間の
熱抵抗は特に僅少に保たれる。所定の使用に対しては空
気も冷却媒体として適しており、この場合は付加的な冷
却体は必要ない。FIG. 4 shows the above-described configuration. Thereafter, the chip 30 having the bonding wires 32 is housed in the outer case 35 as follows. That is, the heat conductor 21
Is protruded from the jacket 35 so as to protrude therefrom. This one side surface 26 can be brought into direct contact with a suitable cooling body, which dissipates heat. Therefore, the thermal resistance between the chip 30 and the cooling body is kept particularly low. Air is also suitable as a cooling medium for certain uses, in which case no additional cooling body is required.

【００１３】図４に示されている構成例では、表面に実
装可能な構成素子に対する端子１２が曲げられている。
本発明による構成は、金属コア導体基板に関連するこの
ような表面に実装可能な構成素子に対して特に適してい
る。この場合ヒートシンク２１は適当な処理によって導
体基板の金属コアと接合される。この金属コアは冷却体
として用いられる。このことは、導体基板上の電力構成
素子からの熱の放出を行うにあったって、特にスペース
が節約できる解決手段であることを表している。図１か
ら図４までに示された手法は、次のような構成素子にも
適するものである。すなわち導体基板を貫通して差し込
まれ、当該導体基板の裏側から出て固定的にろう付けさ
れるような構成素子に対しても適している。In the configuration example shown in FIG. 4, the terminals 12 for the components that can be mounted on the surface are bent.
The arrangement according to the invention is particularly suitable for components which can be mounted on such a surface in connection with a metal core conductor substrate. In this case, the heat sink 21 is joined to the metal core of the conductor board by an appropriate process. This metal core is used as a cooling body. This represents a particularly space-saving solution for dissipating heat from the power components on the conductor substrate. The method shown in FIGS. 1 to 4 is also suitable for the following components. That is, the present invention is also suitable for a component which is inserted through the conductor substrate and is fixedly brazed out of the back side of the conductor substrate.

【００１４】[0014]

【発明の効果】本発明による方法の有利な点は次のよう
なことである。すなわち構成素子が表面実装可能である
べきか、あるいは導体基板に貫通して差し込まれ、当該
導体基板の裏側からしっかりろう付けされるべきかにか
かわらず、任意の構成素子形態を製造するために用いる
ことができることである。さらに上記利点に加えて、標
準型のリードフレームを支持体として使用することがで
きる利点がある。熱伝導体をリードフレームの取付け面
に収容することと、チップを熱伝導体の上に直接取付け
ることにより特に良好な熱放出が達成される。The advantages of the method according to the invention are as follows. That is, whether the component should be surface mountable or inserted through a conductor substrate and brazed firmly from the back side of the conductor substrate, used to produce any component configuration That is what you can do. In addition to the above advantages, there is an advantage that a standard type lead frame can be used as a support. Particularly good heat dissipation is achieved by housing the heat conductor on the mounting surface of the leadframe and mounting the chip directly on the heat conductor.

【図面の簡単な説明】[Brief description of the drawings]

【図１】支持体の構成を表わす断面図である。FIG. 1 is a cross-sectional view illustrating a configuration of a support.

【図２】リードフレームとヒートシンクの接続前の構成
図である。FIG. 2 is a configuration diagram before connecting a lead frame and a heat sink.

【図３】リードフレームとヒートシンクの接続後の構成
図である。FIG. 3 is a configuration diagram after connection of a lead frame and a heat sink.

【図４】チップが設けられた後の全体構成図である。FIG. 4 is an overall configuration diagram after a chip is provided.

【符号の説明】[Explanation of symbols]

１０ 支持体（リードフレーム） １１ フレーム １２ 端子 １３ 取付け面 １３′ フレーム １４ 接続ステー ２０ 貫通部 ２１ 熱伝導体（ヒートシンク） ２２ 箇所 ２５ 表面 ２６ 下側 ３０ チップ ３２ ボンディング線 ３５ 外装 DESCRIPTION OF SYMBOLS 10 Support body (lead frame) 11 Frame 12 Terminal 13 Mounting surface 13 'Frame 14 Connection stay 20 Penetration part 21 Thermal conductor (heat sink) 22 places 25 Surface 26 Lower side 30 Chip 32 Bonding wire 35 Exterior

───────────────────────────────────────────────────── フロントページの続き (72)発明者 ルートガー オルブリッヒ ドイツ連邦共和国 ロイトリンゲン ヘ ルマン−エーラース−シュトラーセ ２ (56)参考文献 特開 平１−270336（ＪＰ，Ａ) (58)調査した分野(Int.Cl.6，ＤＢ名) H01L 23/36 H01L 23/28 H01L 23/50 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Ludger Olbrich Reutlingen-Herman-Ehrers-Strasse 2 (56) References JP-A-1-270336 (JP, A) (58) Fields studied (Int. Cl. 6 , DB name) H01L 23/36 H01L 23/28 H01L 23/50

Claims (17)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 少なくとも１つのチップ（３０）を、唯
一つのリードフレームによって形成されている支持体
（１０）に被着させ、さらに該チップ（３０）を前記支
持体（１０）の端子（１２）に接続させ、少なくとも１
つのチップ（３０）が熱伝導体（２１）とコンタクトす
るように構成する、電子構成素子を製造するための方法
において、前記支持体（１０）の取付け面（１３）に貫通部（２
０）を設け、それによって前記取付け面（１３）から、
貫通部（２０）を仕切るフレーム（１３′）を形成し 、前記貫通部（２０）に熱伝導体（２１）を挿入して前記
フレーム（１３′）と結合させ 、前記チップ（３０）を前記熱伝導体（２１）に被着さ
せ、支持体（１０）の端子（１２）と接続させる ことを
特徴とする、電子構成素子を製造するための方法。1. At least one chip (30) is only
Support formed by one lead frame
(10) is deposited, further wherein the supporting the chip (30)
It is connected to the terminal (12) of the bearing member (10), at least one
One tip (30) contacts the thermal conductor (21)
For manufacturing an electronic component configured as described above
In the above, the penetration portion (2) is provided on the mounting surface (13) of the support (10).
0), whereby from said mounting surface (13)
A frame (13 ') for partitioning the penetrating part (20) is formed , and a heat conductor (21) is inserted into the penetrating part (20).
The chip (30 ) is attached to the heat conductor (21) by being combined with a frame (13 ').
And connecting to a terminal (12) of a support (10) . 【請求項２】 前記貫通部（２０）を、打ち抜き加工、
エッチング、腐食によって取付け面（１３）に設ける請
求項１記載の方法。2. The method according to claim 1, wherein the penetrating portion (20) is stamped.
2. The method according to claim 1, wherein the mounting surface is provided by etching or corrosion. 【請求項３】 熱伝導体（２１）を貫通部（２０）に正
確にはめこみ可能であるように設計する、請求項１又は
２記載の方法。3. The method according to claim 1, wherein the thermal conductor is designed to be able to be fitted exactly into the penetration. 【請求項４】 前記熱伝導体（２１）と支持体（１０）
との接合ないし結合を、プレス封止、低温溶接、接着剤
又はろう付け等によって行う請求項１から３いずれか１
記載の方法。4. The heat conductor (21) and the support (10)
4. The method according to claim 1, wherein the bonding or bonding with the metal is performed by press sealing, low-temperature welding, an adhesive, brazing, or the like.
The described method. 【請求項５】 前記貫通部（２０）に適合する熱伝導体
（２１）の表面（２５）に、ニッケル膜、または銀膜、
または金膜の少なくとも１つを析出被着する請求項１か
ら４いずれか１記載の方法。5. A nickel film or a silver film on a surface (25) of a thermal conductor (21) that matches the through portion (20).
5. The method according to claim 1, wherein at least one of the gold films is deposited. 【請求項６】 前記貫通部（２０）に適合する熱伝導体
（２１）の表面（２５）に、チップ（３０）を、接着、
又はろう付け、又は共融的にボンディングする請求項１
から５いずれか１記載の方法。6. A chip (30) is adhered to a surface (25) of a heat conductor (21) which fits the through-hole (20).
2. The method according to claim 1, wherein the bonding is performed by brazing or eutectic bonding.
The method according to any one of claims 1 to 5. 【請求項７】 前記チップ（３０）を、ボンディング線
（３２）を介して端子（１２）に接続させる請求項１か
ら６いずれか１記載の方法。7. The method according to claim 1, wherein the chip is connected to a terminal via a bonding wire. 【請求項８】 前記貫通部（２０）により取付け面（１
３）から形成される前記フレーム（１３′）を、接続ス
テー（１４）を介して前記支持体（１０）と一体的に結
合させる、請求項１から７いずれか１記載の方法。 8. A mounting surface (1) formed by said through portion (20).
3) the frame (13 ') formed from
It is integrally connected with the support (10) through a stay (14).
The method according to any one of claims 1 to 7, wherein the methods are combined . 【請求項９】 前記チップ（３０）と、支持体（１０）
の一部と、熱伝導体（２１）の少なくとも一部がプラス
チックを用いた射出成形手法で被覆される、請求項１記
載の方法。9. The chip (30) and a support (10)
And at least a part of the heat conductor (21) are positive.
The method of claim 1, wherein the coating is performed by an injection molding technique using a tic . 【請求項１０】 唯一つのリードフレームによって形成
されている支持体（１０）が、中央に取付け面（１３）
を有しており、該取付け面（１３）には貫通部（２０）
が設けられており、それによって該取付け面（１３）か
ら、前記貫通部（２０）を仕切るフレーム（１３′）が
形成されており、 熱伝導体（２１）が、前記貫通部（２０）に挿入されて
前記フレーム（１３′）に接続されており、該熱伝導体
（２１）は１つの表面（２５）を有しており、 少なくとも１つのチップ（３０）が、前記熱伝導体（２
１）の前記表面（２５）に固定され、支持体（１０）の
端子（１２）と接続されており、 さらに前記チップ（３０）と、支持体（１０）の一部
と、前記熱伝導体（２１）の少なくとも一部が絶縁材料
によって被覆されている ことを特徴とする電子構成素
子。10. Formed by only one lead frame
The supporting body (10) has a mounting surface (13) in the center.
And the mounting surface (13) has a through portion (20).
Is provided, whereby the mounting surface (13)
The frame (13 ') that partitions the through portion (20)
And a heat conductor (21) is inserted into said through portion (20).
The heat conductor connected to the frame (13 ').
(21) has one surface (25) and at least one chip (30) is provided with the heat conductor (2).
1) fixed to the surface (25) of the support (10);
A terminal (12), a part of the chip (30) and a part of the support (10).
And at least a part of the heat conductor (21) is made of an insulating material.
An electronic component characterized by being coated with: 【請求項１１】 前記熱伝導体（２１）は、銅合金又は
アルミニウムから製造されている請求項１０記載の電子
構成素子。11. Electronic component according to claim 10, wherein the thermal conductor (21) is made of a copper alloy or aluminum. 【請求項１２】 前記熱伝導体（２１）は、外装（３
５）から突出し、熱伝導的に結合可能である請求項１０
又は１１記載の電子構成素子。12. The heat conductor (21) includes an exterior (3).
11. The device according to claim 10, which projects from 5) and is thermally conductively connectable.
Or the electronic component according to 11. 【請求項１３】 前記突出した熱伝導体（２１）の下側
（２６）は、外側に案内された端子（１２）にほぼ並ん
でいる請求項１２記載の電子構成素子。13. The electronic component according to claim 12, wherein the lower side of the projecting heat conductor is substantially aligned with an outwardly guided terminal. 【請求項１４】 当該電子構成素子は、導体基板上の表
面実装可能な電力構成素子として使用される請求項１０
から１３いずれか１記載の電子構成素子。14. The electronic component is used as a surface-mountable power component on a conductive substrate.
14. The electronic component according to any one of items 1 to 13. 【請求項１５】 前記貫通部（２０）を仕切っているフ
レーム（１３′）は、接続ステー（１４）を介して支持
体（１０）と一体的に接続されている、請求 項１０記載
の電子構成素子。 15. A flange partitioning the through portion (20).
The frame (13 ') is supported via the connecting stay (14)
Body (10) and are integrally connected, according to claim 10
Electronic components. 【請求項１６】 前記チップ（３０）は、ボンディング
線（３２）を介して端子（１２）に接続されている、請
求項１０記載の電子構成素子。 16. The chip (30) is bonded.
A cable connected to the terminal (12) via a wire (32).
The electronic component according to claim 10. 【請求項１７】 前記熱伝導体（２１）を支持体（１
０）よりも厚く形成されている、請求項１０記載の電子
構成素子。 17. The heat conductor (21) is supported on a support (1).
The electron according to claim 10, wherein the electron is formed thicker than 0).
Component.
JP3128941A 1990-06-01 1991-05-31 Electronic component and method for manufacturing the electronic component Expired - Lifetime JP2971181B2 (en)

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DE4017697.5 1990-06-01

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