JP2963210B2 - Semiconductor manufacturing equipment - Google Patents

Semiconductor manufacturing equipment

Info

Publication number
JP2963210B2
JP2963210B2 JP164991A JP164991A JP2963210B2 JP 2963210 B2 JP2963210 B2 JP 2963210B2 JP 164991 A JP164991 A JP 164991A JP 164991 A JP164991 A JP 164991A JP 2963210 B2 JP2963210 B2 JP 2963210B2
Authority
JP
Japan
Prior art keywords
substrate
mounting table
semiconductor wafer
substrate mounting
support pins
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP164991A
Other languages
Japanese (ja)
Other versions
JPH04305958A (en
Inventor
義一 北沢
幸輝 黒田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to JP164991A priority Critical patent/JP2963210B2/en
Publication of JPH04305958A publication Critical patent/JPH04305958A/en
Application granted granted Critical
Publication of JP2963210B2 publication Critical patent/JP2963210B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[発明の目的][Object of the Invention]

【0002】[0002]

【産業上の利用分野】本発明は、半導体製造装置に関す
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor manufacturing apparatus.

【0003】[0003]

【従来の技術】従来から、基板載置台上に半導体ウエハ
等の被処理基板を載置して所定の処理を施す半導体製造
装置では、この基板載置台を貫通する如く基板支持体例
えば3本の基板支持ピンを設け、これらの基板支持ピン
と基板載置台とを相対的に上下動させ、基板載置台上に
基板支持ピンが突出した状態および基板載置台内に基板
支持ピンが格納された状態に設定することができるよう
構成されたものが多い。例えば、半導体ウエハを加熱す
る加熱装置等では、基板載置台内に所定温度に設定可能
に構成された加熱手段、例えば抵抗加熱ヒータが内蔵さ
れている。そして、基板載置台上に基板支持ピンを突出
させた状態で、ロボット搬送された半導体ウエハを基板
支持ピン上に載置してロボットアームは退避し、この後
前記基板支持ピンが相対的に基板載置台にもぐり込むこ
とによりすなわち基板載置台内に基板支持ピンを格納状
態とすることにより基板載置台上に半導体ウエハを受け
渡し、半導体ウエハに処理例えば加熱処理を施す。ま
た、加熱処理が終了すると、基板載置台表面上方に基板
支持ピンを突出させることにより、基板載置台上から基
板支持ピン上に半導体ウエハを受け渡し、基板支持ピン
上からロボット搬送等によりアンロードする。なお、こ
のように、半導体ウエハのロード・アンロードの際に、
基板支持ピン上に半導体ウエハを支持するのは、自動ロ
ーディングアンローディングの面から半導体ウエハの下
部に、ウエハピンセット等の半導体ウエハ支持機構を挿
入する空間を設けるためである。また、上記基板支持ピ
ンとしては、耐熱性、ウエハ汚染、機械的強度等の面か
ら、例えばポリイミド樹脂、セラミックス等の材質のも
のが使用されている。
2. Description of the Related Art Conventionally, in a semiconductor manufacturing apparatus in which a substrate to be processed such as a semiconductor wafer is mounted on a substrate mounting table and a predetermined process is performed, a substrate support such as three Providing substrate support pins, moving these substrate support pins and the substrate mounting table relatively up and down, in a state where the substrate support pins protrude on the substrate mounting table and a state where the substrate support pins are stored in the substrate mounting table. Many are configured so that they can be set. For example, in a heating device or the like for heating a semiconductor wafer, a heating unit configured to be set to a predetermined temperature, for example, a resistance heater is built in a substrate mounting table. With the substrate support pins protruding above the substrate mounting table, the robot-conveyed semiconductor wafer is mounted on the substrate support pins, and the robot arm retreats. The semiconductor wafer is transferred to the substrate mounting table by being inserted into the mounting table, that is, by storing the substrate support pins in the substrate mounting table, and the semiconductor wafer is subjected to processing, for example, heat treatment. When the heating process is completed, the semiconductor wafer is transferred from the substrate mounting table to the substrate supporting pins by projecting the substrate supporting pins above the surface of the substrate mounting table, and is unloaded by robot transfer or the like from the substrate supporting pins. . As described above, when loading and unloading a semiconductor wafer,
The reason why the semiconductor wafer is supported on the substrate support pins is to provide a space for inserting a semiconductor wafer support mechanism such as wafer tweezers below the semiconductor wafer from an automatic loading / unloading surface. The substrate support pins are made of a material such as polyimide resin and ceramics in view of heat resistance, wafer contamination, mechanical strength and the like.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記説
明の従来の半導体製造装置では、被処理基板例えば半導
体ウエハが製造工程において帯電してしまい、基板載置
台上に載置した時静電的に基板載置台上に吸着してしま
う。このためアンロードの時に下部から基板支持ピンで
半導体ウエハ裏面を押し上げる際に、半導体ウエハが基
板載置台から剥がれ難くなり、基板支持ピン上で半導体
ウエハが位置ずれを起こしたり、基板支持ピン上から落
下することがあるという問題があった。これは基板載置
台面が酸化防止を目的としてタフラム等で絶縁処理され
るためで、特に、加熱装置例えばベーキング装置やアド
ヒージョン装置では、高温の乾燥した雰囲気下で半導体
ウエハを取り扱うため、半導体ウエハが帯電し易く、こ
のような問題が大きな問題となっていた。
However, in the conventional semiconductor manufacturing apparatus described above, the substrate to be processed, for example, a semiconductor wafer is charged in the manufacturing process, and the substrate is electrostatically charged when it is mounted on the substrate mounting table. It is absorbed on the mounting table. For this reason, when pushing up the back surface of the semiconductor wafer with the substrate support pins from below at the time of unloading, it is difficult for the semiconductor wafer to be peeled off from the substrate mounting table, causing the semiconductor wafer to be displaced on the substrate support pins, or from above the substrate support pins. There was a problem that it could fall. This is because the surface of the substrate mounting table is insulated with a tufram or the like for the purpose of preventing oxidation.In particular, in a heating device such as a baking device or an adhesion device, the semiconductor wafer is handled in a high-temperature and dry atmosphere. It is easy to be charged, and such a problem has been a serious problem.

【0005】本発明は、かかる従来の事情に対処してな
されたもので、基板載置台からのアンロードの際に、静
電気により被処理基板が基板載置台上に吸着し、位置ず
れを起こしたり落下することを防止することのできる半
導体製造装置を提供しようとするものである。
The present invention has been made in view of such a conventional situation, and when the substrate is unloaded from the substrate mounting table, the substrate to be processed is attracted to the substrate mounting table due to static electricity, causing a positional shift. An object of the present invention is to provide a semiconductor manufacturing apparatus that can prevent the semiconductor device from falling.

【0006】[発明の構成][Configuration of the Invention]

【0007】[0007]

【課題を解決するための手段】すなわち、本発明の半導
体製造装置は、被処理基板を載置して所望の処理を施す
ための基板載置台と、この基板載置台を貫通する如く設
けられた複数の基板支持体とを相対的に上下動させ、前
記基板載置台および前記複数の基板支持体によって前記
被処理基板を支持可能に構成された半導体製造装置にお
いて、前記複数の基板支持体を、導電性材料からなる支
持部材によって一体的に支持するとともに、当該支持部
材を所定の抵抗器を介して接地電位に接続したことを特
徴とする。
That is, the semiconductor manufacturing apparatus of the present invention is provided with a substrate mounting table for mounting a substrate to be processed and performing a desired process, and provided so as to penetrate the substrate mounting table. In a semiconductor manufacturing apparatus configured to be able to move the plurality of substrate supports relatively up and down and to support the substrate to be processed by the substrate mounting table and the plurality of substrate supports, the plurality of substrate supports are The present invention is characterized in that the supporting member is integrally supported by a supporting member made of a conductive material, and the supporting member is connected to a ground potential via a predetermined resistor.

【0008】[0008]

【作用】上記構成の本発明の半導体製造装置では、複数
の基板支持体、例えば複数の支持ピンが、導電性材料か
らなる支持部材によって一体的に支持されるとともに、
当該支持部材が所定の抵抗器を介して接地電位に接続さ
れている。したがって、被処理基板が静電気により基板
載置台に吸着してしまった場合でも、複数の支持ピン等
によって被処理基板を支持して基板載置台からアンロー
ドする際に、被処理基板に蓄積した静電気をスパークを
発生させることなく、穏やかにかつ均一に除去すること
ができ、アンロードの際に被処理基板が位置ずれを起こ
したり落下することを防止することができる。
In the semiconductor manufacturing apparatus of the present invention having the above structure, a plurality of
Substrate support, e.g., a plurality of support pins, is made of a conductive material.
While being integrally supported by a support member made of
The support member is connected to ground potential via a predetermined resistor.
Have been. Therefore, the substrate to be processed is
Even if it is adsorbed on the mounting table, multiple support pins etc.
Unload from the substrate mounting table while supporting the substrate to be processed
Discharges static electricity accumulated on the substrate to be processed.
Gentle and even removal without generation
Accordingly, it is possible to prevent the substrate to be processed from being displaced or dropping during unloading.

【0009】[0009]

【実施例】以下、本発明を半導体ウエハのベーキング処
理を行う加熱装置に適用した一実施例を図面を参照して
説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a heating device for performing a baking process on a semiconductor wafer will be described below with reference to the drawings.

【0010】第1図に示すように、加熱装置1には、加
熱手段例えば抵抗加熱ヒータ(図示せず)を具備し、所
望温度に設定可能に構成された円板状の基板載置台(熱
板)2が設けられている。この基板載置台2には、第2
図にも示すように複数例えば3 つの透孔3a、3b、3
cが設けられており、これらの透孔3a、3b、3cに
は、それぞれ基板支持体、例えば基板支持ピン4a、4
b、4cが設けられている。これらの基板支持ピン4
a、4b、4cのうち、少なくとも1 本例えば基板支持
ピン4aは、導電性材料例えばステンレススチールによ
って構成されている。また、この実施例においては他の
基板支持ピン4b、4cは、絶縁性材料例えばポリイミ
ド樹脂、セラミックス等から構成されている。
As shown in FIG. 1, the heating device 1 is provided with a heating means, for example, a resistance heater (not shown), and is provided with a disk-shaped substrate mounting table (heat source) which can be set to a desired temperature. Plate) 2 is provided. The substrate mounting table 2 has a second
As shown in the figure, a plurality of, for example, three through holes 3a, 3b, 3
The through holes 3a, 3b, and 3c are respectively provided in the through holes 3a, 3b, and 3c.
b, 4c are provided. These substrate support pins 4
At least one of the substrates a, 4b, and 4c, for example, the substrate support pin 4a is made of a conductive material, for example, stainless steel. In this embodiment, the other substrate support pins 4b and 4c are made of an insulating material such as a polyimide resin or ceramic.

【0011】これらの基板支持ピン4a、4b、4cの
下端部は、導電製材料例えばステンレススチール等から
なるピン支持部材5に固定されており、このピン支持部
材5は、導電製材料例えばステンレススチール等からな
るフレーム6に固定されている。また、ピン支持部材5
とフレーム6との間には、絶縁性部材例えばテフロン製
シート7a、テフロン製ワッシャー7b等が介挿されて
おり、ピン支持部材5とフレーム6が直接電気的に接続
されないよう構成されており、ピン支持部材5とフレー
ム6との間は、所定の電気抵抗値(例えば3 〜10MΩ)
を有する抵抗器8を介して電気的に接続されている。
The lower ends of the substrate supporting pins 4a, 4b, 4c are fixed to a pin supporting member 5 made of a conductive material, for example, stainless steel. The pin supporting member 5 is made of a conductive material, for example, stainless steel. And the like. In addition, the pin support member 5
An insulating member such as a Teflon sheet 7a, a Teflon washer 7b, or the like is interposed between the frame and the frame 6, so that the pin support member 5 and the frame 6 are not directly electrically connected. A predetermined electric resistance value (for example, 3 to 10 MΩ) is provided between the pin support member 5 and the frame 6.
Are electrically connected via a resistor 8 having

【0012】また、基板載置台2には、駆動機構9が設
けられており、図示矢印の如く基板載置台2を上下動さ
せることができるよう構成されている。そして、第1図
に示すように基板載置台2を上昇させて上部に位置させ
ると、基板支持ピン4a、4b、4cが基板載置台2内
に収容され、基板載置台2上に半導体ウエハ10が支持
され、一方、第3図に示すように基板載置台2を下降さ
せて下部に位置させると、基板支持ピン4a、4b、4
cが基板載置台2上に突出し、基板支持ピン4a、4
b、4c上に半導体ウエハ10が支持されるよう構成さ
れている。なお、基板載置台2と基板支持ピン4a、4
b、4cとは相対的に上下動すればよく、基板載置台2
を固定とし基板支持ピン4a、4b、4cが上下動する
よう構成してもよい。
A drive mechanism 9 is provided on the substrate mounting table 2 so that the substrate mounting table 2 can be moved up and down as shown by the arrows in the figure. Then, as shown in FIG. 1, when the substrate mounting table 2 is raised and positioned above, the substrate supporting pins 4a, 4b, 4c are accommodated in the substrate mounting table 2, and the semiconductor wafer 10 is placed on the substrate mounting table 2. On the other hand, as shown in FIG. 3, when the substrate mounting table 2 is moved down to the lower position, the substrate support pins 4a, 4b, 4
c protrudes above the substrate mounting table 2 and the substrate support pins 4a, 4a
The semiconductor wafer 10 is supported on b and 4c. In addition, the substrate mounting table 2 and the substrate support pins 4a, 4a
b and 4c may be moved up and down relatively.
May be fixed, and the substrate supporting pins 4a, 4b, 4c may move up and down.

【0013】上記構成の本実施例の加熱装置1では、予
め基板載置台2を所定温度に加熱しておき、また、基板
載置台2を下降させて基板支持ピン4a、4b、4cが
基板載置台2上に突出した状態に設定しておく。そし
て、例えば図示しない自動搬送装置等により、半導体ウ
エハ10を搬送して基板支持ピン4a、4b、4c上に
載置する。
In the heating apparatus 1 of the present embodiment having the above-described configuration, the substrate mounting table 2 is heated in advance to a predetermined temperature, and the substrate mounting table 2 is lowered so that the substrate supporting pins 4a, 4b, and 4c are mounted. It is set so as to protrude above the table 2. Then, the semiconductor wafer 10 is transferred and placed on the substrate support pins 4a, 4b, 4c by, for example, an automatic transfer device (not shown).

【0014】この後、基板載置台2を上昇させて半導体
ウエハ10を基板載置台2上に載置し、例えば所定時間
加熱処理を実施する。なお、この時各基板支持ピン4
a、4b、4cは、基板載置台2内に収容されており、
半導体ウエハ10と各基板支持ピン4a、4b、4cと
は非接触状態とされている。
After that, the semiconductor wafer 10 is mounted on the substrate mounting table 2 by raising the substrate mounting table 2 and, for example, a heating process is performed for a predetermined time. At this time, each substrate support pin 4
a, 4b, 4c are housed in the substrate mounting table 2,
The semiconductor wafer 10 and each of the substrate support pins 4a, 4b, 4c are in a non-contact state.

【0015】加熱処理が終了すると、基板載置台2を下
降させて基板支持ピン4a、4b、4cを基板載置台2
上面から突出させ、基板載置台2上の半導体ウエハ10
を基板支持ピン4a、4b、4cで形成される面上に受
け渡す。そして、基板支持ピン4a、4b、4c上の半
導体ウエハ10下面と基板載置台2との間に図示しない
自動搬送装置のウエハピンセット等を挿入し、このウエ
ハピンセットによって半導体ウエハ10の下面を支持し
てアンロードする。
When the heating process is completed, the substrate mounting table 2 is lowered, and the substrate supporting pins 4a, 4b, 4c are moved to the substrate mounting table 2.
The semiconductor wafer 10 on the substrate mounting table 2 is projected from the upper surface.
Is transferred to the surface formed by the substrate support pins 4a, 4b, and 4c. Then, between the lower surface of the semiconductor wafer 10 on the substrate support pins 4a, 4b, and 4c and the substrate mounting table 2, a wafer tweezer or the like of an automatic transfer device (not shown) is inserted, and the lower surface of the semiconductor wafer 10 is supported by the wafer tweezers. To unload.

【0016】この時、加熱処理中に基板載置台2上の半
導体ウエハ10に電荷が蓄積し、半導体ウエハ10が基
板載置台2に静電気により吸着することがある。ところ
が、半導体ウエハ10をアンロードするため基板載置台
2を下降させて基板支持ピン4aの先端と半導体ウエハ
10とが接触すると、半導体ウエハ10に蓄積した電荷
はステンレススチール製の基板支持ピン4aおよび保護
抵抗器8を介して接地されているフレーム6に流れ、半
導体ウエハ10の静電気が導出、放電除去されるので、
半導体ウエハ10を基板載置台2上から容易に離し持ち
上げることが可能となり、位置ずれが生じたり落下させ
ることなく半導体ウエハ10を基板載置台2上から基板
支持ピン4a、4b、4c上に受け渡すことができる。
At this time, electric charges may accumulate on the semiconductor wafer 10 on the substrate mounting table 2 during the heat treatment, and the semiconductor wafer 10 may be attracted to the substrate mounting table 2 by static electricity. However, when the substrate mounting table 2 is lowered to unload the semiconductor wafer 10 and the tip of the substrate support pin 4a comes into contact with the semiconductor wafer 10, the electric charge accumulated on the semiconductor wafer 10 is reduced by the substrate support pin 4a made of stainless steel. Since the semiconductor wafer 10 flows to the grounded frame 6 via the protection resistor 8 and the static electricity of the semiconductor wafer 10 is derived and discharged,
The semiconductor wafer 10 can be easily separated from the substrate mounting table 2 and lifted, and the semiconductor wafer 10 can be transferred from the substrate mounting table 2 to the substrate support pins 4a, 4b, and 4c without causing displacement or dropping. be able to.

【0017】なお、基板支持ピン4aとフレーム6とを
直接電気的に接続すると、半導体ウエハ10と基板支持
ピン4aが接触した際に過大な電流が流れスパークが生
じることがある。抵抗器8は、このようなスパークを防
止するためのものであり、その抵抗値は小さすぎるとス
パークを発生し、大きすぎると放電時間を多大に要する
ため例えば1 MΩ〜30MΩの範囲が好ましく、適宜選択
する必要がある。また、例えば基板支持ピン4aを、適
当な電気抵抗を有する材料から構成すれば、抵抗器8を
省略することも可能である。さらに、本実施例では、1
本の基板支持ピン4aのみを導電性部材によって構成し
たが、複数例えば2 本あるいは3 本の基板支持ピンを導
電性部材によって構成してもよい。上記実施例では加熱
装置に適用した例について説明したが、ウエハステージ
とウエハ間のロード・アンロードであれば、半導体製造
ラインのウエハプローバ、ウエハ搬送系に適用してもよ
い。さらに、上記実施例では半導体ウエハの搬送につい
て説明したが、TFTトランジスタにより構成されるL
CD駆動回路基板の製造装置に適用してもよい。
If the substrate supporting pins 4a and the frame 6 are directly electrically connected, an excessive current may flow when the semiconductor wafer 10 and the substrate supporting pins 4a come into contact, and a spark may be generated. The resistor 8 is for preventing such a spark. If the resistance value is too small, a spark is generated. If the resistance value is too large, a long discharge time is required. For example, the resistance is preferably in a range of 1 MΩ to 30 MΩ. It is necessary to select it appropriately. If the substrate support pins 4a are made of a material having an appropriate electric resistance, the resistor 8 can be omitted. Further, in this embodiment, 1
Although only the substrate support pins 4a are formed of a conductive member, a plurality of, for example, two or three substrate support pins may be formed of a conductive member. In the above embodiment, an example in which the present invention is applied to a heating apparatus has been described. However, the present invention may be applied to a wafer prober and a wafer transfer system of a semiconductor manufacturing line as long as the load and unload between a wafer stage and a wafer are performed. Further, in the above embodiment, the transfer of the semiconductor wafer has been described.
The present invention may be applied to an apparatus for manufacturing a CD drive circuit board.

【0018】[0018]

【発明の効果】以上説明したように本発明の半導体製造
装置によれば、基板載置台からのアンロードの際に、静
電気により被処理基板が基板載置台上に吸着し、位置ず
れを起こしたり落下することを防止することができる。
As described above, according to the semiconductor manufacturing apparatus of the present invention, when the substrate is unloaded from the substrate mounting table, the substrate to be processed is attracted to the substrate mounting table due to the static electricity, causing a positional shift. Falling can be prevented.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の一実施例の加熱装置の構成を示す図
である。
FIG. 1 is a diagram illustrating a configuration of a heating device according to an embodiment of the present invention.

【図2】 図1の基板載置台の構成を示す図である。FIG. 2 is a diagram illustrating a configuration of a substrate mounting table of FIG. 1;

【図3】 図1の加熱装置の基板載置台を下降させた状
態を示す図である。
FIG. 3 is a diagram showing a state where a substrate mounting table of the heating device of FIG. 1 is lowered.

【符号の説明】[Explanation of symbols]

1 加熱装置 2 基板載置台(熱板) 3a、3b、3c 透孔 4a、4b、4c 基板支持ピン 5 ピン支持部材 6 フレーム 7a テフロン製シート 7b テフロン製ワッシャー 8 抵抗器 9 駆動機構 10 半導体ウエハ DESCRIPTION OF SYMBOLS 1 Heating device 2 Substrate mounting table (hot plate) 3a, 3b, 3c Through hole 4a, 4b, 4c Substrate support pin 5 Pin support member 6 Frame 7a Teflon sheet 7b Teflon washer 8 Resistor 9 Drive mechanism 10 Semiconductor wafer

───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.6,DB名) H01L 21/68 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 6 , DB name) H01L 21/68

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項1】 被処理基板を載置して所望の処理を施す
ための基板載置台と、この基板載置台を貫通する如く設
けられた複数の基板支持体とを相対的に上下動させ、前
記基板載置台および前記複数の基板支持体によって前記
被処理基板を支持可能に構成された半導体製造装置にお
いて、 前記複数の基板支持体を、導電性材料からなる支持部材
によって一体的に支持するとともに、当該支持部材を所
定の抵抗器を介して接地電位に接続したことを特徴とす
る半導体製造装置。
1. A substrate mounting table for mounting a substrate to be processed and performing a desired process, and a plurality of substrate supports provided so as to penetrate the substrate mounting table are vertically moved relatively. In a semiconductor manufacturing apparatus configured to be able to support the substrate to be processed by the substrate mounting table and the plurality of substrate supports, the plurality of substrate supports are integrally supported by a support member made of a conductive material. A semiconductor manufacturing apparatus, wherein the supporting member is connected to a ground potential via a predetermined resistor.
JP164991A 1991-01-10 1991-01-10 Semiconductor manufacturing equipment Expired - Lifetime JP2963210B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP164991A JP2963210B2 (en) 1991-01-10 1991-01-10 Semiconductor manufacturing equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP164991A JP2963210B2 (en) 1991-01-10 1991-01-10 Semiconductor manufacturing equipment

Publications (2)

Publication Number Publication Date
JPH04305958A JPH04305958A (en) 1992-10-28
JP2963210B2 true JP2963210B2 (en) 1999-10-18

Family

ID=11507369

Family Applications (1)

Application Number Title Priority Date Filing Date
JP164991A Expired - Lifetime JP2963210B2 (en) 1991-01-10 1991-01-10 Semiconductor manufacturing equipment

Country Status (1)

Country Link
JP (1) JP2963210B2 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2553078Y2 (en) * 1991-04-20 1997-11-05 ソニー株式会社 Substrate heating device
JPH077072A (en) * 1993-06-17 1995-01-10 Anelva Corp Method and mechanism for unloading substrate in electrostatic chuck device
JP2804003B2 (en) * 1995-04-06 1998-09-24 日本ピラー工業株式会社 Semiconductor wafer heat treatment equipment
JP3274089B2 (en) * 1997-08-19 2002-04-15 タバイエスペック株式会社 Hybrid type heat treatment equipment
US6290491B1 (en) * 2000-06-29 2001-09-18 Motorola, Inc. Method for heating a semiconductor wafer in a process chamber by a shower head, and process chamber
JP4860597B2 (en) * 2007-12-14 2012-01-25 アスリートFa株式会社 Stage and substrate transfer method using the same
JP5356962B2 (en) * 2009-09-21 2013-12-04 東京エレクトロン株式会社 Placement mechanism, wafer transfer method with dicing frame, and wafer transfer program used in this transfer method
JP5884398B2 (en) * 2011-10-18 2016-03-15 ウシオ電機株式会社 UV irradiation equipment
JP5891362B2 (en) * 2013-08-29 2016-03-23 パナソニックIpマネジメント株式会社 Substrate peeling device
JP6445803B2 (en) * 2014-07-18 2018-12-26 金堂 義明 Surface plate unit
CN113862645B (en) * 2021-09-28 2023-09-08 北京北方华创微电子装备有限公司 Bearing device and semiconductor process chamber

Also Published As

Publication number Publication date
JPH04305958A (en) 1992-10-28

Similar Documents

Publication Publication Date Title
JP2963210B2 (en) Semiconductor manufacturing equipment
JP3153372B2 (en) Substrate processing equipment
JP2704309B2 (en) Substrate processing apparatus and substrate heat treatment method
US6062852A (en) Substrate heat-treating apparatus
JP2969034B2 (en) Transfer method and transfer device
JPH05136218A (en) Inspection device
JP2009123800A (en) Substrate processing apparatus
KR20000057603A (en) Wafer electrical discharge control by wafer lifter system
JPH113868A (en) Device and method for lamp annealing
WO2003063234A1 (en) Static eliminating mechanism for table, and tester
JPH077072A (en) Method and mechanism for unloading substrate in electrostatic chuck device
JP3325833B2 (en) Heat treatment equipment
JP3160601B2 (en) Module IC handler carrier handling equipment
JP3324974B2 (en) Heat treatment apparatus and heat treatment method
JP2963706B2 (en) IC handler
JP3416668B2 (en) Probing card
JPH11330218A (en) Heating and cooling device and vacuum-treatment device using the device
JP3484658B2 (en) Processing equipment
JP3160690B2 (en) Processing method
JP2001297977A (en) Quick heating and cooling plate
JPH053241A (en) Conveyer for plate-shaped object
JP2807844B2 (en) Substrate heating device
JPH06224113A (en) Coating device
US6239963B1 (en) Wafer support with electrostatic discharge bus
JPH0529418A (en) Burn-in method of semiconductor device and burn-in board used therein

Legal Events

Date Code Title Description
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 19990727

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080806

Year of fee payment: 9

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110806

Year of fee payment: 12