JP2588775B2 - Via hole formation method - Google Patents
Via hole formation methodInfo
- Publication number
- JP2588775B2 JP2588775B2 JP7389489A JP7389489A JP2588775B2 JP 2588775 B2 JP2588775 B2 JP 2588775B2 JP 7389489 A JP7389489 A JP 7389489A JP 7389489 A JP7389489 A JP 7389489A JP 2588775 B2 JP2588775 B2 JP 2588775B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- forming
- via hole
- organic resin
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、絶縁膜材料として感光性有機樹脂を用いた
多層配線板におけるヴイアホールの形成技術に関する。The present invention relates to a technology for forming a via hole in a multilayer wiring board using a photosensitive organic resin as an insulating film material.
第２図は従来法による柱状のヴイア導体の形成後に絶
縁膜を形成するヴイアホールの形成工程を示す工程図で
ある。第２図（ａ）に示すように薄膜導体２及び下層配
線導体３を形成した基板１上に、フオトレジスト４を塗
布し、露光、現像によりヴイアホールとなる穴を形成す
る。続いて、（ｂ）に示すように電解めつきによりヴイ
ア導体５を形成した後、フオトレジスト４及び不要とな
る薄膜導体２を除去する。次に、（ｃ）に示すように塗
布及び熱処理により非感光性有機樹脂絶縁膜６を形成
し、（ｄ）に示すようにヴイア導体５上の有機樹脂絶縁
膜６を研磨により除去し、ヴイア導体５の表面を露出さ
せる。最後に、（ｅ）に示すように上層配線導体７を形
成し、穴の内部がヴイア導体で完全に満たされた埋込み
構造のヴイアホールが完成する。FIG. 2 is a process diagram showing a step of forming a via hole for forming an insulating film after forming a columnar via conductor by a conventional method. As shown in FIG. 2A, a photoresist 4 is applied on the substrate 1 on which the thin film conductor 2 and the lower wiring conductor 3 are formed, and a hole to be a via hole is formed by exposure and development. Subsequently, as shown in FIG. 1B, after the via conductor 5 is formed by electrolytic plating, the photoresist 4 and the unnecessary thin film conductor 2 are removed. Next, as shown in (c), a non-photosensitive organic resin insulating film 6 is formed by coating and heat treatment, and as shown in (d), the organic resin insulating film 6 on the via conductor 5 is removed by polishing. The surface of the conductor 5 is exposed. Finally, as shown in (e), the upper wiring conductor 7 is formed, and a via hole having a buried structure in which the inside of the hole is completely filled with the via conductor is completed.
しかし、このような方法では、研磨によりヴイア導体
上の有機樹脂絶縁膜を除去していることから工程は複雑
となり、絶縁膜の厚さの制御も困難で、ヴイア導体表面
を傷つける恐れが生じる〔J.T.パン（J.T.Pan）ほか、1
988年11月開催、第８回IEPS会報（Proc.8th IEPS）第17
4頁〕。However, in such a method, since the organic resin insulating film on the via conductor is removed by polishing, the process becomes complicated, the thickness of the insulating film is difficult to control, and the surface of the via conductor may be damaged [ JT bread (JTPan), 1
Held in November 988, 8th IEPS Bulletin (Proc. 8th IEPS), 17th
4 pages].
本発明の目的は柱状のヴイア導体で満たした埋込み構
造のヴイアホールを得ることにある。An object of the present invention is to obtain a buried via hole filled with a columnar via conductor.
本発明を概説すれば、本発明はヴイアホールの形成方
法に関する発明であつて、絶縁膜材料として感光性有機
樹脂を用いた多層配線の下層配線導体と上層配線導体と
を接続するヴイアホールの形成方法において、柱状のヴ
イア導体を形成した後、絶縁膜を実現する感光性有機樹
脂を塗布し、上記感光性有機樹脂の表面に所定の強度分
布を有する露光用光を照射し、続いて現像及び熱処理す
ることにより、ヴイア導体表面を露出させ、かつヴイア
導体と同一の膜厚を有する絶縁膜を形成したヴイアホー
ルを形成させることを特徴とする。In general, the present invention relates to a method of forming a via hole, and more particularly to a method of forming a via hole for connecting a lower wiring conductor and an upper wiring conductor of a multilayer wiring using a photosensitive organic resin as an insulating film material. After the formation of the pillar-shaped via conductor, a photosensitive organic resin for realizing an insulating film is applied, and the surface of the photosensitive organic resin is irradiated with light for exposure having a predetermined intensity distribution, followed by development and heat treatment. Thereby, the via conductor surface is exposed, and a via hole in which an insulating film having the same thickness as the via conductor is formed is formed.
第１図は本発明によるヴイアホール形成工程の一実施
例を示す工程図、第３図は露光用光の強度分布を示す図
である。FIG. 1 is a process diagram showing one embodiment of a via hole forming process according to the present invention, and FIG. 3 is a diagram showing an intensity distribution of exposure light.
第１図（ａ）に示すように薄膜導体201及び下層配線
導体301を形成した基板101上に、フオトレジスト401を
塗布し、露光、現像によりヴイアホールとなる穴を形成
する。続いて、（ｂ）に示すように薄膜導体201を電極
とする電解めつきによりヴイア導体501を形成し、フオ
トレジスト401及び不要な薄膜導体201をエツチング等に
より除去する。次に、（ｃ）に示すようにスピンコート
等により感光性有機樹脂８を塗布し、プリベークを行
う。続いて、第３図に示すような露光用光の強度分布10
を有するフオトマスクを用いて、段差を有する感光性有
機樹脂８に露光し、現像及び熱処理することにより、第
１図（ｄ）に示すようにヴイア導体501の表面を露出さ
せ、かつヴイア導体501と同一の膜厚を有する感光性有
機樹脂絶縁膜９を形成する。最後に、（ｅ）に示すよう
に上層配線導体701を形成し、穴の内部がヴイア導体で
完全に満たされた埋込み構造のヴイアホールが完成す
る。As shown in FIG. 1A, a photoresist 401 is applied on a substrate 101 on which a thin film conductor 201 and a lower wiring conductor 301 are formed, and a hole to be a via hole is formed by exposure and development. Subsequently, as shown in FIG. 3B, a via conductor 501 is formed by electrolytic plating using the thin film conductor 201 as an electrode, and the photoresist 401 and the unnecessary thin film conductor 201 are removed by etching or the like. Next, as shown in (c), the photosensitive organic resin 8 is applied by spin coating or the like, and prebaked. Subsequently, the intensity distribution 10 of the exposure light as shown in FIG.
The photosensitive organic resin 8 having a step is exposed, developed and heat-treated using a photomask having the following to expose the surface of the via conductor 501 as shown in FIG. A photosensitive organic resin insulating film 9 having the same thickness is formed. Finally, an upper layer wiring conductor 701 is formed as shown in (e), and a via hole having a buried structure in which the inside of the hole is completely filled with the via conductor is completed.
第４図は第３図に示した露光用光の強度分布10を得る
方法の一例を説明する図である。FIG. 4 is a view for explaining an example of a method for obtaining the intensity distribution 10 of the exposure light shown in FIG.
露光用フオトマスク11の遮光部に微小な角形パターン
12を設け、一辺の長さあるいはパターンの間隔を変え
て、開口率（単位面積当りの角形パターンの面積の占め
る割合）を制御することにより、露光用光の強度分布10
を実現している。一辺の長さが感光性有機樹脂の露光波
長と同程度以下であれば、角形パターンを通過した光の
回析や角形パターンの縁での乱反射等により、感光性有
機樹脂表面における光の強度分布が実用上平滑とみなせ
るようになる。A minute square pattern on the light shielding part of the photomask 11 for exposure
12 is provided, and the aperture ratio (the ratio of the area of the rectangular pattern per unit area occupied) is controlled by changing the length of one side or the interval between the patterns, so that the intensity distribution of the exposure light
Has been realized. If the length of one side is equal to or less than the exposure wavelength of the photosensitive organic resin, the light intensity distribution on the photosensitive organic resin surface due to diffraction of light passing through the square pattern or irregular reflection at the edges of the square pattern. Becomes practically smooth.
以下の実施例では、フオトマスクを用いて感光性有機
樹脂を露光する場合について説明したが、所定の強度分
布を有する露光用光を照射する方法として、レーザ、あ
るいは電子ビーム等を使用し、露光用ビームを所定の強
度に制御しながら照射してもよい。In the following examples, the case where the photosensitive organic resin is exposed using a photomask has been described.However, as a method of irradiating exposure light having a predetermined intensity distribution, a laser, an electron beam, or the like is used. Irradiation may be performed while controlling the beam to a predetermined intensity.
以下、本発明を実施例により更に具体的に説明する
が、本発明はこれら実施例に限定されない。Hereinafter, the present invention will be described more specifically with reference to Examples, but the present invention is not limited to these Examples.
実施例１ 第１図の実施例として、フオトレジストとしてポジ型
レジスト、感光性有機樹脂として感光性ポリイミド樹脂
を用い、無電解めつきにより形成した銅薄膜を電極とし
て電解めつきにより銅配線導体、及び銅ヴイア導体を形
成することにより、厚さ約25μｍ、径膜25μｍの銅導体
で満たされた埋込み構造のヴイアホールが形成できた。Example 1 As an example of FIG. 1, a positive resist is used as a photoresist, a photosensitive polyimide resin is used as a photosensitive organic resin, a copper thin film formed by electroless plating is used as an electrode, and a copper wiring conductor is formed by electrolytic plating. By forming the copper via conductor, a via hole having a buried structure filled with a copper conductor having a thickness of about 25 μm and a diameter of 25 μm was formed.
実施例２ 第５図は本発明によるヴイアホール形成工程の他の実
施例を示す工程図である。第５図（ａ）に示すように下
層配線導体302を形成した基板102上に、（ｂ）に示すよ
うにスパツタ、あるいは蒸着等により導体膜13を形成し
た後、その上にエツチング用マスク14を形成する。続い
て、（ｃ）に示すようにスパツタエツチング、あるいは
ウエツトエツチング等によりヴイア導体502を形成し、
（ｄ）に示すようにエツチング用マスク14を除去した
後、スピンコート等により感光性有機樹脂801を塗布
し、プリベークを行う。次に、第３図に示すように露光
用光の強度分布10を有するフオトマスクを用いて、段差
を有する感光性有機樹脂801に露光し、現像及び熱処理
することにより、第５図（ｅ）に示すようにヴイア導体
502の表面を露出させ、かつヴイア導体502と同一の膜厚
を有する感光性有機樹脂絶縁膜901を形成する。最後
に、（ｆ）に示すように上記配線導体702を形成し、穴
の内部がヴイア導体で完全に満たされた埋込み構造のヴ
イアホールが完成する。Embodiment 2 FIG. 5 is a process chart showing another embodiment of a via hole forming process according to the present invention. As shown in FIG. 5B, a conductor film 13 is formed on a substrate 102 on which a lower wiring conductor 302 is formed as shown in FIG. 5A by a sputter or vapor deposition, and then an etching mask 14 is formed thereon. To form Subsequently, a via conductor 502 is formed by spat etching or wet etching as shown in FIG.
As shown in (d), after removing the etching mask 14, a photosensitive organic resin 801 is applied by spin coating or the like, and prebaked. Next, as shown in FIG. 3, a photosensitive organic resin 801 having a step is exposed using a photomask having an intensity distribution 10 of exposure light, and is developed and heat-treated. Via conductor as shown
A photosensitive organic resin insulating film 901 having the same thickness as the via conductor 502 exposing the surface of the 502 is formed. Finally, as shown in (f), the wiring conductor 702 is formed, and a via hole having a buried structure in which the inside of the hole is completely filled with the via conductor is completed.
以上説明したように、本方法では感光性有機樹脂を用
い、露光、現像により絶縁膜を形成するため、工程は比
較的簡単であり、ヴイア導体表面を傷つけることはな
い。また、基板上に塗布する感光性有機樹脂の厚さを制
御することにより、露光、現像及び熱処理後の絶縁膜の
厚さを容易に制御できる。As described above, in the present method, a photosensitive organic resin is used, and an insulating film is formed by exposure and development. Therefore, the process is relatively simple, and the via conductor surface is not damaged. Further, by controlling the thickness of the photosensitive organic resin applied on the substrate, the thickness of the insulating film after exposure, development, and heat treatment can be easily controlled.
第１図は本発明によるヴイアホール形成工程の一実施例
を示す工程図、第２図は従来法によるヴイアホール形成
工程の一実施例を示す工程図、第３図は第１図の実施例
における露光用光の強度分布を示す図、第４図は第３図
の露光用光の強度分布を得る方法の一例の説明図、第５
図は本発明によるヴイアホール形成工程の他の実施例を
示す工程図である。 1,101及び102……基板、２及び201……薄膜導体、3,301
及び302……下層配線導体、４及び401……フオトレジス
ト、5,501及び502……ヴイア導体、６……非感光性有機
樹脂絶縁膜、7,701及び702……上層配線導体、８及び80
1……感光性有機樹脂、９及び901……感光性有機樹脂絶
縁膜、10……露光用光の強度分布、12……露光用フオト
マスクに形成した角形パターン、11……露光用フオトマ
スク、13……導体膜、14……エツチング用マスクFIG. 1 is a process diagram showing one embodiment of a via hole forming process according to the present invention, FIG. 2 is a process diagram showing one embodiment of a via hole forming process according to a conventional method, and FIG. 3 is exposure in the embodiment of FIG. FIG. 4 is a diagram showing the intensity distribution of the exposure light, FIG.
FIG. 4 is a process chart showing another embodiment of the via hole forming process according to the present invention. 1, 101 and 102: substrate, 2 and 201: thin film conductor, 3,301
And 302 lower wiring conductors, 4 and 401 photoresist, 5,501 and 502 via conductors, 6 non-photosensitive organic resin insulation films, 7,701 and 702 upper wiring conductors, 8 and 80
1 ... photosensitive organic resin, 9 and 901 ... photosensitive organic resin insulating film, 10 ... intensity distribution of light for exposure, 12 ... square pattern formed on photomask for exposure, 11 ... photomask for exposure, 13 ...... Conductor film, 14 ... Etching mask
Claims (3)
多層配線の下層配線導体と上層配線導体とを接続するヴ
イアホールの形成方法において、柱状のヴイア導体を形
成した後、絶縁膜を実現する感光性有機樹脂を塗布し、
上記感光性有機樹脂の表面に所定の強度分布を有する露
光用光を照射し、続いて現像及び熱処理することによ
り、ヴイア導体表面を露出させ、かつヴイア導体と同一
の膜厚を有する絶縁膜を形成したヴイアホールを形成さ
せることを特徴とするヴイアホールの形成方法。In a method of forming a via hole for connecting a lower wiring conductor and an upper wiring conductor of a multilayer wiring using a photosensitive organic resin as an insulating film material, an insulating film is realized after forming a columnar via conductor. Apply photosensitive organic resin,
The surface of the photosensitive organic resin is irradiated with light for exposure having a predetermined intensity distribution, followed by development and heat treatment, thereby exposing the via conductor surface, and forming an insulating film having the same thickness as the via conductor. A method of forming a via hole, comprising forming the formed via hole.
露光用光を得る方法として、フオトマスクに複数の微細
パターンを設け、微細パターンの寸法、及び微細パター
ンの間隔の、一方あるいは双方を変えることを特徴とす
るヴイアホールの形成方法。2. A method for obtaining exposure light having a predetermined intensity distribution according to claim 1, wherein a plurality of fine patterns are provided on a photomask, and one or both of the size of the fine patterns and the interval between the fine patterns are adjusted. A method of forming a via hole, characterized by being changed.
露光用光を照射する方法として、集光した露光用ビーム
を所定の強度に制御しながら照射し、続いて現像及び熱
処理することにより、ヴイア導体表面を露出させ、かつ
ヴイア導体と同一の膜厚を有する絶縁膜を形成すること
を特徴とするヴイアホールの形成方法。3. A method for irradiating exposure light having a predetermined intensity distribution according to claim 1, wherein the condensing exposure beam is irradiated while controlling it at a predetermined intensity, followed by development and heat treatment. Forming a via hole by exposing a surface of the via conductor and forming an insulating film having the same thickness as the via conductor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7389489A JP2588775B2 (en) | 1989-03-28 | 1989-03-28 | Via hole formation method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7389489A JP2588775B2 (en) | 1989-03-28 | 1989-03-28 | Via hole formation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02253624A JPH02253624A (en) | 1990-10-12 |
| JP2588775B2 true JP2588775B2 (en) | 1997-03-12 |
Family
ID=13531368
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7389489A Expired - Fee Related JP2588775B2 (en) | 1989-03-28 | 1989-03-28 | Via hole formation method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2588775B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010199518A (en) * | 2009-02-27 | 2010-09-09 | Oki Semiconductor Co Ltd | Method of manufacturing semiconductor device |
-
1989
- 1989-03-28 JP JP7389489A patent/JP2588775B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH02253624A (en) | 1990-10-12 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |