JP2555522Y2 - 樹脂封止型半導体装置 - Google Patents

樹脂封止型半導体装置

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Publication number
JP2555522Y2
JP2555522Y2 JP1991092276U JP9227691U JP2555522Y2 JP 2555522 Y2 JP2555522 Y2 JP 2555522Y2 JP 1991092276 U JP1991092276 U JP 1991092276U JP 9227691 U JP9227691 U JP 9227691U JP 2555522 Y2 JP2555522 Y2 JP 2555522Y2
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Japan
Prior art keywords
resin
lead
semiconductor device
thickness
piece
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP1991092276U
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English (en)
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JPH0629149U (ja
Inventor
睦 佐々木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shindengen Electric Manufacturing Co Ltd
Original Assignee
Shindengen Electric Manufacturing Co Ltd
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Filing date
Publication date
Application filed by Shindengen Electric Manufacturing Co Ltd filed Critical Shindengen Electric Manufacturing Co Ltd
Priority to JP1991092276U priority Critical patent/JP2555522Y2/ja
Publication of JPH0629149U publication Critical patent/JPH0629149U/ja
Application granted granted Critical
Publication of JP2555522Y2 publication Critical patent/JP2555522Y2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/40221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/40245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)

Description

【考案の詳細な説明】
【0001】
【産業上の利用分野】本考案は、樹脂封止型半導体装置
の構造、特に、表面実装用に適した樹脂封止型半導体装
置に関するものである。
【0002】
【従来の技術】従来、外部電極を具備する樹脂封止型半
導体装置、特に、外部電極を面状として回路基板等に面
実装を容易とする樹脂封止型半導体装置の構造として
は、例えば、図1の構造図のごときものがあり、(a)
は断面図、(b)は底面図である。図1において、1は
リ−ド片、2は半導体素子、3は接続子、4は封止樹脂
であり、通常、リ−ドフレ−ムによる複数のリ−ド片1
の上に半導体素子2及び接続子3を所定の位置に半田付
けし、それらをエポキシ樹脂等の封止樹脂4により成型
封止している。その後、リ−ドフレ−ムの不要部分を切
断除去し、更に、リ−ド片1の外部導出部分をフォ−ミ
ング加工により折り曲げ、外部電極を形成していた。
【0003】しかして、図1の従来構造において、封止
樹脂4の厚さt1は、リ−ド片1 (2) のフォ−ミング加工による加圧やその他の製造上又は構
造上の都合から、一定の厚みを必要とし、半導体装置の
薄型化の障害の一つであった。又、リ−ド片1の厚さt
2は、フォ−ミング加工に適した厚み以上にすることは
好ましくなく、従って、リ−ド片1の放熱容積の増加に
制限があり、半導体装置の大電流容量化に問題があっ
た。更に、フォ−ミング加工のストレスがリ−ド片1の
導出部分の封止樹脂4にかかり、導出部分に隙間を生ず
る原因となり、信頼性の面でも問題があった。
【0004】
【考案が解決しようとする課題】解決しようとする問題
点は、リ−ド片のフォ−ミング加工に伴って、リ−ド片
の折曲げ部における封止樹脂を薄型化することが困難で
あること、リ−ド片の厚さによる放熱容量の増加に制限
があり、大電流容量化が困難であること、及びフォ−ミ
ング加工時のストレスによる封止樹脂のリ−ド片導出部
分における隙間発生の原因となることである。
【0005】
【課題を解決するための手段】リ−ド片の外部電極部の
厚さを、少なくとも該リ−ド片の半導体素子固着部の厚
さより実装面に向かって厚くすることを特徴とし、リ−
ド片のフォ−ミング加工による製造上の厄介さを解決
し、電流容量の増大、小型化及び信頼性向上を簡単な構
造により実現する。
【0006】
【実施例】図2は本考案装置の一実施例を示す構造図
で、(a)は断面図、(b)は底面図であり、図1と同
一符号は同一部分を示す。本考案装置の要部をなすリ−
ド片1は、外部電極部A、半導体素子固着部B及び接続
子固着部Cの3部分を含んでおり、外部電極部Aの厚さ
は、半導体素子固着部B及び接続子固着部Cの厚さよ
り、実装面、即ち、図2(a)の下方に向かって厚く形
成する。つまり、実装面において、必要とする外部電極
部Aの間隔lを保ち、リ (3) −ド片1のA、B及びCの各部により形成される凹部は
封止樹脂4の一部によりみたされる。この実施例では、
リ−ドフレ−ムによる複数のリ−ド片1のA部の厚さの
約10〜50%をエッチング法で薄くしてB部及びC部
の厚さを形成した。次いで、各部の所定位置に半導体素
子2及び接続子3を半田付けし、モ−ルド法により封止
樹脂4を形成した。その後、不要のリ−ドフレ−ム部分
を所定寸法で切断除去して、個別の半導体装置とした。
【0007】前記の実施例では、リ−ド片1のB部及び
C部をA部に対し、薄くしたが、外部電極部A間の距離
の確保ができれば、接続子固着部Cは必ずしも薄くする
必要はない。又、薄くする手段としては、エッチング加
工の他、プレス加工や切削加工の使用も可能であり、薄
くする寸法の程度も設計に応じて任意に選択できる。
【0008】図2の実施例では、外部電極部Aを2個と
する2端子型であるが、必要に応じて、3端子型以上に
も適用でき、半導体素子、接続子についても、複数個の
封入してもよい。又、ダイオ−ド、トランジスタ、サイ
リスタ等のいずれの半導体素子でもよく、更に、他部品
との混成装置にも適用できる。なお、接続子は片状又は
ワイヤ−状のいずれでもよい。その他、本考案の要旨の
範囲で任意に変形、変換及び付加をなし得るものであ
る。
【0009】前記の実施例による整流ダイオ−ドの出力
電流は従来構造に比し、20%程度増大することができ
た。又、図1(a)の厚さt3に比し、図2(a)の厚
さt3の減少分だけ半導体装置の薄型化を達成できた。
【0010】
【考案の効果】以上説明したように、本考案の樹脂封止
型半導体装置は、表面実装用としてのリ−ド片のフォ−
ミング加工の必要がなく、薄型化、大電流容量化及び高
信頼化を製造容易に、かつ簡単な構造で達成でき、回路
基板への面実装構造 (4) による電子機器等に利用して、産業上の効果大なるもの
である。
【図面の簡単な説明】
【図1】従来装置の構造図であり、(a)は断面図、
(b)は底面図である。
【図2】本考案の実施例を示す構造図であり、(a)は
断面図、(b)は底面図である。
【符号の説明】
1 リ−ド片 2 半導体素子 3 接続子 4 封止樹脂 A 1の外部電極部 B 1の半導体素子固着部 C 1の接続子固着部 t1、t2、t3、l 指定の寸法

Claims (2)

    (57)【実用新案登録請求の範囲】
  1. 【請求項1】電気的に接続した半導体素子、2個以上の
    リード片、接続子を樹脂で封止した樹脂封止型半導体装
    置において、前記2個以上のリード片は下部が露出して
    装置下部に外部電極を形成し、前記2個以上のリード片
    の少なくとも一つはリードの内側が外側より薄く形成さ
    れ薄肉部を形成し、かつ前記薄肉部は前記封止樹脂内部
    に覆われるようにして表面が露出しないようにして前記
    外部電極同士の距離をかせいだ事を特徴とする樹脂封止
    型半導体装置。
  2. 【請求項2】 リ−ド片の接続子固着部の厚さより該リ
    −ド片の外部電極部のの厚さを実装面に向かって厚くし
    たことを特徴とする請求項1の樹脂封止型半導体装置。
JP1991092276U 1991-10-15 1991-10-15 樹脂封止型半導体装置 Expired - Fee Related JP2555522Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1991092276U JP2555522Y2 (ja) 1991-10-15 1991-10-15 樹脂封止型半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1991092276U JP2555522Y2 (ja) 1991-10-15 1991-10-15 樹脂封止型半導体装置

Publications (2)

Publication Number Publication Date
JPH0629149U JPH0629149U (ja) 1994-04-15
JP2555522Y2 true JP2555522Y2 (ja) 1997-11-26

Family

ID=14049881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1991092276U Expired - Fee Related JP2555522Y2 (ja) 1991-10-15 1991-10-15 樹脂封止型半導体装置

Country Status (1)

Country Link
JP (1) JP2555522Y2 (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4731021B2 (ja) * 2001-01-25 2011-07-20 ローム株式会社 半導体装置の製造方法および半導体装置
JP2005277434A (ja) * 2005-05-09 2005-10-06 Renesas Technology Corp 半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01184836A (ja) * 1988-01-13 1989-07-24 Murata Mfg Co Ltd 半導体装置
JP2765083B2 (ja) * 1989-08-08 1998-06-11 日本電気株式会社 樹脂封止型半導体装置

Also Published As

Publication number Publication date
JPH0629149U (ja) 1994-04-15

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