JP2017507367A - 画素回路、画素、この画素を含むアクティブマトリックス有機発光ダイオード表示装置及びその駆動方法 - Google Patents
画素回路、画素、この画素を含むアクティブマトリックス有機発光ダイオード表示装置及びその駆動方法 Download PDFInfo
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Abstract
Description
第1電源ELVDDにより給電回路(1121)と基本回路(1122)を接続し、基本回路(1122)をOLEDにより補償回路(1123)に接続し、前記補償回路(1123)を第2電源ELVSS1と第3電源ELVSS2に接続するステップAと、
前記給電回路(1121)の第2トランジスタT2を利用して基本回路(1122)に給電し、また、それぞれに第2電源ELVSS1と第3電源ELVSS2を利用して補償回路(1123)に給電し、前記給電回路(1121)の第2トランジスタのゲートはスキャン制御信号Scan1を入力し、前記基本回路(1122)の第1トランジスタT1のゲートはスキャン制御信号Scan2を入力し、そのソースがデータ信号Dmを入力し、前記補償回路(1123)の第3トランジスタT3と第4トランジスタT4のゲートは、それぞれに発光制御信号Em1と発光制御信号Em2を入力し、それらのソースはいずれもOLEDの陰極に接続されるステップBと、
画素作動周期Tの期間t1に、スキャン制御信号を提供し、第2トランジスタT2により第1電源ELVDDの電圧を提供して、第1コンデンサC1を初期化させるステップCと、
第1トランジスタT1にスキャン制御信号Scan2を提供する期間t2に、第1トランジスタT1により提供されたデータ信号Vdataに対応する電圧を第1コンデンサC1に保存し、同時に、第1トランジスタT1は低レベルのスキャン制御信号Scan2に応答してオンされ、第1トランジスタT1によりデータケーブルDmに提供されたデータ信号Vdataを第5トランジスタT5のゲートに提供し、第2トランジスタT2のドレインに対応する電圧をOLEDの陽極に提供し、OLEDの陰極に給電している第2電源ELVSS1の電圧は、OLEDの浮遊容量Coled、第5トランジスタT5のドレインにより第1コンデンサC1に充電するステップDと、
閾値電圧補償の期間t3に、発光制御信号Em2は低レベルにホッピングされ、第4トランジスタT4は発光制御信号Em2に応答してオンされ、第2トランジスタT2のドレインの電化は第5トランジスタT5、OLEDの陽極を経て、第3電源ELVSS2へ流れ、第2トランジスタT2のドレインの電圧が第5トランジスタT5のゲートの電圧の一つの閾値電圧より高い場合、第5トランジスタT5がオフされ、前記第2トランジスタT2のドレインの電荷の流動が停止するステップEと、
OLED発光の期間t4に、スキャン制御信号Scan1は低レベルにホッピングされ、第2トランジスタT2はスキャン制御信号Scan1に応答してオンされ、駆動電流は第1電源ELVDDに沿って第2トランジスタT2、第5トランジスタT5、OLED及び第4トランジスタT4の経路を経て第3電源ELVSS2に流れるステップFと、を含む。
Ioled=1/2Cox(μW/L)(Vdata)^2
であり、その中に、前記Cox、μ、W及びLは、それぞれに第5トランジスタT5の単位面積あたりのチャネル容量、チャネル移動度、チャネル幅及び長さであり、Vdataはデータ電圧である。
Ioled=1/2*K*[Vdata]^2
に類似表示され、その中に、Kは常数であり、Vdataはデータ電圧である。
そのなかに、Cox、μ、W及びLは、それぞれに第5トランジスタT5の単位面積あたりのチャネル容量、チャネル移動度、チャネル幅及び長さであり、Vdataはデータ電圧である。
Ioled=1/2*K*[Vsg−|Vth|]^2
=1/2*K*[Vdd−(Vdd−Vc1)−|Vth|]^2
=1/2*K*[|Vth|+(1−N)/N*Vdata−|Vth|]^2
=1/2*K*[(1−N)/N*Vdata]^2
=1/2*K*[Vdata]^2
その中に、KはCox*μ*W*Lであり、常数であり、Vsgはソースとゲートの電圧の差であり、Vthは閾値電圧であり、Vddは第1電源電圧ELVDDであり、Vc1は第1コンデンサC1に保存されている電圧であり、Vdataはデータ電圧であり、Nは1より大きい自然数である。
Claims (11)
- 基本回路を含む画素回路であって、さらに給電回路と補償回路を含み、前記給電回路、前記基本回路及び前記補償回路は順次に接続され、前記給電回路は第1電源に接続され、前記基本回路に電源を提供し、前記補償回路はそれぞれに第2電源及び第3電源に接続され、有機発光ダイオードの電圧と電流の差を補償することを特徴とする画素回路。
- 前記給電回路は第2トランジスタであり、前記第2トランジスタは、ゲートが第1スキャン制御線に接続され、ソースが第1電源に接続され、ドレインが前記基本回路に接続されることを特徴とする請求項1に記載の画素回路。
- 前記基本回路は並列した有機発光ダイオードと浮遊容量により前記補償回路に接続されることを特徴とする請求項1に記載の画素回路。
- 前記基本回路は、第1トランジスタ、第5トランジスタ及び第1コンデンサを含み、前記第1トランジスタは、ゲートが第2スキャン制御線に接続され、ソースがデータケーブルに接続され、ドレインが前記第5トランジスタのゲートに接続され、前記第1コンデンサは前記第5トランジスタのゲートとソースの間に直列されることを特徴とする請求項1に記載の画素回路。
- 前記補償回路は、有機発光ダイオードと並列した浮遊容量、第3トランジスタ及び第4トランジスタを含み、前記有機発光ダイオードと浮遊容量が基本回路の第5トランジスタのドレインと補償回路の第3トランジスタ及び第4トランジスタのソースの間に並列してから直列し、前記第3トランジスタと前記第4トランジスタのゲートはそれぞれに第1発光制御線、第2発光制御線に接続され、前記第3トランジスタと前記第4トランジスタのドレインはそれぞれに第2電源、第3電源に接続されることを特徴とする請求項1に記載の画素回路。
- 請求項1〜5のいずれか一項に記載の画素回路を含むことを特徴とする画素。
- 請求項6に記載の画素を含むことを特徴とするアクティブマトリックス有機発光ダイオード表示装置。
- 第1電源により給電回路と基本回路を接続し、基本回路を有機発光ダイオードにより補償回路に接続し、前記補償回路を第2電源と第3電源に接続するステップと、
前記給電回路の第2トランジスタを利用して基本回路に給電し、また、それぞれに第2電源と第3電源を利用して補償回路に給電し、前記給電回路の第2トランジスタのゲートは第1スキャン制御信号を入力し、前記基本回路の第1トランジスタのゲートは第2スキャン制御信号を入力し、そのソースがデータ信号を入力し、前記補償回路の第3トランジスタと第4トランジスタのゲートは、それぞれに第1発光制御信号と第2発光制御信号を入力し、それらのソースはいずれも有機発光ダイオードの陰極に接続されるステップと、
画素作動周期の第1期間に、第1スキャン制御信号を提供し、第2トランジスタにより第1電源の電圧を提供して、第1コンデンサを初期化させるステップと、
第1トランジスタに第2スキャン制御信号を提供する第2期間に、第1トランジスタにより提供されたデータ信号に対応する電圧を第1コンデンサに保存し、同時に、第1トランジスタは低レベルの第2スキャン制御信号に応答してオンされ、第1トランジスタによりデータケーブルに提供されたデータ信号を第5トランジスタのゲートに提供し、第2トランジスタのドレインに対応する電圧を有機発光ダイオードの陽極に提供し、有機発光ダイオードの陰極に給電している第2電源の電圧は、有機発光ダイオードの浮遊容量、第5トランジスタのドレインにより第1コンデンサに充電するステップと、
閾値電圧補償の第3期間に、第2発光制御信号は低レベルにホッピングされ、第4トランジスタは第2発光制御信号に応答してオンされ、第2トランジスタのドレインの電荷は第5トランジスタ、有機発光ダイオードの陽極の経路を経て、第3電源へ流れ、第2トランジスタのドレインの電圧が第5トランジスタのゲートの電圧の一つの閾値電圧より高い場合、第5トランジスタがオフされ、前記第2トランジスタのドレインの電荷の流動が停止するステップと、
有機発光ダイオード発光の第4期間に、第1スキャン制御信号は低レベルにホッピングされ、第2トランジスタは第1スキャン制御信号に応答してオンされ、駆動電流は第1電源に沿って第2トランジスタ、第5トランジスタ、有機発光ダイオード及び第4トランジスタの経路を経て第3電源に流れるステップと、
を含むことを特徴とする画素の駆動方法。 - 第1期間に、さらに第3トランジスタにより第2電源の電圧をリセット電圧として第3トランジスタのゲートに提供し、各フレームに第3トランジスタのソースが常にリセットされることを特徴とする請求項8に記載の画素の駆動方法。
- 有機発光ダイオード発光の第4期間に、前記有機発光ダイオードに流れた電流は、
Ioled=1/2Cox(μW/L)(Vdata)^2
であり、その中に、前記Cox、μ、W及びLは、それぞれに第5トランジスタの単位面積あたりのチャネル容量、チャネル移動度、チャネル幅及び長さであり、Vdataはデータ電圧であることを特徴とする請求項8に記載の画素の駆動方法。 - 前記有機発光ダイオードに流れた電流は、
Ioled=1/2*K*[Vdata]^2
に類似表示され、その中に、Kは常数であり、Vdataはデータ電圧であることを特徴とする請求項10に記載の画素の駆動方法。
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Application Number | Priority Date | Filing Date | Title |
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CN201310747565.1A CN104751777B (zh) | 2013-12-31 | 2013-12-31 | 像素电路、像素及包括该像素的amoled显示装置及其驱动方法 |
CN201310747565.1 | 2013-12-31 | ||
PCT/CN2014/095331 WO2015101255A1 (zh) | 2013-12-31 | 2014-12-29 | 像素电路、像素及包括该像素的amoled显示装置及其驱动方法 |
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JP6261757B2 (ja) | 2018-01-17 |
EP3059728A1 (en) | 2016-08-24 |
US20160358547A1 (en) | 2016-12-08 |
US10607538B2 (en) | 2020-03-31 |
CN104751777A (zh) | 2015-07-01 |
WO2015101255A1 (zh) | 2015-07-09 |
TWI537920B (zh) | 2016-06-11 |
KR20160087880A (ko) | 2016-07-22 |
CN104751777B (zh) | 2017-10-17 |
EP3059728A4 (en) | 2016-10-26 |
KR101862494B1 (ko) | 2018-05-29 |
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