JP2016105273A - 装置における電源管理のためのリソース割当及び解除 - Google Patents
装置における電源管理のためのリソース割当及び解除 Download PDFInfo
- Publication number
- JP2016105273A JP2016105273A JP2015223213A JP2015223213A JP2016105273A JP 2016105273 A JP2016105273 A JP 2016105273A JP 2015223213 A JP2015223213 A JP 2015223213A JP 2015223213 A JP2015223213 A JP 2015223213A JP 2016105273 A JP2016105273 A JP 2016105273A
- Authority
- JP
- Japan
- Prior art keywords
- resources
- zero subset
- usage
- module
- threshold
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
- G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request
- G06F9/5011—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals
- G06F9/5016—Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resources being hardware resources other than CPUs, Servers and Terminals the resource being the memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
- G06F11/1072—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in multilevel memories
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/329—Power saving characterised by the action undertaken by task scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/16—Constructional details or arrangements
- G06F1/20—Cooling means
- G06F1/206—Cooling means comprising thermal management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3215—Monitoring of peripheral devices
- G06F1/3221—Monitoring of peripheral devices of disk drive devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3268—Power saving in hard disk drive
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/325—Power saving in peripheral device
- G06F1/3275—Power saving in memory, e.g. RAM, cache
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3442—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for planning or managing the needed capacity
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3452—Performance evaluation by statistical analysis
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0625—Power saving in storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0629—Configuration or reconfiguration of storage systems
- G06F3/0634—Configuration or reconfiguration of storage systems by changing the state or mode of one or more devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0653—Monitoring storage devices or systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0688—Non-volatile semiconductor memory arrays
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Human Computer Interaction (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Computing Systems (AREA)
- Software Systems (AREA)
- Bioinformatics & Computational Biology (AREA)
- Evolutionary Biology (AREA)
- Probability & Statistics with Applications (AREA)
- Bioinformatics & Cheminformatics (AREA)
- Life Sciences & Earth Sciences (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Computer Security & Cryptography (AREA)
- Power Sources (AREA)
Abstract
Description
1)M<Nの場合、M個のリソースのセットのうちの1つに接続されるよう設計されたN個の競合する要求ポートのセット;
2)リソースの各インスタンスに接続される電力制御出力のセット;
3)リソースから関連するリソースの現在の電力状態を示す装置への電力状態インジケータ入力のセット;及び、
4)CPUメモリ又は入/出力(IO)ベースのインターフェース。
4 ホスト装置
6 ストレージ装置
8 コントローラ
10 不揮発性メモリアレイ
11 電力供給部
12 揮発性メモリ
13 キャッシュされた情報
14 インターフェース
16 メモリ装置
18 チャンネル
22 アドレス変換モジュール
24 書込モジュール
26 メンテナンスモジュール
28 読取モジュール
30 スケジューリングモジュール
32 チャンネルコントローラ
34 生データバッファ
36 ECCエンコーダ
38 読取バッファ
40 ECCデコーダ
42 リソース割当モジュール
50 アービタモジュール
52 アロケータ及び電力制御モジュール
54 リソース
56 要求元
58 要求
60 アロケータモジュール
61 サーモメータデータ構造
62 電力制御モジュール
70 CPU
72 読取データマルチプレクサ
130 ノード
Claims (21)
- 装置のコントローラによって、前記装置の複数のリソースの第1の非ゼロサブセットの使用量を決定することであって、前記複数のリソースがサーモメータデータ構造に従って割当てられ、且つ解放される、決定することと、
前記コントローラによって、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を、前記複数のリソースの前記第1の非ゼロサブセットを前記複数のリソースの第2の非ゼロサブセットから分離する閾値と比較することと、
前記比較に少なくとも基づいて、前記複数のリソースの前記第2の非ゼロサブセットの電源をオンにすることと
を含む、方法。 - 前記装置はソリッドステートドライブ(SSD)を備え、前記複数のリソースは、前記SSDの不揮発性メモリへデータを書込むこと、及びそれからデータを読取ることの1つ以上に対応する、請求項1に記載の方法。
- 更に、前記コントローラによって、前記サーモメータデータ構造の解析に少なくとも基づいて、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を決定することを含む、請求項1に記載の方法。
- 前記サーモメータデータ構造は、前記複数のリソースのそれぞれに対する各ビットを含み、前記各ビットのそれぞれは、前記複数のリソースの対応する1つが要求ユニットに割当てられるか、又は要求ユニットへの割当に利用可能かどうかを示す、請求項1に記載の方法。
- 更に、前記サーモメータデータ構造の前記各ビットの統計的解析に少なくとも基づいて、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を決定することを含む、請求項4に記載の方法。
- 更に、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を、要求されるであろう前記複数のリソースの期待数を示す予測使用量に変換することを含み、
前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を比較することは、要求されるであろう前記複数のリソースの前記期待数を前記閾値と比較することを含む、請求項1に記載の方法。 - 前記複数のリソースのそれぞれは各メモリスロットを備え、前記各メモリスロットのそれぞれは同じバイト数を含む、請求項1に記載の方法。
- 前記複数のリソースのそれぞれは、ソリッドステートドライブの不揮発性メモリに書込まれるECC符号化データに関してECC復号化を実行するために用いられるそれぞれのエラー検出訂正(ECC)デコーダを備える、請求項1に記載の方法。
- 前記複数のリソースの前記第2の非ゼロサブセットの電源をオンにすることは、前記使用量が前記閾値と等しいか、又はそれを超える場合に前記複数のリソースの前記第2の非ゼロサブセットの電源をオンにすることを含み、
前記方法は更に、前記使用量が前記閾値よりも小さい場合に前記複数のリソースの前記第2の非ゼロサブセットの電源をオフにすることを含む、請求項1に記載の方法。 - 更に、消費電力を制御するよう、経時的に前記閾値を異なる値に動的に設定することを含む、請求項1に記載の方法。
- 装置であって、
複数のリソースの第1の非ゼロサブセットの使用量を決定することであって、前記複数のリソースがサーモメータデータ構造に従って割当てられ、且つ解放される、決定することと、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を、前記複数のリソースの前記第1の非ゼロサブセットを前記複数のリソースの第2の非ゼロサブセットから分離する閾値と比較することと、前記比較に少なくとも基づいて、前記複数のリソースの前記第2の非ゼロサブセットの電源をオンにすることとを行うよう構成される1つ以上のプロセッサと、
前記閾値を格納するよう構成されるメモリと
を備える、装置。 - 前記装置はソリッドステートドライブ(SSD)を備え、
前記複数のリソースは、前記SSDの不揮発性メモリへデータを書込むこと、及びそれからデータを読取ることの1つ以上に対応する、請求項11に記載の装置。 - 前記1つ以上のプロセッサは更に、前記サーモメータデータ構造の解析に少なくとも基づいて、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を決定するよう構成される、請求項11に記載の装置。
- 前記サーモメータデータ構造は、前記複数のリソースのそれぞれに対する各ビットを含み、前記各ビットのそれぞれは、前記複数のリソースの対応する1つが要求ユニットに割当てられるか、又は要求ユニットへの割当に利用可能かどうかを示す、請求項11に記載の装置。
- 前記1つ以上のプロセッサは更に、前記サーモメータデータ構造の前記各ビットの統計的解析に少なくとも基づいて、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を決定するよう構成される、請求項14に記載の装置。
- 前記1つ以上のプロセッサは更に、前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を、要求されるであろう前記複数のリソースの期待数を示す予測使用量に変換するよう構成され、
前記1つ以上のプロセッサは、要求されるであろう前記複数のリソースの前記期待数を前記閾値と比較するよう構成される、請求項11に記載の装置。 - 前記複数のリソースのそれぞれは各メモリスロットを備え、前記各メモリスロットのそれぞれは同じバイト数を含む、請求項11に記載の装置。
- 前記複数のリソースのそれぞれは、ソリッドステートドライブの不揮発性メモリに書込まれるECC符号化データに関してECC復号化を実行するために用いられるそれぞれのエラー検出訂正(ECC)デコーダを備える、請求項11に記載の装置。
- 前記1つ以上のプロセッサは、前記使用量が前記閾値と等しいか、又はそれを超える場合に前記複数のリソースの前記第2の非ゼロサブセットの電源をオンにするよう構成され、
前記1つ以上のプロセッサは更に、前記使用量が前記閾値よりも小さい場合に前記複数のリソースの前記第2の非ゼロサブセットの電源をオフにするよう構成される、請求項11に記載の装置。 - 前記1つ以上のプロセッサは更に、消費電力を制御するよう、経時的に前記閾値を異なる値に動的に設定するよう構成される、請求項11に記載の装置。
- 非一時的コンピュータ読取可能記憶媒体であって、実行時に、1つ以上のプロセッサに、
複数のリソースの第1の非ゼロサブセットの使用量を決定することであって、前記複数のリソースがサーモメータデータ構造に従って割当てられ、且つ解放される、決定することと、
前記複数のリソースの前記第1の非ゼロサブセットの前記使用量を、前記複数のリソースの前記第1の非ゼロサブセットを前記複数のリソースの第2の非ゼロサブセットから分離する閾値と比較することと、
前記比較に少なくとも基づいて、前記複数のリソースの前記第2の非ゼロサブセットの電源をオンにすることと
を行わせる命令を格納している非一時的コンピュータ読取可能記憶媒体。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US14/546,914 US9417961B2 (en) | 2014-11-18 | 2014-11-18 | Resource allocation and deallocation for power management in devices |
US14/546,914 | 2014-11-18 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016105273A true JP2016105273A (ja) | 2016-06-09 |
JP6250613B2 JP6250613B2 (ja) | 2017-12-20 |
Family
ID=55132624
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015223213A Expired - Fee Related JP6250613B2 (ja) | 2014-11-18 | 2015-11-13 | 装置における電源管理のためのリソース割当及び解除 |
Country Status (10)
Country | Link |
---|---|
US (1) | US9417961B2 (ja) |
JP (1) | JP6250613B2 (ja) |
KR (1) | KR101876001B1 (ja) |
CN (1) | CN105607721B (ja) |
AU (1) | AU2015258208B2 (ja) |
CA (1) | CA2911982A1 (ja) |
DE (1) | DE102015014851B4 (ja) |
FR (1) | FR3028656A1 (ja) |
GB (1) | GB2533688B (ja) |
IE (1) | IE20150399A1 (ja) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104348764B (zh) * | 2013-07-31 | 2017-09-19 | 国际商业机器公司 | 在数据接收链路中分配计算单元的方法和装置 |
US9910465B2 (en) * | 2014-11-11 | 2018-03-06 | Microsoft Technology Licensing, Llc | Covered radius hinge |
US9625954B2 (en) | 2014-11-26 | 2017-04-18 | Microsoft Technology Licensing, Llc | Multi-pivot hinge |
US9851759B2 (en) | 2014-12-31 | 2017-12-26 | Microsoft Technology Licensing, Llc | Multi-pivot hinge cover |
US10174534B2 (en) | 2015-01-27 | 2019-01-08 | Microsoft Technology Licensing, Llc | Multi-pivot hinge |
US20160246715A1 (en) * | 2015-02-23 | 2016-08-25 | Advanced Micro Devices, Inc. | Memory module with volatile and non-volatile storage arrays |
US9720604B2 (en) * | 2015-08-06 | 2017-08-01 | Sandisk Technologies Llc | Block storage protocol to RAM bypass |
US10162389B2 (en) | 2015-09-25 | 2018-12-25 | Microsoft Technology Licensing, Llc | Covered multi-axis hinge |
US10453502B2 (en) | 2016-04-04 | 2019-10-22 | Micron Technology, Inc. | Memory bank power coordination including concurrently performing a memory operation in a selected number of memory regions |
CN107733552B (zh) | 2016-08-12 | 2020-04-03 | 华为技术有限公司 | 数据传输方法和装置 |
US10437293B2 (en) | 2016-09-23 | 2019-10-08 | Microsoft Technology Licensing, Llc | Multi-axis hinge |
US10705885B2 (en) * | 2018-01-31 | 2020-07-07 | Palo Alto Networks, Inc. | Autoscaling of data processing computing systems based on predictive queue length |
US11687277B2 (en) | 2018-12-31 | 2023-06-27 | Micron Technology, Inc. | Arbitration techniques for managed memory |
US11237617B2 (en) * | 2018-12-31 | 2022-02-01 | Micron Technology, Inc. | Arbitration techniques for managed memory |
US11194511B2 (en) * | 2018-12-31 | 2021-12-07 | Micron Technology, Inc. | Arbitration techniques for managed memory |
US11249657B2 (en) | 2019-07-10 | 2022-02-15 | Arm Limited | Non-volatile storage circuitry accessible as primary storage for processing circuitry |
US11665776B2 (en) | 2019-12-27 | 2023-05-30 | Arteris, Inc. | System and method for synthesis of a network-on-chip for deadlock-free transformation |
US11657203B2 (en) | 2019-12-27 | 2023-05-23 | Arteris, Inc. | Multi-phase topology synthesis of a network-on-chip (NoC) |
US10990724B1 (en) | 2019-12-27 | 2021-04-27 | Arteris, Inc. | System and method for incremental topology synthesis of a network-on-chip |
US11558259B2 (en) | 2019-12-27 | 2023-01-17 | Arteris, Inc. | System and method for generating and using physical roadmaps in network synthesis |
KR20210103309A (ko) | 2020-02-13 | 2021-08-23 | 삼성전자주식회사 | 전원 공급 회로를 포함하는 스토리지 장치 및 이의 동작 방법 |
US11418448B2 (en) | 2020-04-09 | 2022-08-16 | Arteris, Inc. | System and method for synthesis of a network-on-chip to determine optimal path with load balancing |
US11330471B2 (en) * | 2020-06-22 | 2022-05-10 | T-Mobile Usa, Inc. | Simultaneous multi-path uplink transmissions to a telecommunications network |
CN111951866B (zh) * | 2020-10-19 | 2021-01-15 | 深圳市芯天下技术有限公司 | 非易失型闪存深睡眠低静态功耗的电路 |
US11601357B2 (en) | 2020-12-22 | 2023-03-07 | Arteris, Inc. | System and method for generation of quality metrics for optimization tasks in topology synthesis of a network |
US11281827B1 (en) | 2020-12-26 | 2022-03-22 | Arteris, Inc. | Optimization of parameters for synthesis of a topology using a discriminant function module |
US11449655B2 (en) | 2020-12-30 | 2022-09-20 | Arteris, Inc. | Synthesis of a network-on-chip (NoC) using performance constraints and objectives |
US11956127B2 (en) | 2021-03-10 | 2024-04-09 | Arteris, Inc. | Incremental topology modification of a network-on-chip |
US11960341B2 (en) | 2021-08-31 | 2024-04-16 | Apple Inc. | Power delivery reduction scheme for SoC |
CN114388008B (zh) * | 2022-01-14 | 2023-08-29 | 长鑫存储技术有限公司 | 电源控制电路及控制方法 |
US20230325097A1 (en) * | 2022-04-12 | 2023-10-12 | Dell Products L.P. | Selective powering of storage drive components in a storage node based on system performance limits |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007293442A (ja) * | 2006-04-21 | 2007-11-08 | Hitachi Ltd | ストレージシステム及びその制御方法 |
JP2008186108A (ja) * | 2007-01-29 | 2008-08-14 | Hitachi Ltd | 性能ボトルネックを緩和する機能を備えたストレージシステム |
JP2010271930A (ja) * | 2009-05-21 | 2010-12-02 | Toshiba Corp | マルチコアプロセッサシステム |
JP2012194911A (ja) * | 2011-03-17 | 2012-10-11 | Fujitsu Ltd | 情報処理装置、電力制御方法及び電力制御プログラム |
JP2012252602A (ja) * | 2011-06-03 | 2012-12-20 | Nippon Telegr & Teleph Corp <Ntt> | サーバ管理システム、サーバ管理装置、サーバ管理方法、及びサーバ管理プログラム |
JP2013149065A (ja) * | 2012-01-19 | 2013-08-01 | Nec Corp | サーバ、サーバの消費電力削減方法、およびコンピュータプログラム |
JP2013196672A (ja) * | 2012-03-23 | 2013-09-30 | Toshiba Corp | マルチプロセッサシステムおよび電力制御方法 |
JP2013210744A (ja) * | 2012-03-30 | 2013-10-10 | Fujitsu Ltd | ストレージ装置、起動装置決定方法およびプログラム |
US20140223205A1 (en) * | 2013-02-04 | 2014-08-07 | Ramnarayanan Muthukaruppan | Multiple voltage identification (vid) power architecture, a digital synthesizable low dropout regulator, and apparatus for improving reliability of power gates |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20030196126A1 (en) | 2002-04-11 | 2003-10-16 | Fung Henry T. | System, method, and architecture for dynamic server power management and dynamic workload management for multi-server environment |
US6742097B2 (en) * | 2001-07-30 | 2004-05-25 | Rambus Inc. | Consolidation of allocated memory to reduce power consumption |
US7219249B1 (en) | 2002-12-03 | 2007-05-15 | The Research Foundation Of State University Of New York | System and method for reducing power requirements of microprocessors through dynamic allocation of datapath resources |
US7007183B2 (en) | 2002-12-09 | 2006-02-28 | International Business Machines Corporation | Power conservation by turning off power supply to unallocated resources in partitioned data processing systems |
US7185215B2 (en) | 2003-02-24 | 2007-02-27 | International Business Machines Corporation | Machine code builder derived power consumption reduction |
US20040215912A1 (en) * | 2003-04-24 | 2004-10-28 | George Vergis | Method and apparatus to establish, report and adjust system memory usage |
US20060117160A1 (en) * | 2004-12-01 | 2006-06-01 | Intel Corporation | Method to consolidate memory usage to reduce power consumption |
US8041967B2 (en) | 2005-02-15 | 2011-10-18 | Hewlett-Packard Development Company, L.P. | System and method for controlling power to resources based on historical utilization data |
US7631162B2 (en) * | 2005-10-27 | 2009-12-08 | Sandisck Corporation | Non-volatile memory with adaptive handling of data writes |
US7971074B2 (en) | 2007-06-28 | 2011-06-28 | Intel Corporation | Method, system, and apparatus for a core activity detector to facilitate dynamic power management in a distributed system |
JP4461170B2 (ja) * | 2007-12-28 | 2010-05-12 | 株式会社東芝 | メモリシステム |
US20090228697A1 (en) * | 2008-03-07 | 2009-09-10 | Kabushiki Kaisha Toshiba | Information processing apparatus, storage drive and firmware update method |
US8291245B2 (en) * | 2008-04-17 | 2012-10-16 | International Business Machines Corporation | Method, apparatus and system for reducing power consumption based on storage device data migration |
US8271818B2 (en) | 2009-04-30 | 2012-09-18 | Hewlett-Packard Development Company, L.P. | Managing under-utilized resources in a computer |
US8429436B2 (en) * | 2009-09-09 | 2013-04-23 | Fusion-Io, Inc. | Apparatus, system, and method for power reduction in a storage device |
CN102141943A (zh) * | 2010-01-28 | 2011-08-03 | 建兴电子科技股份有限公司 | 闪存装置及其数据保护方法 |
US8213255B2 (en) * | 2010-02-19 | 2012-07-03 | Sandisk Technologies Inc. | Non-volatile storage with temperature compensation based on neighbor state information |
US9098521B2 (en) * | 2010-09-15 | 2015-08-04 | Qualcomm Incorporated | System and method for managing resources and threshsold events of a multicore portable computing device |
-
2014
- 2014-11-18 US US14/546,914 patent/US9417961B2/en active Active
-
2015
- 2015-11-11 GB GB1519886.4A patent/GB2533688B/en active Active
- 2015-11-12 IE IE20150399A patent/IE20150399A1/en not_active IP Right Cessation
- 2015-11-13 JP JP2015223213A patent/JP6250613B2/ja not_active Expired - Fee Related
- 2015-11-13 KR KR1020150159592A patent/KR101876001B1/ko active IP Right Grant
- 2015-11-13 CA CA2911982A patent/CA2911982A1/en not_active Abandoned
- 2015-11-16 FR FR1560938A patent/FR3028656A1/fr not_active Withdrawn
- 2015-11-16 DE DE102015014851.6A patent/DE102015014851B4/de active Active
- 2015-11-18 AU AU2015258208A patent/AU2015258208B2/en not_active Ceased
- 2015-11-18 CN CN201510795415.7A patent/CN105607721B/zh active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007293442A (ja) * | 2006-04-21 | 2007-11-08 | Hitachi Ltd | ストレージシステム及びその制御方法 |
JP2008186108A (ja) * | 2007-01-29 | 2008-08-14 | Hitachi Ltd | 性能ボトルネックを緩和する機能を備えたストレージシステム |
JP2010271930A (ja) * | 2009-05-21 | 2010-12-02 | Toshiba Corp | マルチコアプロセッサシステム |
JP2012194911A (ja) * | 2011-03-17 | 2012-10-11 | Fujitsu Ltd | 情報処理装置、電力制御方法及び電力制御プログラム |
JP2012252602A (ja) * | 2011-06-03 | 2012-12-20 | Nippon Telegr & Teleph Corp <Ntt> | サーバ管理システム、サーバ管理装置、サーバ管理方法、及びサーバ管理プログラム |
JP2013149065A (ja) * | 2012-01-19 | 2013-08-01 | Nec Corp | サーバ、サーバの消費電力削減方法、およびコンピュータプログラム |
JP2013196672A (ja) * | 2012-03-23 | 2013-09-30 | Toshiba Corp | マルチプロセッサシステムおよび電力制御方法 |
JP2013210744A (ja) * | 2012-03-30 | 2013-10-10 | Fujitsu Ltd | ストレージ装置、起動装置決定方法およびプログラム |
US20140223205A1 (en) * | 2013-02-04 | 2014-08-07 | Ramnarayanan Muthukaruppan | Multiple voltage identification (vid) power architecture, a digital synthesizable low dropout regulator, and apparatus for improving reliability of power gates |
Also Published As
Publication number | Publication date |
---|---|
CN105607721A (zh) | 2016-05-25 |
DE102015014851B4 (de) | 2020-07-09 |
US9417961B2 (en) | 2016-08-16 |
GB2533688B (en) | 2019-07-03 |
KR20160059430A (ko) | 2016-05-26 |
FR3028656A1 (ja) | 2016-05-20 |
GB201519886D0 (en) | 2015-12-23 |
JP6250613B2 (ja) | 2017-12-20 |
DE102015014851A1 (de) | 2016-05-19 |
CN105607721B (zh) | 2018-10-09 |
IE20150399A1 (en) | 2016-06-29 |
AU2015258208B2 (en) | 2017-10-19 |
AU2015258208A1 (en) | 2016-06-02 |
GB2533688A (en) | 2016-06-29 |
US20160139639A1 (en) | 2016-05-19 |
KR101876001B1 (ko) | 2018-07-06 |
CA2911982A1 (en) | 2016-05-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6250613B2 (ja) | 装置における電源管理のためのリソース割当及び解除 | |
US11068170B2 (en) | Multi-tier scheme for logical storage management | |
US10614888B2 (en) | Memory system that selectively writes in single-level cell mode or multi-level cell mode to reduce program/erase cycles | |
JP7366795B2 (ja) | メモリシステムおよび制御方法 | |
US20160210060A1 (en) | Dynamic resource allocation within storage devices | |
JP6163532B2 (ja) | メモリシステムコントローラを含む装置 | |
EP2396729B1 (en) | Memory system and method of controlling memory system | |
US10642513B2 (en) | Partially de-centralized latch management architectures for storage devices | |
US20120311197A1 (en) | Apparatus including memory system controllers and related methods | |
CN108228473B (zh) | 通过动态地传送存储器范围分配的负载平衡的方法及*** | |
JP7353934B2 (ja) | メモリシステムおよび制御方法 | |
US11868652B2 (en) | Utilization based dynamic shared buffer in data storage system | |
CN113924545A (zh) | 基于存储器子***中的媒体单元的可用性的预测性数据传输 | |
JP2022171773A (ja) | メモリシステムおよび制御方法 | |
CN115458013A (zh) | 存储装置及其操作方法 | |
CN107766262B (zh) | 调节并发写命令数量的方法与装置 | |
US11847323B1 (en) | Data storage device and method for host buffer management | |
US20230315335A1 (en) | Data Storage Device and Method for Executing a Low-Priority Speculative Read Command from a Host |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20161026 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20161101 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170127 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20170321 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20170620 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20170807 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20170815 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20170825 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20170920 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20171024 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20171122 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6250613 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |