JP2016058581A - Semiconductor device manufacturing method - Google Patents
Semiconductor device manufacturing method Download PDFInfo
- Publication number
- JP2016058581A JP2016058581A JP2014184378A JP2014184378A JP2016058581A JP 2016058581 A JP2016058581 A JP 2016058581A JP 2014184378 A JP2014184378 A JP 2014184378A JP 2014184378 A JP2014184378 A JP 2014184378A JP 2016058581 A JP2016058581 A JP 2016058581A
- Authority
- JP
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- Prior art keywords
- semiconductor chip
- substrate
- semiconductor device
- resin
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 144
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 46
- 239000000758 substrate Substances 0.000 claims abstract description 92
- 238000000034 method Methods 0.000 claims abstract description 57
- 229920005989 resin Polymers 0.000 claims description 44
- 239000011347 resin Substances 0.000 claims description 44
- 239000000463 material Substances 0.000 claims description 26
- 239000005388 borosilicate glass Substances 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 8
- 239000010703 silicon Substances 0.000 claims description 8
- 239000010410 layer Substances 0.000 description 35
- 239000003822 epoxy resin Substances 0.000 description 32
- 229920000647 polyepoxide Polymers 0.000 description 32
- 229910000679 solder Inorganic materials 0.000 description 23
- 229920001187 thermosetting polymer Polymers 0.000 description 17
- 239000011342 resin composition Substances 0.000 description 14
- 238000010438 heat treatment Methods 0.000 description 11
- 238000005259 measurement Methods 0.000 description 11
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 10
- 230000000052 comparative effect Effects 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 239000002313 adhesive film Substances 0.000 description 7
- 229920003986 novolac Polymers 0.000 description 7
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 6
- IISBACLAFKSPIT-UHFFFAOYSA-N bisphenol A Chemical compound C=1C=C(O)C=CC=1C(C)(C)C1=CC=C(O)C=C1 IISBACLAFKSPIT-UHFFFAOYSA-N 0.000 description 6
- 238000001816 cooling Methods 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 5
- 239000004962 Polyamide-imide Substances 0.000 description 5
- 238000010276 construction Methods 0.000 description 5
- 229920006015 heat resistant resin Polymers 0.000 description 5
- 229920002312 polyamide-imide Polymers 0.000 description 5
- 239000002966 varnish Substances 0.000 description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- FXHOOIRPVKKKFG-UHFFFAOYSA-N N,N-Dimethylacetamide Chemical compound CN(C)C(C)=O FXHOOIRPVKKKFG-UHFFFAOYSA-N 0.000 description 4
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 4
- 230000001070 adhesive effect Effects 0.000 description 4
- PXKLMJQFEQBVLD-UHFFFAOYSA-N bisphenol F Chemical compound C1=CC(O)=CC=C1CC1=CC=C(O)C=C1 PXKLMJQFEQBVLD-UHFFFAOYSA-N 0.000 description 4
- 239000003795 chemical substances by application Substances 0.000 description 4
- 239000011889 copper foil Substances 0.000 description 4
- ZUOUZKKEUPVFJK-UHFFFAOYSA-N diphenyl Chemical compound C1=CC=CC=C1C1=CC=CC=C1 ZUOUZKKEUPVFJK-UHFFFAOYSA-N 0.000 description 4
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 4
- 238000002844 melting Methods 0.000 description 4
- 230000008018 melting Effects 0.000 description 4
- -1 phosphorus compound Chemical class 0.000 description 4
- SECXISVLQFMRJM-UHFFFAOYSA-N N-Methylpyrrolidone Chemical compound CN1CCCC1=O SECXISVLQFMRJM-UHFFFAOYSA-N 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 description 3
- 239000004305 biphenyl Substances 0.000 description 3
- 235000010290 biphenyl Nutrition 0.000 description 3
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- 239000011521 glass Substances 0.000 description 3
- 230000005484 gravity Effects 0.000 description 3
- RAXXELZNTBOGNW-UHFFFAOYSA-N imidazole Natural products C1=CNC=N1 RAXXELZNTBOGNW-UHFFFAOYSA-N 0.000 description 3
- 239000011256 inorganic filler Substances 0.000 description 3
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- 238000007747 plating Methods 0.000 description 3
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- 239000000126 substance Substances 0.000 description 3
- JYEUMXHLPRZUAT-UHFFFAOYSA-N 1,2,3-triazine Chemical compound C1=CN=NN=C1 JYEUMXHLPRZUAT-UHFFFAOYSA-N 0.000 description 2
- HECLRDQVFMWTQS-RGOKHQFPSA-N 1755-01-7 Chemical compound C1[C@H]2[C@@H]3CC=C[C@@H]3[C@@H]1C=C2 HECLRDQVFMWTQS-RGOKHQFPSA-N 0.000 description 2
- QTWJRLJHJPIABL-UHFFFAOYSA-N 2-methylphenol;3-methylphenol;4-methylphenol Chemical compound CC1=CC=C(O)C=C1.CC1=CC=CC(O)=C1.CC1=CC=CC=C1O QTWJRLJHJPIABL-UHFFFAOYSA-N 0.000 description 2
- JYLNVJYYQQXNEK-UHFFFAOYSA-N 3-amino-2-(4-chlorophenyl)-1-propanesulfonic acid Chemical compound OS(=O)(=O)CC(CN)C1=CC=C(Cl)C=C1 JYLNVJYYQQXNEK-UHFFFAOYSA-N 0.000 description 2
- VTYYLEPIZMXCLO-UHFFFAOYSA-L Calcium carbonate Chemical compound [Ca+2].[O-]C([O-])=O VTYYLEPIZMXCLO-UHFFFAOYSA-L 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- UFWIBTONFRDIAS-UHFFFAOYSA-N Naphthalene Chemical compound C1=CC=CC2=CC=CC=C21 UFWIBTONFRDIAS-UHFFFAOYSA-N 0.000 description 2
- 239000004952 Polyamide Substances 0.000 description 2
- 239000004697 Polyetherimide Substances 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- MWPLVEDNUUSJAV-UHFFFAOYSA-N anthracene Chemical compound C1=CC=CC2=CC3=CC=CC=C3C=C21 MWPLVEDNUUSJAV-UHFFFAOYSA-N 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- TZCXTZWJZNENPQ-UHFFFAOYSA-L barium sulfate Chemical compound [Ba+2].[O-]S([O-])(=O)=O TZCXTZWJZNENPQ-UHFFFAOYSA-L 0.000 description 2
- 239000002131 composite material Substances 0.000 description 2
- 229920001577 copolymer Polymers 0.000 description 2
- 229930003836 cresol Natural products 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000006073 displacement reaction Methods 0.000 description 2
- 239000003365 glass fiber Substances 0.000 description 2
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 2
- FPYJFEHAWHCUMM-UHFFFAOYSA-N maleic anhydride Chemical compound O=C1OC(=O)C=C1 FPYJFEHAWHCUMM-UHFFFAOYSA-N 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 239000007800 oxidant agent Substances 0.000 description 2
- 150000002989 phenols Chemical class 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 229920002647 polyamide Polymers 0.000 description 2
- 229920001601 polyetherimide Polymers 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 239000012286 potassium permanganate Substances 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- DJOYTAUERRJRAT-UHFFFAOYSA-N 2-(n-methyl-4-nitroanilino)acetonitrile Chemical compound N#CCN(C)C1=CC=C([N+]([O-])=O)C=C1 DJOYTAUERRJRAT-UHFFFAOYSA-N 0.000 description 1
- 125000003903 2-propenyl group Chemical group [H]C([*])([H])C([H])=C([H])[H] 0.000 description 1
- CMLFRMDBDNHMRA-UHFFFAOYSA-N 2h-1,2-benzoxazine Chemical compound C1=CC=C2C=CNOC2=C1 CMLFRMDBDNHMRA-UHFFFAOYSA-N 0.000 description 1
- UIDDPPKZYZTEGS-UHFFFAOYSA-N 3-(2-ethyl-4-methylimidazol-1-yl)propanenitrile Chemical compound CCC1=NC(C)=CN1CCC#N UIDDPPKZYZTEGS-UHFFFAOYSA-N 0.000 description 1
- UPMLOUAZCHDJJD-UHFFFAOYSA-N 4,4'-Diphenylmethane Diisocyanate Chemical compound C1=CC(N=C=O)=CC=C1CC1=CC=C(N=C=O)C=C1 UPMLOUAZCHDJJD-UHFFFAOYSA-N 0.000 description 1
- VPWNQTHUCYMVMZ-UHFFFAOYSA-N 4,4'-sulfonyldiphenol Chemical compound C1=CC(O)=CC=C1S(=O)(=O)C1=CC=C(O)C=C1 VPWNQTHUCYMVMZ-UHFFFAOYSA-N 0.000 description 1
- DZIHTWJGPDVSGE-UHFFFAOYSA-N 4-[(4-aminocyclohexyl)methyl]cyclohexan-1-amine Chemical compound C1CC(N)CCC1CC1CCC(N)CC1 DZIHTWJGPDVSGE-UHFFFAOYSA-N 0.000 description 1
- 229910002012 Aerosil® Inorganic materials 0.000 description 1
- 238000007088 Archimedes method Methods 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910052582 BN Inorganic materials 0.000 description 1
- 229920002799 BoPET Polymers 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- MQJKPEGWNLWLTK-UHFFFAOYSA-N Dapsone Chemical compound C1=CC(N)=CC=C1S(=O)(=O)C1=CC=C(N)C=C1 MQJKPEGWNLWLTK-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910005540 GaP Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 239000004640 Melamine resin Substances 0.000 description 1
- 229920000877 Melamine resin Polymers 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- LGRFSURHDFAFJT-UHFFFAOYSA-N Phthalic anhydride Natural products C1=CC=C2C(=O)OC(=O)C2=C1 LGRFSURHDFAFJT-UHFFFAOYSA-N 0.000 description 1
- 239000004693 Polybenzimidazole Substances 0.000 description 1
- 239000005062 Polybutadiene Substances 0.000 description 1
- 229910007637 SnAg Inorganic materials 0.000 description 1
- 229910008433 SnCU Inorganic materials 0.000 description 1
- PJANXHGTPQOBST-VAWYXSNFSA-N Stilbene Natural products C=1C=CC=CC=1/C=C/C1=CC=CC=C1 PJANXHGTPQOBST-VAWYXSNFSA-N 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- 229920004738 ULTEM® Polymers 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 150000008065 acid anhydrides Chemical class 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 125000002723 alicyclic group Chemical group 0.000 description 1
- WNROFYMDJYEPJX-UHFFFAOYSA-K aluminium hydroxide Chemical compound [OH-].[OH-].[OH-].[Al+3] WNROFYMDJYEPJX-UHFFFAOYSA-K 0.000 description 1
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- OJMOMXZKOWKUTA-UHFFFAOYSA-N aluminum;borate Chemical compound [Al+3].[O-]B([O-])[O-] OJMOMXZKOWKUTA-UHFFFAOYSA-N 0.000 description 1
- 125000003368 amide group Chemical group 0.000 description 1
- 125000003277 amino group Chemical group 0.000 description 1
- 229920003180 amino resin Polymers 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 229910021523 barium zirconate Inorganic materials 0.000 description 1
- DQBAOWPVHRWLJC-UHFFFAOYSA-N barium(2+);dioxido(oxo)zirconium Chemical compound [Ba+2].[O-][Zr]([O-])=O DQBAOWPVHRWLJC-UHFFFAOYSA-N 0.000 description 1
- 229910002115 bismuth titanate Inorganic materials 0.000 description 1
- JHIWVOJDXOSYLW-UHFFFAOYSA-N butyl 2,2-difluorocyclopropane-1-carboxylate Chemical compound CCCCOC(=O)C1CC1(F)F JHIWVOJDXOSYLW-UHFFFAOYSA-N 0.000 description 1
- 229910000019 calcium carbonate Inorganic materials 0.000 description 1
- AOWKSNWVBZGMTJ-UHFFFAOYSA-N calcium titanate Chemical compound [Ca+2].[O-][Ti]([O-])=O AOWKSNWVBZGMTJ-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000004927 clay Substances 0.000 description 1
- 229910052570 clay Inorganic materials 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- XLJMAIOERFSOGZ-UHFFFAOYSA-M cyanate Chemical compound [O-]C#N XLJMAIOERFSOGZ-UHFFFAOYSA-M 0.000 description 1
- 230000018044 dehydration Effects 0.000 description 1
- 238000006297 dehydration reaction Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- SOCTUWSJJQCPFX-UHFFFAOYSA-N dichromate(2-) Chemical compound [O-][Cr](=O)(=O)O[Cr]([O-])(=O)=O SOCTUWSJJQCPFX-UHFFFAOYSA-N 0.000 description 1
- QGBSISYHAICWAH-UHFFFAOYSA-N dicyandiamide Chemical compound NC(N)=NC#N QGBSISYHAICWAH-UHFFFAOYSA-N 0.000 description 1
- GYZLOYUZLJXAJU-UHFFFAOYSA-N diglycidyl ether Chemical class C1OC1COCC1CO1 GYZLOYUZLJXAJU-UHFFFAOYSA-N 0.000 description 1
- KZHJGOXRZJKJNY-UHFFFAOYSA-N dioxosilane;oxo(oxoalumanyloxy)alumane Chemical compound O=[Si]=O.O=[Si]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O.O=[Al]O[Al]=O KZHJGOXRZJKJNY-UHFFFAOYSA-N 0.000 description 1
- ZZTCPWRAHWXWCH-UHFFFAOYSA-N diphenylmethanediamine Chemical compound C=1C=CC=CC=1C(N)(N)C1=CC=CC=C1 ZZTCPWRAHWXWCH-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 125000003700 epoxy group Chemical group 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 125000003983 fluorenyl group Chemical group C1(=CC=CC=2C3=CC=CC=C3CC12)* 0.000 description 1
- 239000011888 foil Substances 0.000 description 1
- 229910021485 fumed silica Inorganic materials 0.000 description 1
- ANSXAPJVJOKRDJ-UHFFFAOYSA-N furo[3,4-f][2]benzofuran-1,3,5,7-tetrone Chemical compound C1=C2C(=O)OC(=O)C2=CC2=C1C(=O)OC2=O ANSXAPJVJOKRDJ-UHFFFAOYSA-N 0.000 description 1
- HZXMRANICFIONG-UHFFFAOYSA-N gallium phosphide Chemical compound [Ga]#P HZXMRANICFIONG-UHFFFAOYSA-N 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 150000002460 imidazoles Chemical class 0.000 description 1
- 125000005462 imide group Chemical group 0.000 description 1
- 150000003949 imides Chemical class 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 239000012948 isocyanate Substances 0.000 description 1
- 150000002513 isocyanates Chemical class 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 238000003475 lamination Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- ZLNQQNXFFQJAID-UHFFFAOYSA-L magnesium carbonate Chemical compound [Mg+2].[O-]C([O-])=O ZLNQQNXFFQJAID-UHFFFAOYSA-L 0.000 description 1
- 239000001095 magnesium carbonate Substances 0.000 description 1
- 229910000021 magnesium carbonate Inorganic materials 0.000 description 1
- VTHJTEIRLNZDEV-UHFFFAOYSA-L magnesium dihydroxide Chemical compound [OH-].[OH-].[Mg+2] VTHJTEIRLNZDEV-UHFFFAOYSA-L 0.000 description 1
- 239000000347 magnesium hydroxide Substances 0.000 description 1
- 229910001862 magnesium hydroxide Inorganic materials 0.000 description 1
- 239000000395 magnesium oxide Substances 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
- AXZKOIWUVFPNLO-UHFFFAOYSA-N magnesium;oxygen(2-) Chemical compound [O-2].[Mg+2] AXZKOIWUVFPNLO-UHFFFAOYSA-N 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000010445 mica Substances 0.000 description 1
- 229910052618 mica group Inorganic materials 0.000 description 1
- 239000012046 mixed solvent Substances 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229910052863 mullite Inorganic materials 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 150000007530 organic bases Chemical class 0.000 description 1
- 150000002903 organophosphorus compounds Chemical class 0.000 description 1
- AHHWIHXENZJRFG-UHFFFAOYSA-N oxetane Chemical compound C1COC1 AHHWIHXENZJRFG-UHFFFAOYSA-N 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920006122 polyamide resin Polymers 0.000 description 1
- 229920002480 polybenzimidazole Polymers 0.000 description 1
- 229920002577 polybenzoxazole Polymers 0.000 description 1
- 229920002857 polybutadiene Polymers 0.000 description 1
- 125000003367 polycyclic group Chemical group 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
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- 239000012925 reference material Substances 0.000 description 1
- 238000010992 reflux Methods 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- 238000007363 ring formation reaction Methods 0.000 description 1
- 150000003335 secondary amines Chemical class 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 229920002545 silicone oil Polymers 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- PJANXHGTPQOBST-UHFFFAOYSA-N stilbene Chemical compound C=1C=CC=CC=1C=CC1=CC=CC=C1 PJANXHGTPQOBST-UHFFFAOYSA-N 0.000 description 1
- 235000021286 stilbenes Nutrition 0.000 description 1
- VEALVRVVWBQVSL-UHFFFAOYSA-N strontium titanate Chemical compound [Sr+2].[O-][Ti]([O-])=O VEALVRVVWBQVSL-UHFFFAOYSA-N 0.000 description 1
- 238000003786 synthesis reaction Methods 0.000 description 1
- 239000000454 talc Substances 0.000 description 1
- 229910052623 talc Inorganic materials 0.000 description 1
- 150000003512 tertiary amines Chemical class 0.000 description 1
- 230000000930 thermomechanical effect Effects 0.000 description 1
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 description 1
- SRPWOOOHEPICQU-UHFFFAOYSA-N trimellitic anhydride Chemical compound OC(=O)C1=CC=C2C(=O)OC(=O)C2=C1 SRPWOOOHEPICQU-UHFFFAOYSA-N 0.000 description 1
- 229920006337 unsaturated polyester resin Polymers 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 1
- 125000006839 xylylene group Chemical group 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
Abstract
Description
本発明は、半導体装置の製造方法に関する。より詳しくは、タクトタイムが短く生産性に優れ、反りが小さい半導体装置を得ることができる、半導体装置の製造方法に関する。 The present invention relates to a method for manufacturing a semiconductor device. More specifically, the present invention relates to a method for manufacturing a semiconductor device, which can obtain a semiconductor device having a short tact time, excellent productivity, and small warpage.
従来、半導体チップと基板とのフリップチップ接続は、はんだボールを搭載した半導体チップを、室温にて基板と位置合わせをして搭載し、リフロー装置を用いてはんだボールを溶融することにより行っていた（例えば特許文献１参照）。この工法は一般的にＣ４（Ｃｏｎｔｒｏｌｌｅｄ Ｃｏｌｌａｐｓｅ Ｃｈｉｐ Ｃｏｎｎｅｃｔｉｏｎ）工法と呼ばれる。
Ｃ４工法によって半導体チップを実装する場合、十分な量のはんだボールを使用することにより、リフロー時に、溶融したはんだの表面張力による半導体チップのセルフアライメント効果が期待できる。
Conventionally, flip chip connection between a semiconductor chip and a substrate has been performed by mounting a semiconductor chip on which a solder ball is mounted, aligned with the substrate at room temperature, and melting the solder ball using a reflow device. (For example, refer to Patent Document 1). This construction method is generally called a C4 (Controlled Collapse Chip Connection) construction method.
When a semiconductor chip is mounted by the C4 method, a self-alignment effect of the semiconductor chip due to the surface tension of the molten solder can be expected at the time of reflow by using a sufficient amount of solder balls.
しかしながら、半導体素子の微細化の進展に伴い、半導体チップと基板とを接続する接続部も微細化が進んでいる。そのため、半導体チップの端子として、従来の丸みを帯びたはんだボールから、柱状の形状を有するはんだ付銅ピラーが用いられるようになっている。該はんだ付銅ピラーは、従来のはんだボールと比較すると、使用するはんだの体積が少ないため、半導体チップのセルフアライメント性が十分に得られない場合があり、Ｃ４工法の適用が困難になってきている。 However, with the progress of miniaturization of semiconductor elements, the miniaturization of connection portions connecting the semiconductor chip and the substrate is also progressing. Therefore, a soldered copper pillar having a columnar shape is used as a terminal of a semiconductor chip from a conventional round solder ball. Compared to conventional solder balls, the soldered copper pillar has a small volume of solder to be used, so that sufficient self-alignment of the semiconductor chip may not be obtained, making it difficult to apply the C4 method. Yes.
そこで、近年では、はんだ付銅ピラーの端子を有する半導体チップは、熱圧着（ＴＣＢ：Ｔｈｅｒｍａｌ Ｃｏｍｐｒｅｓｓｉｏｎ Ｂｏｎｄｉｎｇ）工法（以下、「ＴＣＢ工法」ともいう）により基板と接続している。
ＴＣＢ工法は、半導体チップの位置合わせをして基板に搭載すると同時に、熱及び圧力を加え、はんだを溶かしながら基板の端子に押し付けることによって、半導体チップと基板とを接続する方法である（例えば特許文献２参照）。
以下、ＴＣＢ工法について、図面を用いて説明する。
まず、図１に示すとおり、半導体チップ２を接続する基板６を、フリップチップボンダのステージ７に配置する。次に、絶縁性接着フィルムであるＮＣＦ（Ｎｏｎ−ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ）３、銅ポスト４、及びはんだ５を備えた半導体チップ２を、加熱及び吸着機構を備えたフリップチップボンダのヘッド１によりピックアップし、基板と半導体チップの位置認識を行い、相互に接続すべき電極が接続できるように位置合わせをする。
次いで、図２に示すとおり、半導体チップ２を基板６上に置き、電極間を接触させた上で、ヘッド１が備える加熱装置により加熱しながら加圧し、はんだを溶融させて、半導体チップ２と基板６とを接続する。
接続後は、図３に示すとおり、次に接続される半導体チップ９を受け渡し可能な温度になるまでヘッドを冷却する。
Therefore, in recent years, a semiconductor chip having terminals of soldered copper pillars is connected to a substrate by a thermal compression bonding (TCB) method (hereinafter also referred to as “TCB method”).
The TCB method is a method of connecting a semiconductor chip and a substrate by aligning the semiconductor chip and mounting it on the substrate, and simultaneously applying heat and pressure to the terminal of the substrate while melting the solder (for example, patents). Reference 2).
Hereinafter, the TCB method will be described with reference to the drawings.
First, as shown in FIG. 1, a substrate 6 to which a semiconductor chip 2 is connected is placed on a stage 7 of a flip chip bonder. Next, the semiconductor chip 2 provided with the NCF (Non-Conductive Film) 3, the copper post 4, and the solder 5, which is an insulating adhesive film, is picked up by the head 1 of the flip chip bonder provided with a heating and suction mechanism, The positions of the substrate and the semiconductor chip are recognized and aligned so that the electrodes to be connected to each other can be connected.
Next, as shown in FIG. 2, the semiconductor chip 2 is placed on the substrate 6, and the electrodes are brought into contact with each other. Then, the semiconductor chip 2 is heated and heated by a heating device provided in the head 1 to melt the solder. The substrate 6 is connected.
After the connection, as shown in FIG. 3, the head is cooled to a temperature at which the next semiconductor chip 9 to be connected can be delivered.
ここで、半導体チップを基板に実装する際に、反りの発生が問題になることがある。半導体チップと基板とをリフロー装置で接続するＣ４工法においては、はんだ溶融時に半導体チップ及び基板が同じ温度となるため、はんだが凝固した時点から室温までの、半導体チップと基板との熱膨張量の差が反りの原因となる。そのため、はんだが凝固した時点から室温までにおける、半導体チップと基板との平均熱膨張率を同一にすることができれば、原理的に反りを無くすことができる。Ｃ４工法における反りの低減方法としては、例えば、特許文献３に開示される方法が知られている。 Here, when a semiconductor chip is mounted on a substrate, the occurrence of warping may be a problem. In the C4 method in which the semiconductor chip and the substrate are connected by the reflow apparatus, the temperature of the semiconductor chip and the substrate from the time when the solder solidifies to the room temperature is increased because the temperature of the semiconductor chip and the substrate is the same when the solder is melted. The difference causes warping. Therefore, if the average thermal expansion coefficient of the semiconductor chip and the substrate from the time when the solder solidifies to the room temperature can be made the same, the warp can be eliminated in principle. As a method for reducing warpage in the C4 method, for example, a method disclosed in Patent Document 3 is known.
一方、ＴＣＢ工法においては、搭載する半導体チップを、フリップチップボンダのヘッド側から加熱するため、半導体チップの温度が、基板の温度より相対的に高くなり、半導体チップ及び基板は、はんだ溶融時に同じ温度にならない。このため、はんだが凝固した時点から室温までにおける、半導体チップと基板との平均熱膨張率を同一にするのみでは反りを無くすことはできない。 On the other hand, in the TCB method, since the semiconductor chip to be mounted is heated from the head side of the flip chip bonder, the temperature of the semiconductor chip becomes relatively higher than the temperature of the substrate, and the semiconductor chip and the substrate are the same when the solder is melted. Does not reach temperature. For this reason, it is not possible to eliminate the warp only by making the average thermal expansion coefficient of the semiconductor chip and the substrate the same from the time when the solder is solidified to the room temperature.
また、Ｃ４工法において、フリップチップボンダを用いる工程は、室温で半導体チップの位置合わせをして、基板に搭載する工程だけであるのに対し、ＴＣＢ工法では、半導体チップの位置合わせ、搭載、加熱及び加圧、並びに半導体チップを受け渡せる温度までヘッドを冷却する工程が必要である。そのため、ＴＣＢ工法のタクトタイムはＣ４工法と比較すると長くなる傾向にあり、タクトタイムの短縮が望まれている。 In the C4 method, the flip chip bonder is used only for aligning the semiconductor chip at room temperature and mounting it on the substrate, whereas in the TCB method, the semiconductor chip is aligned, mounted and heated. And a step of cooling the head to a temperature at which the semiconductor chip can be delivered and pressurized. For this reason, the tact time of the TCB method tends to be longer than that of the C4 method, and a reduction in the tact time is desired.
本発明は、タクトタイムが短く生産性に優れ、反りが小さい半導体装置を得ることができる、半導体装置の製造方法を提供することを目的とする。 An object of the present invention is to provide a method for manufacturing a semiconductor device, which can obtain a semiconductor device having a short tact time, excellent productivity, and small warpage.
本発明者等は上記の課題を解決すべく検討を進めた結果、下記の本発明により当該課題を解決できることを見出した。
すなわち、本発明は、下記［１］〜［６］を提供する。
［１］熱圧着工法により半導体チップと半導体チップ搭載用基板とを接続する工程を有する半導体装置の製造方法であって、
該半導体チップ搭載用基板の面方向の熱膨張率（αｓ）が、接続する半導体チップの面方向の熱膨張率（αｃ）より、０．２×１０-6／℃以上、１．６×１０-6／℃以下大きく、かつ該半導体チップ搭載用基板の厚さ方向の熱伝導率が０．１Ｗ／ｍＫ以上、１０．０Ｗ／ｍＫ以下である、半導体装置の製造方法。
［２］前記半導体チップの材質がシリコンであり、前記半導体チップ搭載用基板がホウケイ酸ガラスを含有する材質層を含む、上記［１］に記載の半導体装置の製造方法。
［３］前記ホウケイ酸ガラスを含有する材質層の厚さが、２０〜８００μｍである、上記［２］に記載の半導体装置の製造方法。
［４］前記半導体チップ搭載用基板が、更に樹脂硬化物層を含む、上記［１］〜［３］のいずれかに記載の半導体装置の製造方法。
［５］前記半導体チップ搭載用基板の厚さが、２５〜１０００μｍである、上記［１］〜［４］のいずれかに記載の半導体装置の製造方法。
［６］前記半導体チップ搭載用基板の面方向の熱膨張率（αｓ）が、１．０×１０-6／℃以上、１０．０×１０-6／℃以下である、上記［１］〜［５］のいずれかに記載の半導体装置の製造方法。
As a result of investigations to solve the above problems, the present inventors have found that the problems can be solved by the following present invention.
That is, the present invention provides the following [1] to [6].
[1] A method for manufacturing a semiconductor device comprising a step of connecting a semiconductor chip and a semiconductor chip mounting substrate by a thermocompression bonding method,
The thermal expansion coefficient (αs) in the surface direction of the semiconductor chip mounting substrate is 0.2 × 10 −6 / ° C. or more, 1.6 × 10 6 from the thermal expansion coefficient (αc) in the surface direction of the semiconductor chip to be connected. A method for manufacturing a semiconductor device, wherein the semiconductor chip mounting substrate has a thermal conductivity in the thickness direction of from 0.1 W / mK to 10.0 W / mK.
[2] The method for manufacturing a semiconductor device according to [1], wherein the material of the semiconductor chip is silicon, and the semiconductor chip mounting substrate includes a material layer containing borosilicate glass.
[3] The method for manufacturing a semiconductor device according to [2], wherein the material layer containing the borosilicate glass has a thickness of 20 to 800 μm.
[4] The method for manufacturing a semiconductor device according to any one of [1] to [3], wherein the semiconductor chip mounting substrate further includes a cured resin layer.
[5] The method for manufacturing a semiconductor device according to any one of [1] to [4], wherein the semiconductor chip mounting substrate has a thickness of 25 to 1000 μm.
[6] The thermal expansion coefficient (αs) in the surface direction of the semiconductor chip mounting substrate is 1.0 × 10 −6 / ° C. or higher and 10.0 × 10 −6 / ° C. or lower. [5] The method for manufacturing a semiconductor device according to any one of [5].
本発明によれば、タクトタイムが短く生産性に優れ、反りが小さい半導体装置を得ることができる、半導体装置の製造方法を提供することができる。 ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of a semiconductor device which can obtain a semiconductor device with short tact time, excellent productivity, and small warpage can be provided.
［半導体装置の製造方法］
本発明の製造方法は、熱圧着工法により半導体チップと半導体チップ搭載用基板とを接続する工程を有する半導体装置の製造方法であって、該半導体チップ搭載用基板（以下、単に「基板」ともいう）の面方向の熱膨張率（αｓ）が、接続する半導体チップの面方向の熱膨張率（αｃ）より、０．２×１０-6／℃以上、１．６×１０-6／℃以下大きく、かつ該半導体チップ搭載用基板の厚さ方向の熱伝導率が０．１Ｗ／ｍＫ以上、１０．０Ｗ／ｍＫ以下であることを特徴とする。
[Method for Manufacturing Semiconductor Device]
The manufacturing method of the present invention is a method of manufacturing a semiconductor device including a step of connecting a semiconductor chip and a semiconductor chip mounting substrate by a thermocompression bonding method, and this semiconductor chip mounting substrate (hereinafter also simply referred to as “substrate”). ) In the plane direction is 0.2 × 10 −6 / ° C. or more and 1.6 × 10 −6 / ° C. or less based on the thermal expansion coefficient (αc) in the surface direction of the semiconductor chip to be connected. It is large, and the thermal conductivity in the thickness direction of the semiconductor chip mounting substrate is not less than 0.1 W / mK and not more than 10.0 W / mK.
本発明の製造方法が、タクトタイムが短く生産性に優れ、反りが小さい半導体装置を得ることができる理由は定かではないが、以下のように考えられる。
ＴＣＢ工法における半導体チップの位置合わせ、及び搭載に要する時間はフリップチップボンダの能力に依存するところが大きい。一方、半導体チップの加熱加圧時間、及び半導体チップを受け渡せる温度までのヘッドの冷却時間は、基板の熱伝導率が影響する。
本発明の製造方法は、用いる基板の厚さ方向の熱伝導率を十分小さくすることにより、フリップチップボンダのステージへ逃げる熱量を低減することができると考えられる。これによって、加熱加圧時のヘッド温度の昇温に要する熱量を最小限に抑えることができるため、加熱時間を最小限にできると共に、半導体チップを受け渡せる温度までのヘッドの冷却時間も最小限にでき、タクトタイムを短縮することができると考えられる。
また、本発明の製造方法に用いる基板は、面方向の熱膨張率（αｓ）が、接続する半導体チップの面方向の熱膨張率（αｃ）より、０．２×１０-6／℃以上、１．６×１０-6／℃以下大きいものである。このように、本発明の製造方法に用いる基板の熱膨張率（αｓ）は、搭載される半導体チップに対して相対的に定義される範囲を有する。一般的に半導体チップに使用されるシリコン結晶は、熱膨張率の結晶方位依存性があり、文献によって２．５×１０-6〜３．４×１０-6／℃の幅がある。そこで、本発明の製造方法では、搭載する半導体チップの熱膨張率（αｃ）を測定し、得られた熱膨張率（αｃ）より特定の範囲大きい熱膨張率（αｓ）を有する基板を用いることにより、ＴＣＢ工法における基板と半導体チップとの熱膨張量を整合させることができ、反りを小さくできるものと考えられる。
The reason why the manufacturing method of the present invention can provide a semiconductor device with a short tact time, excellent productivity, and small warpage is not clear, but is considered as follows.
The time required for the alignment and mounting of the semiconductor chip in the TCB method greatly depends on the ability of the flip chip bonder. On the other hand, the heat conductivity of the substrate affects the heating and pressing time of the semiconductor chip and the cooling time of the head to a temperature at which the semiconductor chip can be delivered.
In the manufacturing method of the present invention, it is considered that the amount of heat escaping to the stage of the flip chip bonder can be reduced by sufficiently reducing the thermal conductivity in the thickness direction of the substrate to be used. This minimizes the amount of heat required to raise the head temperature during heating and pressurization, thus minimizing the heating time and minimizing the cooling time of the head to a temperature at which the semiconductor chip can be delivered. It is thought that the tact time can be shortened.
Further, the substrate used in the manufacturing method of the present invention has a thermal expansion coefficient (αs) in the plane direction of 0.2 × 10 −6 / ° C. or more from the thermal expansion coefficient (αc) in the plane direction of the semiconductor chip to be connected, 1.6 × 10 −6 / ° C. or less. Thus, the coefficient of thermal expansion (αs) of the substrate used in the manufacturing method of the present invention has a range that is defined relative to the semiconductor chip to be mounted. Generally, a silicon crystal used for a semiconductor chip has a crystal orientation dependency of a thermal expansion coefficient, and has a width of 2.5 × 10 −6 to 3.4 × 10 −6 / ° C. according to literature. Therefore, in the manufacturing method of the present invention, the coefficient of thermal expansion (αc) of the semiconductor chip to be mounted is measured, and a substrate having a coefficient of thermal expansion (αs) larger than the obtained coefficient of thermal expansion (αc) by a specific range is used. Thus, it is considered that the thermal expansion amounts of the substrate and the semiconductor chip in the TCB method can be matched, and the warpage can be reduced.
＜半導体チップ搭載用基板＞
本発明の製造方法に用いる半導体チップ搭載用基板は、面方向の熱膨張率（αｓ）が、接続する半導体チップの面方向の熱膨張率（αｃ）より、０．２×１０-6／℃以上、１．６×１０-6／℃以下大きく、かつ厚さ方向の熱伝導率が０．１Ｗ／ｍＫ以上、１０．０Ｗ／ｍＫ以下である。
<Semiconductor chip mounting board>
The semiconductor chip mounting substrate used in the manufacturing method of the present invention has a thermal expansion coefficient (αs) in the plane direction of 0.2 × 10 −6 / ° C. from the thermal expansion coefficient (αc) in the plane direction of the semiconductor chip to be connected. As described above, it is 1.6 × 10 −6 / ° C. or less larger and the thermal conductivity in the thickness direction is 0.1 W / mK or more and 10.0 W / mK or less.
（面方向の熱膨張率（αｓ））
本発明に用いる基板の面方向の熱膨張率（αｓ）は、得られる半導体装置の反りを低減する観点から、接続する半導体チップの面方向の熱膨張率（αｃ）より、０．２×１０-6／℃以上、１．６×１０-6／℃以下大きく、０．３×１０-6／℃以上、１．５×１０-6／℃以下大きいことが好ましく、０．４×１０-6／℃以上、１．４×１０-6／℃以下大きいことがより好ましい。
なお、熱膨張率（αｓ）及び熱膨張率（αｃ）は、同一の装置及び測定方法により測定される値であり、具体的には実施例に記載の方法により測定することができる。
熱膨張率（αｓ）は、上記範囲を満たすものであれば、特に限定されないが、例えば、１．０×１０-6／℃以上、１０．０×１０-6／℃以下、好ましくは２．０×１０-6／℃以上、８．０×１０-6／℃以下、より好ましくは３．０×１０-6／℃以上、６．０×１０-6／℃以下である。
(Coefficient of thermal expansion in the surface direction (αs))
The thermal expansion coefficient (αs) in the surface direction of the substrate used in the present invention is 0.2 × 10 from the thermal expansion coefficient (αc) in the surface direction of the semiconductor chip to be connected from the viewpoint of reducing warpage of the obtained semiconductor device. -6 / ° C. or higher, 1.6 × 10 -6 / ℃ greater or less, 0.3 × 10 -6 / ℃ or higher, preferably greater 1.5 × 10 -6 / ℃ less, 0.4 × 10 - More preferably 6 / ° C. or more and 1.4 × 10 −6 / ° C. or more.
The thermal expansion coefficient (αs) and the thermal expansion coefficient (αc) are values measured by the same apparatus and measurement method, and can be specifically measured by the method described in the examples.
The coefficient of thermal expansion (αs) is not particularly limited as long as it satisfies the above range, but is, for example, 1.0 × 10 −6 / ° C. or higher and 10.0 × 10 −6 / ° C. or lower, preferably 2. It is 0 × 10 −6 / ° C. or more and 8.0 × 10 −6 / ° C. or less, more preferably 3.0 × 10 −6 / ° C. or more and 6.0 × 10 −6 / ° C. or less.
（厚さ方向の熱伝導率）
本発明に用いる基板の厚さ方向の熱伝導率は、タクトタイムを短縮する観点、並びに汎用性及び入手容易性の観点から、０．１Ｗ／ｍＫ以上、１０．０Ｗ／ｍＫ以下であり、０．１５Ｗ／ｍＫ以上、５．０Ｗ／ｍＫ以下が好ましく、０．２Ｗ／ｍＫ以上、３．０Ｗ／ｍＫ以下がより好ましい。
(Thermal conductivity in the thickness direction)
The thermal conductivity in the thickness direction of the substrate used in the present invention is 0.1 W / mK or more and 10.0 W / mK or less from the viewpoint of shortening the tact time and versatility and availability. .15 W / mK or more and 5.0 W / mK or less is preferable, and 0.2 W / mK or more and 3.0 W / mK or less is more preferable.
本発明に用いる基板の材質は、熱膨張率（αｓ）及び厚さ方向の熱伝導率が上記範囲を満たすものであれば特に限定されるものではない。半導体チップの材質としてシリコンを用いた半導体装置である場合、基板としては、例えば、ホウケイ酸ガラス、ムライトを含有する材質層（以下、単に「材質層」ともいう）を有することが好ましい。また、熱膨張率（αｓ）を上記範囲に調整した、ガラス繊維基材と熱硬化性樹脂組成物とを含有する複合材を硬化してなる材質層を有することも好ましい。
ホウケイ酸ガラスを含有する材質層の厚さは、基板の薄型化、加工性、及び取扱いの容易性の観点から、好ましくは２０〜８００μｍ、より好ましくは３０〜６００μｍ、さらに好ましくは５０〜４００μｍである。
また、ホウケイ酸ガラスを含有する材質層中のホウケイ酸ガラスの含有量は、好ましくは８０質量％以上、より好ましくは９０質量％以上、さらに好ましくは９５質量％以上、特に好ましくは１００質量％である。すなわち、材質層はホウケイ酸ガラスからなることが特に好ましい。
これらの基板は、半導体装置として十分な信頼性を有する微細配線を形成する観点から、材質層の片面又は両面に樹脂硬化物層が形成されていてもよい。
The material of the substrate used in the present invention is not particularly limited as long as the coefficient of thermal expansion (αs) and the thermal conductivity in the thickness direction satisfy the above ranges. In the case of a semiconductor device using silicon as the material of the semiconductor chip, the substrate preferably has, for example, a material layer containing borosilicate glass or mullite (hereinafter also simply referred to as “material layer”). It is also preferable to have a material layer obtained by curing a composite material containing a glass fiber substrate and a thermosetting resin composition, the coefficient of thermal expansion (αs) of which is adjusted to the above range.
The thickness of the material layer containing borosilicate glass is preferably 20 to 800 μm, more preferably 30 to 600 μm, and still more preferably 50 to 400 μm, from the viewpoint of thinning the substrate, processability, and ease of handling. is there.
The content of the borosilicate glass in the material layer containing the borosilicate glass is preferably 80% by mass or more, more preferably 90% by mass or more, further preferably 95% by mass or more, and particularly preferably 100% by mass. is there. That is, the material layer is particularly preferably made of borosilicate glass.
These substrates may have a cured resin layer formed on one or both surfaces of the material layer from the viewpoint of forming fine wiring having sufficient reliability as a semiconductor device.
（樹脂硬化物層）
樹脂硬化物層は、例えば、熱硬化性樹脂組成物を層形成した後、熱硬化することにより形成される層である。
樹脂硬化物層の厚さは、特に限定されないが、好ましくは１〜１００μｍ、より好ましくは２〜５０μｍ、さらに好ましくは３〜３０μｍである。
(Hardened resin layer)
The cured resin layer is, for example, a layer formed by thermosetting after forming a thermosetting resin composition.
The thickness of the cured resin layer is not particularly limited, but is preferably 1 to 100 μm, more preferably 2 to 50 μm, and further preferably 3 to 30 μm.
熱硬化性樹脂組成物に用いられる熱硬化性樹脂としては、例えば、エポキシ樹脂、フェノール樹脂、不飽和イミド樹脂、シアネート樹脂、イソシアネート樹脂、ベンゾオキサジン樹脂、オキセタン樹脂、アミノ樹脂、不飽和ポリエステル樹脂、アリル樹脂、ジシクロペンタジエン樹脂、シリコーン樹脂、トリアジン樹脂、メラミン樹脂等が挙げられる。これらの中でも、成形性及び電気絶縁性に優れる点から、エポキシ樹脂が好ましい。
エポキシ樹脂としては、例えば、ビスフェノールＡ型エポキシ樹脂、ビスフェノールＦ型エポキシ樹脂、ビスフェノールＳ型エポキシ樹脂、フェノールノボラック型エポキシ樹脂、クレゾールノボラック型エポキシ樹脂、ビスフェノールＡノボラック型エポキシ樹脂、ビスフェノールＦノボラック型エポキシ樹脂、スチルベン型エポキシ樹脂、トリアジン骨格含有エポキシ樹脂、フルオレン骨格含有エポキシ樹脂、ビフェニル型エポキシ樹脂、キシリレン型エポキシ樹脂、ビフェニルアラルキル型エポキシ樹脂、ナフタレン型エポキシ樹脂、ジシクロペンタジエン型エポキシ樹脂、脂環式エポキシ樹脂、多官能フェノール類及びアントラセン等の多環芳香族類のジグリシジルエーテル化合物などが挙げられる。また、これらエポキシ樹脂にリン化合物を導入したリン含有エポキシ樹脂が挙げられる。これらのエポキシ樹脂は単独で又は２種類以上を組み合わせて用いることができる。
Examples of the thermosetting resin used in the thermosetting resin composition include epoxy resin, phenol resin, unsaturated imide resin, cyanate resin, isocyanate resin, benzoxazine resin, oxetane resin, amino resin, unsaturated polyester resin, Examples include allyl resin, dicyclopentadiene resin, silicone resin, triazine resin, and melamine resin. Among these, an epoxy resin is preferable from the viewpoint of excellent moldability and electrical insulation.
Examples of the epoxy resin include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, phenol novolac type epoxy resin, cresol novolak type epoxy resin, bisphenol A novolak type epoxy resin, bisphenol F novolak type epoxy resin. , Stilbene type epoxy resin, Triazine skeleton containing epoxy resin, Fluorene skeleton containing epoxy resin, Biphenyl type epoxy resin, Xylylene type epoxy resin, Biphenyl aralkyl type epoxy resin, Naphthalene type epoxy resin, Dicyclopentadiene type epoxy resin, Alicyclic epoxy Examples thereof include diglycidyl ether compounds of polycyclic aromatics such as resins, polyfunctional phenols and anthracene. Moreover, the phosphorus containing epoxy resin which introduce | transduced the phosphorus compound into these epoxy resins is mentioned. These epoxy resins can be used alone or in combination of two or more.
また、熱硬化性樹脂と耐熱樹脂とを併用することが好ましい。耐熱樹脂としては、ポリイミド樹脂、ポリアミドイミド樹脂、ポリアミド樹脂、ポリエーテルイミド樹脂、ポリベンゾオキサゾール樹脂、ポリベンゾイミダゾール樹脂、及びこれらの何れかの樹脂の化学構造を有する共重合体等が挙げられる。これらは、例えば、ポリブタジエン骨格を含んでいてもよく、熱硬化性樹脂（例えばエポキシ樹脂のエポキシ基）と反応するフェノール性水酸基、アミド基等を含有していてもよい。これらの耐熱樹脂は、単独で又は２種類以上を組み合わせて用いてもよい。
耐熱樹脂としては、市販品を用いてもよく、市販品としては、例えば、日本化薬株式会社製の可溶性ポリアミド「ＢＰＡＭ−０１」及び「ＢＰＡＭ−１５５」、新日本理化株式会社製の可溶性ポリイミド「リカコ−ト（登録商標）ＳＮ２０」及び「リカコート（登録商標）ＰＮ２０」、日本ＧＥプラスチックス株式会社製の可溶性ポリエーテルイミド「ウルテム（登録商標）」、東洋紡株式会社製の可溶性ポリアミドイミド「バイロマックス（登録商標）ＨＲ１１ＮＮ」及び「バイロマックス（登録商標）ＨＲ１６ＮＮ」等が挙げられる。
Moreover, it is preferable to use a thermosetting resin and a heat resistant resin in combination. Examples of the heat resistant resin include polyimide resin, polyamideimide resin, polyamide resin, polyetherimide resin, polybenzoxazole resin, polybenzimidazole resin, and a copolymer having a chemical structure of any of these resins. These may contain a polybutadiene skeleton, for example, and may contain a phenolic hydroxyl group, an amide group, or the like that reacts with a thermosetting resin (for example, an epoxy group of an epoxy resin). These heat resistant resins may be used alone or in combination of two or more.
As the heat-resistant resin, commercially available products may be used. Examples of commercially available products include soluble polyamides “BPAM-01” and “BPAM-155” manufactured by Nippon Kayaku Co., Ltd., and soluble polyimide manufactured by Shin Nippon Rika Co., Ltd. "Rikacoat (registered trademark) SN20" and "Ricacoat (registered trademark) PN20", soluble polyetherimide "Ultem (registered trademark)" manufactured by GE Plastics Corporation, soluble polyamideimide "Viro" manufactured by Toyobo Co., Ltd. "MAX (registered trademark) HR11NN" and "Vilomax (registered trademark) HR16NN".
熱硬化性樹脂組成物中の熱硬化性樹脂の含有量は、全樹脂成分１００質量部に対して、好ましくは１０〜８０質量部、より好ましくは２０〜６０質量部である。
また、熱硬化性樹脂組成物中の耐熱樹脂の含有量は、熱硬化性樹脂１００質量部に対して、好ましくは１０〜３００質量部、より好ましくは２０〜２５０量部である。
The content of the thermosetting resin in the thermosetting resin composition is preferably 10 to 80 parts by mass, more preferably 20 to 60 parts by mass with respect to 100 parts by mass of the total resin components.
Moreover, the content of the heat-resistant resin in the thermosetting resin composition is preferably 10 to 300 parts by mass, more preferably 20 to 250 parts by mass with respect to 100 parts by mass of the thermosetting resin.
熱硬化性樹脂としてエポキシ樹脂を用いる場合、エポキシ樹脂用硬化剤を用いることが好ましく、必要に応じて硬化促進剤を用いてもよい。
エポキシ樹脂用硬化剤としては、例えば、フェノールノボラック、クレゾールノボラック等の多官能フェノール化合物、ジシアンジアミド、ジアミノジフェニルメタン、ジアミノジフェニルスルフォン等のアミン化合物、無水フタル酸、無水ピロメリット酸、無水マレイン酸、無水マレイン酸共重合体等の酸無水物、ポリイミドなどを用いることができる。これらの硬化剤は、単独で又は２種類以上を組み合わせて用いることができる。
熱硬化性樹脂組成物中のエポキシ樹脂用硬化剤の含有量は、エポキシ樹脂１００質量部に対して、好ましくは１０〜１００質量部、より好ましくは２０〜５０質量部である。硬化促進剤としては、例えば、エポキシ樹脂の硬化促進剤として、イミダゾール類及びその誘導体、有機リン系化合物、第二級アミン類、第三級アミン類、及び第四級アンモニウム塩等が挙げられる。
硬化促進剤の含有量は、エポキシ樹脂１００質量部に対して、好ましくは０．１〜５．０質量部、より好ましくは０．２〜３．０質量部である。
When using an epoxy resin as the thermosetting resin, it is preferable to use a curing agent for epoxy resin, and a curing accelerator may be used as necessary.
Examples of the epoxy resin curing agent include polyfunctional phenol compounds such as phenol novolac and cresol novolac, amine compounds such as dicyandiamide, diaminodiphenylmethane, and diaminodiphenylsulfone, phthalic anhydride, pyromellitic anhydride, maleic anhydride, and maleic anhydride. An acid anhydride such as an acid copolymer, polyimide, or the like can be used. These curing agents can be used alone or in combination of two or more.
Content of the hardening | curing agent for epoxy resins in a thermosetting resin composition becomes like this. Preferably it is 10-100 mass parts with respect to 100 mass parts of epoxy resins, More preferably, it is 20-50 mass parts. Examples of the curing accelerator include epoxy resin curing accelerators such as imidazoles and derivatives thereof, organophosphorus compounds, secondary amines, tertiary amines, and quaternary ammonium salts.
The content of the curing accelerator is preferably 0.1 to 5.0 parts by mass, more preferably 0.2 to 3.0 parts by mass with respect to 100 parts by mass of the epoxy resin.
熱硬化性樹脂組成物は、無機充填材を含有していてもよい。
無機充填材としては、例えば、シリカ、アルミナ、硫酸バリウム、タルク、クレー、雲母粉、水酸化アルミニウム、水酸化マグネシウム、炭酸カルシウム、炭酸マグネシウム、酸化マグネシウム、窒化ホウ素、ホウ酸アルミニウム、チタン酸バリウム、チタン酸ストロンチウム、チタン酸カルシウム、チタン酸ビスマス、酸化チタン、ジルコン酸バリウム、ジルコン酸カルシウム等が挙げられる。
無機充填材の含有量は、全樹脂成分１００質量部に対して、好ましくは１〜３５質量部、より好ましくは３〜１０質量部である。
The thermosetting resin composition may contain an inorganic filler.
Examples of the inorganic filler include silica, alumina, barium sulfate, talc, clay, mica powder, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, magnesium oxide, boron nitride, aluminum borate, barium titanate, Examples include strontium titanate, calcium titanate, bismuth titanate, titanium oxide, barium zirconate, and calcium zirconate.
The content of the inorganic filler is preferably 1 to 35 parts by mass, more preferably 3 to 10 parts by mass with respect to 100 parts by mass of the total resin components.
樹脂硬化物層は、例えば、前記熱硬化性樹脂組成物を含有するワニスを、材質層に公知のコーター等を用いて塗布、乾燥、及び硬化する方法、前記熱硬化性樹脂組成物からなる樹脂フィルムを材質層へラミネート又はプレスして貼着した後、硬化する方法等により、好適に形成することができる。 The cured resin layer is, for example, a method of applying, drying and curing a varnish containing the thermosetting resin composition on a material layer using a known coater or the like, a resin comprising the thermosetting resin composition The film can be suitably formed by a method of curing after laminating or pressing the film on the material layer.
本発明に用いる基板の厚さは、基板の薄型化、加工性、及び取扱いの容易性の観点から、好ましくは２５〜１０００μｍ、より好ましくは４０〜８００μｍ、さらに好ましくは５０〜５００μｍである。 The thickness of the substrate used in the present invention is preferably 25 to 1000 μm, more preferably 40 to 800 μm, and still more preferably 50 to 500 μm, from the viewpoints of thinning the substrate, workability, and ease of handling.
本発明に用いる基板は少なくとも一方の面に配線が設けられてなるものであり、複数の配線層が含まれた構成（多層プリント配線板）であってもよい。
配線層は、用途に応じて、従来公知の方法により形成すればよい。
以下、基板に配線パターンを形成する方法の一態様について説明するが、これらに限定されるものではない。
The substrate used in the present invention is provided with wiring on at least one surface, and may have a configuration (multilayer printed wiring board) including a plurality of wiring layers.
What is necessary is just to form a wiring layer by a conventionally well-known method according to a use.
Hereinafter, although one mode of a method of forming a wiring pattern on a substrate is explained, it is not limited to these.
（ビアホールの形成）
本発明に用いる基板は、必要に応じて、穴あけを行い、ビアホール、スルーホール等を形成してもよい。穴あけは、ドリル、レーザー、プラズマ、又はこれらの組み合わせ等の方法により行うことができる。レーザーとしては、炭酸ガスレーザー、ＹＡＧレーザー、ＵＶレーザー、エキシマレーザー等が一般的に用いられる。
ビアホール等の形成後、酸化剤を用いてデスミア処理してもよい。酸化剤としては、過マンガン酸塩（過マンガン酸カリウム、過マンガン酸ナトリウム等）、重クロム酸塩、オゾン、過酸化水素／硫酸、硝酸が好ましく、過マンガン酸カリウム、過マンガン酸ナトリウム等の水酸化ナトリウム水溶液（アルカリ性過マンガン酸水溶液）がより好ましい。
(Formation of via holes)
The substrate used in the present invention may be drilled as necessary to form via holes, through holes, and the like. Drilling can be performed by a method such as drilling, laser, plasma, or a combination thereof. As the laser, a carbon dioxide laser, a YAG laser, a UV laser, an excimer laser or the like is generally used.
After forming the via hole or the like, desmear treatment may be performed using an oxidizing agent. As the oxidizing agent, permanganate (potassium permanganate, sodium permanganate, etc.), dichromate, ozone, hydrogen peroxide / sulfuric acid, nitric acid are preferable, and potassium permanganate, sodium permanganate, etc. A sodium hydroxide aqueous solution (alkaline permanganate aqueous solution) is more preferred.
（配線パターンの形成）
導体層を形成する方法としては、スパッタ法等の乾式めっき、無電界めっき、電界めっき等の湿式めっきなどによる方法が挙げられる。
その後のパターン形成の方法として、例えば、公知のサブトラクティブ法、セミアディティブ法等を用いることができる。
(Formation of wiring pattern)
Examples of the method for forming the conductor layer include a dry plating method such as a sputtering method, a wet plating method such as an electroless plating and an electroplating.
As a subsequent pattern formation method, for example, a known subtractive method or semi-additive method can be used.
（多層プリント配線板）
本発明に用いる基板の一形態として、上記のようにして配線パターンを形成した積層板を複数積層して、多層プリント配線板としたものであってもよい。
この多層プリント配線板を製造するには、上記の配線パターンを形成した積層板を、接着フィルム等を介して複数積層することによって多層化する。その後、ドリル加工又はレーザー加工によるスルーホール又はブラインドビアホールの形成と、めっき又は導電性ペーストによる層間配線の形成を行う。このようにして、多層プリント配線板を製造することができる。
(Multilayer printed wiring board)
As one form of the substrate used in the present invention, a multilayer printed wiring board may be formed by laminating a plurality of laminated boards on which wiring patterns are formed as described above.
In order to manufacture this multilayer printed wiring board, a multilayer is formed by laminating a plurality of laminated boards on which the above wiring patterns are formed via an adhesive film or the like. Thereafter, through holes or blind via holes are formed by drilling or laser processing, and interlayer wiring is formed by plating or conductive paste. In this way, a multilayer printed wiring board can be manufactured.
＜半導体チップ＞
本発明の製造方法に用いる半導体チップは、従来公知のものを使用することができる。
なお、本発明において、半導体チップとは、トランジスタ、抵抗、コンデンサー等の回路素子から構成される集積回路が表面に形成されたウェハを切断して形成した半導体片を意味する。
本発明の製造方法に用いる半導体チップの材質としては、従来公知の半導体チップ用ウェハを用いることができ、例えば、シリコン、ゲルマニウム等の同一種類の元素から構成される元素半導体、ガリウムヒ素、ガリウムリン、インジウムリン、炭化珪素等の化合物半導体などを用いることができる。
<Semiconductor chip>
A conventionally well-known semiconductor chip can be used for the manufacturing method of this invention.
In the present invention, the semiconductor chip means a semiconductor piece formed by cutting a wafer on which an integrated circuit composed of circuit elements such as transistors, resistors, and capacitors is formed.
As a material of the semiconductor chip used in the manufacturing method of the present invention, a conventionally known semiconductor chip wafer can be used. For example, an elemental semiconductor composed of the same kind of elements such as silicon and germanium, gallium arsenide, and gallium phosphide. Further, a compound semiconductor such as indium phosphide or silicon carbide can be used.
本発明の製造方法に用いる半導体チップには、基板の電極と接続するためのバンプが形成されている。
バンプとしては、狭ピッチ化に対応する観点から、金属のピラー、特に銅ピラー上にはんだが形成されたバンプが好ましい。はんだの材質としては、特に限定されず、ＳｎＡｇＣｕ系、ＳｎＣｕ系、ＳｎＡｇ系、ＳｎＡｇＣｕＢｉ系、ＳｎＺｎＢｉ系、ＳｎＡｇＩｎＢｉ系等の鉛フリーはんだが好ましく挙げられる。はんだの形状は半球状であることが好ましい。
The semiconductor chip used in the manufacturing method of the present invention is formed with bumps for connecting to the electrodes of the substrate.
As a bump, a bump in which solder is formed on a metal pillar, particularly a copper pillar, is preferable from the viewpoint of reducing the pitch. The material of the solder is not particularly limited, and lead-free solders such as SnAgCu, SnCu, SnAg, SnAgCuBi, SnZnBi, and SnAgInBi are preferable. The solder is preferably hemispherical.
半導体チップと基板との接合部分の接続信頼性を確保するための方法として、半導体チップ上に形成されたバンプと回路基板の電極とを接合した後に、半導体チップと回路基板との隙間に液状封止接着剤を注入し硬化させることが一般的な方法として採られている。
またＬＣＤパネル用途等、実装回路基板上に半導体チップを搭載する接着剤として異方性導電フィルム（ＡＣＦ： Ａｎｉｓｏｔｒｏｐｉｃ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ）、非導電性接着フィルム（ＮＣＦ： Ｎｏｎ Ｃｏｎｄｕｃｔｉｖｅ Ｆｉｌｍ）非導電性接着ペースト（ＮＣＰ： Ｎｏｎ Ｃｏｎｄｕｃｔｉｖｅ Ｐａｓｔｅ）等が用いられている。
特にバンプが狭ピッチ化した場合、バンプ間の絶縁性を保つ観点からＮＣＦを用いることが好ましい。ＮＣＦを用いた場合の接続に際しては、ボンディング時の加熱で接着剤が軟化し、基板上の電極と半導体チップ上のバンプとが接触してから高速に硬化できることが好ましく、さらにはバンプ、基板の電極等の凹凸によく追従し、空隙が少ない状態で密着させることができる特性を有することが好ましい。
As a method for ensuring the connection reliability of the joint portion between the semiconductor chip and the substrate, the bump formed on the semiconductor chip and the electrode of the circuit board are joined, and then the liquid seal is formed in the gap between the semiconductor chip and the circuit board. It is a common method to inject and cure the adhesive.
In addition, anisotropic conductive film (ACF), non-conductive adhesive film (NCF: non-conductive film) non-conductive adhesive paste as an adhesive for mounting a semiconductor chip on a mounting circuit board, such as LCD panel use. NCP (Non Conductive Paste) or the like is used.
In particular, when the bumps have a narrow pitch, it is preferable to use NCF from the viewpoint of maintaining the insulation between the bumps. When connecting using NCF, it is preferable that the adhesive softens due to heating during bonding and can be cured at high speed after the electrodes on the substrate and the bumps on the semiconductor chip come into contact with each other. It is preferable that it has a characteristic that it can follow the unevenness of the electrode or the like well and can be brought into close contact with few voids.
本発明の製造方法は、半導体チップと基板との接続に、ＴＣＢ工法を用いる。
ＴＣＢ工法に用いる装置としては、従来公知のフリップチップボンダを用いることができ、例えば、パナソニック ファクトリーソリューションズ株式会社製「ＦＣＢ３」が好適である。
半導体チップと基板とを接続する際の加熱及び加圧条件は、用いる半導体チップ及び基板の形状、材質等に応じて適宜調整すればよい。
加熱温度は、はんだの融点以上であれば特に限定されない。生産性の観点から、ＳｎＡｇＣｕ系はんだを使用することが好ましく、その場合は接合部の温度が、好ましくは２２０〜２９０℃、より好ましくは２３０〜２８０℃、さらに好ましくは２４０〜２７０℃である。
また、はんだの融点以上で保持する時間としては、例えば、３〜２０秒である。
加熱はフリップチップボンダのヘッドにより行うが、基板の温度を一定に保つ観点から、基板を載置するステージを、例えば、６０〜１８０℃程度に加熱してもよい。
加圧条件としては、半導体チップにクラック等のダメージを発生させずに、十分な接合強度を得る観点から、好ましくは０．０１〜３０Ｎ／ｍｍ2、より好ましくは０．０５〜１０Ｎ／ｍｍ2、さらに好ましくは０．１〜３Ｎ／ｍｍ2である。
The manufacturing method of the present invention uses the TCB method for connecting the semiconductor chip and the substrate.
As an apparatus used for the TCB method, a conventionally known flip chip bonder can be used. For example, “FCB3” manufactured by Panasonic Factory Solutions Co., Ltd. is preferable.
The heating and pressurizing conditions for connecting the semiconductor chip and the substrate may be appropriately adjusted according to the shape and material of the semiconductor chip and the substrate to be used.
The heating temperature is not particularly limited as long as it is equal to or higher than the melting point of the solder. From the viewpoint of productivity, it is preferable to use SnAgCu-based solder. In that case, the temperature of the joint is preferably 220 to 290 ° C, more preferably 230 to 280 ° C, and still more preferably 240 to 270 ° C.
Moreover, as time to hold | maintain above melting | fusing point of solder, it is 3 to 20 seconds, for example.
The heating is performed by the head of the flip chip bonder. However, from the viewpoint of keeping the temperature of the substrate constant, the stage on which the substrate is placed may be heated to about 60 to 180 ° C., for example.
The pressurizing condition is preferably 0.01 to 30 N / mm 2 , more preferably 0.05 to 10 N / mm 2 from the viewpoint of obtaining sufficient bonding strength without causing damage such as cracks to the semiconductor chip. More preferably, it is 0.1 to 3 N / mm 2 .
次に実施例により本発明を具体的に説明するが、本発明の範囲はこれらの実施例に限定されるものではない。 EXAMPLES Next, although an Example demonstrates this invention concretely, the scope of the present invention is not limited to these Examples.
［接着フィルムの製造］
（ポリアミドイミド樹脂の合成）
熱電対、撹拌機、窒素吹込口を取り付けた５００ｍｌセパラブルフラスコに約２５０ｍｌ／分の窒素を流しながら両末端にアミノ基を有するシリコーンオイル（信越化学工業株式会社製、商品名：Ｘ−２２−１６１Ａ）３２．０ｇ、４，４'−ジアミノジシクロヘキシルメタン（新日本理化株式会社製、商品名：ワンダミンＨＭ（ＷＨＭ））０．９３５ｇ、ポリオキシプロピレンジアミン（三井化学ファイン株式会社、商品名：ジェファーミンＤ２０００）４０．０ｇ、トリメリット酸無水物（以下、「ＴＭＡ」ともいう）１７．９ｇ及びＮ−メチル−２−ピロリドン２５０ｇを加え撹拌し、溶解した。この溶液にトルエン１００ｇを加え、１５０℃以上の温度で６時間の脱水還流によるイミド環閉環反応を行った。次いで、トルエンを留去し、冷却後４，４'−ジフェニルメタンジイソシアネート１３．４ｇを加え、１５０℃にて２時間反応させた。その後、ＴＭＡを１．６ｇ加え、８０℃にて１時間撹拌し、ポリアミドイミド樹脂を合成した。
[Manufacture of adhesive film]
(Synthesis of polyamide-imide resin)
Silicone oil having amino groups at both ends while flowing about 250 ml / min of nitrogen into a 500 ml separable flask equipped with a thermocouple, a stirrer, and a nitrogen inlet (made by Shin-Etsu Chemical Co., Ltd., trade name: X-22) 161A) 32.0 g, 4,4′-diaminodicyclohexylmethane (manufactured by Shin Nippon Chemical Co., Ltd., trade name: Wandamine HM (WHM)) 0.935 g, polyoxypropylenediamine (Mitsui Chemical Fine Co., Ltd., trade name: Jeffer) Min D2000) 40.0 g, trimellitic anhydride (hereinafter also referred to as “TMA”) 17.9 g and N-methyl-2-pyrrolidone 250 g were added and stirred to dissolve. 100 g of toluene was added to this solution, and an imide ring closing reaction was performed by dehydration reflux for 6 hours at a temperature of 150 ° C. or higher. Subsequently, toluene was distilled off, and after cooling, 13.4 g of 4,4′-diphenylmethane diisocyanate was added and reacted at 150 ° C. for 2 hours. Thereafter, 1.6 g of TMA was added and stirred at 80 ° C. for 1 hour to synthesize a polyamideimide resin.
（ワニスの調製）
固形分７０ｇのポリアミドイミド樹脂溶液にジシクロペンタジエンフェノール型エポキシ樹脂（大日本インキ化学工業株式会社製、商品名：ＨＰ７２００）２０ｇ、トリスフェノールメタン型エポキシ樹脂（日本化薬株式会社製、商品名：ＥＰＰＮ−５０２Ｈ）１０ｇ、１−シアノエチル−２−エチル−４−メチルイミダゾール（四国化成工業株式会社製、商品名：２Ｅ４ＭＺ−ＣＮ）０．１５ｇを加え、固形分濃度３０％になるようにＮ−メチル−２−ピロリドンにて希釈し、ワニスを調製した。
(Preparation of varnish)
To a polyamideimide resin solution having a solid content of 70 g, 20 g of dicyclopentadienephenol type epoxy resin (Dainippon Ink Chemical Co., Ltd., trade name: HP7200), trisphenolmethane type epoxy resin (Nippon Kayaku Co., Ltd., trade name: EPPN-502H) 10 g, 1-cyanoethyl-2-ethyl-4-methylimidazole (manufactured by Shikoku Kasei Kogyo Co., Ltd., trade name: 2E4MZ-CN) 0.15 g was added, and N- Diluted with methyl-2-pyrrolidone to prepare a varnish.
（接着フィルムの形成）
調製したワニスを、厚さ３８μｍの離型処理ポリエチレンテレフタラート（以下、「ＰＥＴ」ともいう）フィルム（リンテック株式会社製、商品名：ＰＥＴ−３８Ｘ）の離型処理面にバーコーターを用いて、乾燥後の厚さが５μｍになるように塗布し、１４０℃で１５分間乾燥させて樹脂組成物層を形成し、接着フィルムを得た。
(Formation of adhesive film)
The prepared varnish was used with a bar coater on the release treatment surface of a release treatment polyethylene terephthalate (hereinafter also referred to as “PET”) film (Lintec Co., Ltd., trade name: PET-38X) having a thickness of 38 μm. It apply | coated so that the thickness after drying might be set to 5 micrometers, it was made to dry at 140 degreeC for 15 minute (s), the resin composition layer was formed, and the adhesive film was obtained.
［配線形成用樹脂フィルムの製造］
フェノール性水酸基含有ポリブタジエン変性ポリアミド（日本化薬株式会社製、商品名：ＢＰＡＭ−１５５）１０．２ｇに、Ｎ，Ｎ−ジメチルアセトアミド（以下、「ＤＭＡｃ」ともいう）を９１．４ｇ配合した後、ビフェニルアラルキル型エポキシ樹脂（日本化薬株式会社製、商品名：ＮＣ−３０００Ｈ）４０．０ｇ、ビスフェノールＡノボラック（三菱化学株式会社製、商品名：ＹＬＨ１２９）１２．６ｇ、硬化促進剤として２−フェニルイミダゾール（四国化成工業株式会社製、商品名：２ＰＺ）０．４ｇ、ヒュームドシリカ（日本アエロジル株式会社製、商品名：Ｒ９７２）３．６ｇを添加した後、ＤＭＡｃ及びメチルエチルケトン（以下、「ＭＥＫ」ともいう）からなる混合溶剤（ＭＥＫ／ＤＭＡｃ＝７／３（質量比））で希釈した（固形分濃度約２５質量％）。その後、分散機（吉田機械興業株式会社製、商品名：ナノマイザー）を用いて、配線形成用樹脂ワニスを得た。
配線形成用樹脂ワニスを、厚さ２０μｍの銅箔（古河電気工業株式会社製、商品名：ＮＣ箔）の光沢面にバーコーターを用いて、乾燥後の配線形成用樹脂層の厚さが５μｍになるように塗布し、１４０℃で１０分間乾燥させて、銅箔の一方の面に配線形成用樹脂層を有する配線形成用樹脂フィルムを作製した。
[Manufacture of resin film for wiring formation]
After blending 91.4 g of N, N-dimethylacetamide (hereinafter also referred to as “DMAc”) with 10.2 g of phenolic hydroxyl group-containing polybutadiene-modified polyamide (Nippon Kayaku Co., Ltd., trade name: BPAM-155), Biphenyl aralkyl type epoxy resin (Nippon Kayaku Co., Ltd., trade name: NC-3000H) 40.0 g, Bisphenol A novolak (Mitsubishi Chemical Corporation, trade name: YLH129) 12.6 g, 2-phenyl as a curing accelerator After adding 0.4 g of imidazole (manufactured by Shikoku Kasei Kogyo Co., Ltd., trade name: 2PZ) and 3.6 g of fumed silica (manufactured by Nippon Aerosil Co., Ltd., trade name: R972), DMAc and methyl ethyl ketone (hereinafter “MEK”) Diluted with a mixed solvent (MEK / DMAc = 7/3 (mass ratio)). (Solid concentration of about 25 wt%). Then, the resin varnish for wiring formation was obtained using the disperser (The product name: Nanomizer by Yoshida Kikai Kogyo Co., Ltd.).
Using a bar coater on the glossy surface of a 20 μm thick copper foil (made by Furukawa Electric Co., Ltd., trade name: NC foil), the thickness of the resin layer for wiring formation after drying is 5 μm. Then, it was dried at 140 ° C. for 10 minutes to produce a wiring forming resin film having a wiring forming resin layer on one surface of the copper foil.
［半導体チップ搭載用基板の製造］
製造例１
（樹脂硬化物層／材質層（ホウケイ酸ガラス）／樹脂硬化物層）
材質層として、ガラスフィルム（日本電気硝子株式会社製、商品名：ＯＡ−１０Ｇ、厚さ４００μｍ）を用いた。
このガラスフィルムの両面上に、作製した接着フィルムを樹脂組成物層がガラスフィルムに当接するように配置し、バッチ式の真空加圧ラミネーター（名機株式会社製、商品名：ＭＶＬＰ−５００）を用いてラミネートによって積層した。この際の真空度は３０ｍｍＨｇ以下であり、温度は１２０℃、圧力は０．５ＭＰａの設定とした。室温に冷却後、離型処理ＰＥＴフィルムを剥がし、材質層の両面に樹脂組成物層を有する基板を得た。
次いで、該基板の両面に、配線形成用樹脂フィルムを、配線形成用樹脂層が上記で形成した樹脂組成物層に当接するように配置した後、熱プレスにて１８５℃、３ＭＰa、１時間の条件で熱圧着した。その後、配線形成用樹脂フィルムの銅箔をエッチングして材質層の両面に樹脂硬化物層を有する半導体チップ搭載用基板Ａを得た。
[Manufacture of substrates for mounting semiconductor chips]
Production Example 1
(Hardened resin layer / material layer (borosilicate glass) / hardened resin layer)
As the material layer, a glass film (manufactured by Nippon Electric Glass Co., Ltd., trade name: OA-10G, thickness 400 μm) was used.
On both surfaces of the glass film, the prepared adhesive film was placed so that the resin composition layer was in contact with the glass film, and a batch type vacuum pressure laminator (made by Meiki Co., Ltd., trade name: MVLP-500) was placed. And laminated by lamination. The degree of vacuum at this time was 30 mmHg or less, the temperature was set to 120 ° C., and the pressure was set to 0.5 MPa. After cooling to room temperature, the release-treated PET film was peeled off to obtain a substrate having a resin composition layer on both surfaces of the material layer.
Next, after arranging the resin film for wiring formation on both surfaces of the substrate so that the resin layer for wiring formation is in contact with the resin composition layer formed above, it is heated at 185 ° C., 3 MPa, 1 hour. Thermocompression bonding was performed under the conditions. Then, the copper foil of the resin film for wiring formation was etched, and the semiconductor chip mounting board | substrate A which has a resin cured material layer on both surfaces of a material layer was obtained.
製造例２
（シリコン基板）
シリコン基板（ウォルツ社製、商品名：ＩＰ８０−０１０１ＪＹ、厚さ４００μｍ）を、基板Ｂとした。
Production Example 2
(Silicon substrate)
A silicon substrate (trade name: IP80-0101JY, thickness 400 μm, manufactured by Waltz) was used as the substrate B.
製造例３
（有機基材を使用した基板）
ガラス繊維基材と熱硬化性樹脂組成物を含有する複合材を硬化してなる基板である、銅張積層板（日立化成株式会社製、商品名：Ｅ−７０５Ｇ、厚さ４００μｍ）の銅箔をエッチングしたものを、基板Ｃとした。
Production Example 3
(Substrate using organic base material)
Copper foil of a copper-clad laminate (manufactured by Hitachi Chemical Co., Ltd., trade name: E-705G, thickness 400 μm), which is a substrate formed by curing a composite material containing a glass fiber substrate and a thermosetting resin composition A substrate C was obtained by etching.
［半導体装置の製造］
実施例１、比較例１及び２
半導体チップとして、シリコンウェハ（ウォルツ社製、商品名：ＣＣ８０−０１０１ＪＹ、厚さ１５０μｍ、ピラー高さ４５μｍ、ピラー形状３８μｍ×３８μｍ、最小ピラーピッチ８０μｍ）に０．０４ｍｍ厚のＮＣＦ（日立化成株式会社製）を貼り付け、これを７．３ｍｍ×７．３ｍｍにダイシングしたものを準備した。
また、基板として、表１に示す基板を１４ｍｍ×１４ｍｍに切り出したものを準備した。
次いで、半導体チップと基板とを、フリップチップボンダ（パナソニック ファクトリーソリューションズ株式会社製、商品名：ＦＣＢ３）を用いて、ＴＣＢ工法により接合した。この時、ＮＣＦと基板の間に直径０．０５ｍｍのＫ型熱電対を設置して温度を測定した。なお、接合条件は下記のとおりとした。
＜接合条件＞
・熱電対温度：２６０℃
・加熱時間：７秒
・ステージ加熱温度：１５０℃
・加圧圧力：０．４７Ｎ／ｍｍ2
[Manufacture of semiconductor devices]
Example 1, Comparative Examples 1 and 2
As a semiconductor chip, 0.04 mm thick NCF (Hitachi Chemical Co., Ltd.) on a silicon wafer (manufactured by Waltz, trade name: CC80-0101JY, thickness 150 μm, pillar height 45 μm, pillar shape 38 μm × 38 μm, minimum pillar pitch 80 μm) A product prepared by dicing into 7.3 mm × 7.3 mm was prepared.
Moreover, what cut out the board | substrate shown in Table 1 to 14 mm x 14 mm was prepared as a board | substrate.
Next, the semiconductor chip and the substrate were joined by a TCB method using a flip chip bonder (manufactured by Panasonic Factory Solutions Co., Ltd., trade name: FCB3). At this time, a K-type thermocouple having a diameter of 0.05 mm was installed between the NCF and the substrate, and the temperature was measured. The joining conditions were as follows.
<Joint conditions>
-Thermocouple temperature: 260 ° C
-Heating time: 7 seconds-Stage heating temperature: 150 ° C
・ Pressurized pressure: 0.47 N / mm 2
［物性評価］
実施例及び比較例で用いた基板及び半導体チップの物性、並びに半導体装置のタクトタイム及び反りは、以下の方法により測定した。結果を表１に示す。
[Evaluation of the physical properties]
The physical properties of the substrates and semiconductor chips used in Examples and Comparative Examples, and the tact time and warpage of the semiconductor device were measured by the following methods. The results are shown in Table 1.
（１）熱膨張率の測定
各実施例及び比較例で用いた基板の面方向の熱膨張率（αｓ）、及び半導体チップの面方向の熱膨張率（αｃ）は、熱機械分析装置（セイコーインスツル株式会社製、商品名：ＴＭＡ／ＳＳ６１００）を用いて、下記条件により測定し、４０℃から２５０℃までの平均熱膨張率を算出し、これを熱膨張率の値とした。また、各サンプルはサンプル作製時の残留応力を緩和するため、２５０℃に加熱した恒温槽に１分以上５分以下置いた後、２０分以上かけて室温まで冷却して使用した。
＜測定条件＞
・基板のサンプル形状：１４ｍｍ（長さ）×４ｍｍ（幅）×０．４ｍｍ（厚さ）
・半導体チップのサンプル形状：７．３ｍｍ（長さ）×４ｍｍ（幅）×０．１５ｍｍ（厚さ）
・測定温度領域：室温〜２６０℃
・昇温速度：５℃／ｍｉｎ
・測定モード：引張モード
・荷重：２ｇ
(1) Measurement of thermal expansion coefficient The thermal expansion coefficient (αs) in the surface direction of the substrate and the thermal expansion coefficient (αc) in the surface direction of the semiconductor chip used in each example and comparative example were measured with a thermomechanical analyzer (Seiko). Instru Co., Ltd., trade name: TMA / SS6100) was measured under the following conditions, the average coefficient of thermal expansion from 40 ° C. to 250 ° C. was calculated, and this was used as the value of the coefficient of thermal expansion. Each sample was placed in a thermostat heated to 250 ° C. for 1 to 5 minutes in order to relieve residual stress during sample preparation, and then cooled to room temperature over 20 minutes.
<Measurement conditions>
-Sample shape of substrate: 14 mm (length) x 4 mm (width) x 0.4 mm (thickness)
-Sample shape of semiconductor chip: 7.3 mm (length) x 4 mm (width) x 0.15 mm (thickness)
Measurement temperature range: room temperature to 260 ° C
・ Raising rate: 5 ° C / min
・ Measurement mode: Tensile mode ・ Load: 2g
（２）熱伝導率の測定
各実施例及び比較例で用いた基板の熱伝導率は、下記式により算出した。
熱伝導率（Ｗ／ｍＫ）＝熱拡散率（ｍ2／ｓ）×比熱（Ｊ／Ｋｇ・Ｋ）×比重（Ｋｇ／ｍ3）
なお、熱拡散率、比熱、及び比重は以下の方法により測定した。
(2) Measurement of thermal conductivity The thermal conductivity of the board | substrate used by each Example and the comparative example was computed by the following formula.
Thermal conductivity (W / mK) = thermal diffusivity (m 2 / s) × specific heat (J / Kg · K) × specific gravity (Kg / m 3 )
The thermal diffusivity, specific heat, and specific gravity were measured by the following methods.
＜熱拡散率の測定条件＞
・測定装置：熱拡散率測定装置（ＮＥＴＺＳＣＨ社製、商品名：ＬＦＡ４４７ ＮａｎｏＦｌａｓｈ）
・測定方法：キセノンフラッシュ法
・サンプルサイズ：１０ｍｍ（長さ）×１０ｍｍ（幅）×０．４ｍｍ（厚さ）
＜比熱の測定条件＞
・測定装置：ＤＳＣ装置（ＰｅｒｋｉｎＥｌｍｅｒ社製、商品名：Ｐｙｒｉｓ１）
・基準物質：サファイア
・サンプル量：約２０ｍｇ
＜比重の測定条件＞
・測定装置：電子比重計（アルファミラージュ株式会社製、商品名：ＳＤ２００Ｌ）
・測定方法：アルキメデス法
・サンプルサイズ：１０ｍｍ（長さ）×１０ｍｍ（幅）×０．４ｍｍ（厚さ）
<Measurement conditions for thermal diffusivity>
Measuring device: Thermal diffusivity measuring device (made by NETZSCH, trade name: LFA447 NanoFlash)
Measurement method: Xenon flash method Sample size: 10 mm (length) x 10 mm (width) x 0.4 mm (thickness)
<Measurement conditions of specific heat>
・ Measurement device: DSC device (manufactured by PerkinElmer, trade name: Pyris1)
-Reference material: sapphire-Sample amount: about 20mg
<Measurement conditions of specific gravity>
Measuring device: Electronic hydrometer (manufactured by Alpha Mirage Co., Ltd., trade name: SD200L)
Measurement method: Archimedes method Sample size: 10 mm (length) x 10 mm (width) x 0.4 mm (thickness)
（３）反りの測定
各実施例及び比較例で用いた基板の形状を、反り測定装置（ＡＫＲＯＭＥＴＲＩＸ社製、商品名：ＴＨＥＲＭＯＩＲＥ ＰＳ２００）を用いて測定し、変位の最大値と最小値を求め、その差の値を初期形状値とした。
次に、各実施例及び比較例で得られた半導体装置のチップ非接続面の形状を前記と同様の装置を用いて測定し、変位の最大値と最小値を求め、その差の値を実装形状値として、実装形状値から初期形状値を引いた値を反りとした。
(3) Measurement of warpage The shape of the substrate used in each example and comparative example was measured using a warpage measuring device (manufactured by AKROMETRIX, product name: THERMOIRE PS200), and the maximum value and the minimum value of displacement were obtained. The difference value was taken as the initial shape value.
Next, the shape of the chip non-connecting surface of the semiconductor device obtained in each example and comparative example is measured using the same device as described above, the maximum value and the minimum value of the displacement are obtained, and the difference value is mounted. As the shape value, a value obtained by subtracting the initial shape value from the mounting shape value was defined as a warp.
（４）タクトタイムの測定
各実施例及び比較例における製造条件で自動運転を行い、１サイクルにかかる時間を測定して、タクトタイムとした。なお、自動運転における条件は下記のとおりとした。
＜自動運転条件＞
・ヘッドの冷却温度：６０℃（受け渡し可能な温度と同じ）
・チップのピックアップ条件：チップのバックグラインド面のエッジ２箇所検知
・チップの形状認識：チップピラー面のアライメントマーク２箇所
・基板の認識：なし
(4) Measurement of tact time Automatic operation was performed under the manufacturing conditions in each example and comparative example, and the time taken for one cycle was measured to obtain a tact time. The conditions for automatic operation were as follows.
<Automatic operation conditions>
・ Head cooling temperature: 60 ° C (same temperature that can be delivered)
・ Chip pick-up condition: Detection of two edges on the backgrind surface of the chip ・ Chip shape recognition: Two alignment marks on the chip pillar surface ・ Board recognition: None
表１から明らかなように、実施例１で得られた半導体装置は比較例１及び２で得られた半導体装置と比べて、反りが最も小さい。またタクトタイムは比較例２と同等であり、比較例１と比べると約２０％短い。
以上の結果から、本発明の製造方法によると、反りが小さい半導体装置を得ることができ、本発明の製造方法が、タクトタイムを短く、生産性に優れることがわかる。
As is clear from Table 1, the semiconductor device obtained in Example 1 has the least warpage as compared with the semiconductor devices obtained in Comparative Examples 1 and 2. The tact time is equivalent to that of Comparative Example 2 and is about 20% shorter than that of Comparative Example 1.
From the above results, it can be seen that according to the manufacturing method of the present invention, a semiconductor device with small warpage can be obtained, and the manufacturing method of the present invention has a short tact time and excellent productivity.
１ フリップチップボンダのヘッド
２ 半導体チップ
３ ＮＣＦ
４ 銅ポスト
５ はんだ
６ 半導体チップを接続する基板
７ フリップチップボンダのステージ
８ 次に接続される半導体チップを接続する基板
９ 次に接続される半導体チップ
１０ 受け渡し可能な温度まで冷却中のフリップチップボンダのヘッド
1 Flip chip bonder head 2 Semiconductor chip 3 NCF
DESCRIPTION OF SYMBOLS 4 Copper post 5 Solder 6 Substrate to which semiconductor chip is connected 7 Stage of flip chip bonder 8 Substrate to which semiconductor chip to be connected next is connected 9 Semiconductor chip to be connected next 10 Flip chip bonder being cooled to transferable temperature Head
Claims (6)
該半導体チップ搭載用基板の面方向の熱膨張率（αｓ）が、接続する半導体チップの面方向の熱膨張率（αｃ）より、０．２×１０-6／℃以上、１．６×１０-6／℃以下大きく、かつ該半導体チップ搭載用基板の厚さ方向の熱伝導率が０．１Ｗ／ｍＫ以上、１０．０Ｗ／ｍＫ以下である、半導体装置の製造方法。 A method for manufacturing a semiconductor device comprising a step of connecting a semiconductor chip and a semiconductor chip mounting substrate by a thermocompression bonding method,
The thermal expansion coefficient (αs) in the surface direction of the semiconductor chip mounting substrate is 0.2 × 10 −6 / ° C. or more, 1.6 × 10 6 from the thermal expansion coefficient (αc) in the surface direction of the semiconductor chip to be connected. A method for manufacturing a semiconductor device, wherein the semiconductor chip mounting substrate has a thermal conductivity in the thickness direction of from 0.1 W / mK to 10.0 W / mK.
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| JPWO2022137550A1 (en) * | 2020-12-25 | 2022-06-30 |
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