JP2016025294A - 半導体パッケージ - Google Patents
半導体パッケージ Download PDFInfo
- Publication number
- JP2016025294A JP2016025294A JP2014150374A JP2014150374A JP2016025294A JP 2016025294 A JP2016025294 A JP 2016025294A JP 2014150374 A JP2014150374 A JP 2014150374A JP 2014150374 A JP2014150374 A JP 2014150374A JP 2016025294 A JP2016025294 A JP 2016025294A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor package
- circuit board
- conductive material
- semiconductor element
- stacked
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 278
- 239000004020 conductor Substances 0.000 claims description 106
- 229920000049 Carbon (fiber) Polymers 0.000 claims description 17
- 239000004917 carbon fiber Substances 0.000 claims description 17
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 claims description 17
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 229910002804 graphite Inorganic materials 0.000 claims description 3
- 239000010439 graphite Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 abstract description 14
- 238000003475 lamination Methods 0.000 abstract 2
- 239000011347 resin Substances 0.000 description 26
- 229920005989 resin Polymers 0.000 description 26
- 238000012546 transfer Methods 0.000 description 26
- 239000010410 layer Substances 0.000 description 24
- 238000012986 modification Methods 0.000 description 24
- 230000004048 modification Effects 0.000 description 24
- 238000007789 sealing Methods 0.000 description 22
- 229910000679 solder Inorganic materials 0.000 description 9
- 230000000694 effects Effects 0.000 description 7
- 230000020169 heat generation Effects 0.000 description 5
- 239000012790 adhesive layer Substances 0.000 description 4
- 238000013461 design Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000037303 wrinkles Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 3
- 230000007257 malfunction Effects 0.000 description 3
- 230000015654 memory Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 239000004925 Acrylic resin Substances 0.000 description 2
- 229920000178 Acrylic resin Polymers 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 150000002148 esters Chemical class 0.000 description 2
- 239000000835 fiber Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 239000009719 polyimide resin Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- JOYRKODLDBILNP-UHFFFAOYSA-N Ethyl urethane Chemical compound CCOC(N)=O JOYRKODLDBILNP-UHFFFAOYSA-N 0.000 description 1
- 206010037660 Pyrexia Diseases 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- 238000013459 approach Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000006260 foam Substances 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 230000003252 repetitive effect Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000007665 sagging Methods 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002759 woven fabric Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3733—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4334—Auxiliary members in encapsulations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
- H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1047—Details of electrical connections between containers
- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
- H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
- H01L2225/1094—Thermal management, e.g. cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0204—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate
- H05K1/0206—Cooling of mounted components using means for thermal conduction connection in the thickness direction of the substrate by printed thermal vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0275—Fibers and reinforcement materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/066—Heatsink mounted on the surface of the PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1311—Foil encapsulation, e.g. of mounted components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1305—Moulding and encapsulation
- H05K2203/1322—Encapsulation comprising more than one layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
【解決手段】本発明の一実施形態に係る積層型半導体パッケージは、第1の回路基板と第1の回路基板に実装された第1の半導体素子を含む第1の半導体パッケージと、第2の回路基板と第2の回路基板に実装された第2の半導体素子を含み第1の半導体パッケージに積層された第2の半導体パッケージと、第1の半導体素子上及び第1の半導体素子の周辺の第1の回路基板上に配置される熱伝導材料と、を有する。
【選択図】図1
Description
本発明の実施形態1に係る積層型半導体パッケージ100の概要について、図1乃至図3を参照しながら、詳細に説明する。
図1は、本発明の実施形態1に係る積層型半導体パッケージ100のA−A’(図2参照)断面図を示したものである。図1を参照すると、第1の半導体パッケージ10と第2の半導体パッケージ20が半田ボール31を介して接合され、第1の半導体パッケージ10の上に第2の半導体パッケージ20が積層されていることがわかる。
本発明の実施形態1に係る積層型半導体パッケージ100では、第1の半導体素子12上及び第1の半導体素子12の周辺の第1の回路基板11の一部に、熱伝導材料14が配置される。また、第1の回路基板11にはサーマルビア15が配置され、熱伝導材料14はサーマルビア15と直接又は電極を介して接続される。
本発明の実施形態1に係る積層型半導体パッケージ100では、第1の半導体素子12上及びその周辺の前記第1の回路基板11上に熱伝導材料14が配置されることによって、第1の半導体素子12の上面の発熱を、第1の回路基板11に積極的に伝熱することができる。これによって、第1の半導体素子12から、第1の半導体パッケージ10の上側に配置される第2の半導体パッケージ20の第2の半導体素子22への伝熱を低減することができ、第2の半導体素子22の動作不良を抑制することが可能となる。
本発明の実施形態1に係る積層型半導体パッケージ100の変形例1を、図3を参照しながら詳細に説明する。
本発明の実施形態1に係る積層型半導体パッケージ100の変形例2を、図4を参照しながら詳細に説明する。
本発明の実施形態1に係る積層型半導体パッケージ100の変形例3を、図5を参照しながら詳細に説明する。
本発明の実施形態2に係る積層型半導体パッケージ100の概要について、図6及び図7を参照しながら詳細に説明する。
本発明の実施形態3に係る積層型半導体パッケージ100の概要について、図8を参照しながら詳細に説明する。
本発明の実施形態4に係る積層型半導体パッケージ100の概要について、図9を参照しながら説明する。
本発明の実施形態5に係る積層型半導体パッケージ100の概要について、図10乃至図12を参照しながら説明する。
本発明の実施形態5に係る積層型半導体パッケージ100の変形例を、図12を参照しながら説明する。
本発明の実施形態6に係る積層型半導体パッケージ100の概要について、図13及び図14を参照しながら説明する。
図14は、本発明の実施形態6の変形例に係る積層型半導体パッケージ100の断面図を示したものである。図14を参照すると、第1の半導体パッケージ10の上部に封止樹脂13が充填されており、熱伝導材料14上に積層された低熱伝導層16上に、封止樹脂13が形成されていることがわかる。熱伝導材料14上に低熱伝導層16を形成し、さらに封止樹脂13も形成されるので、図14で示した本発明の実施形態6の変形例に係る積層型半導体パッケージ100は、実施形態6の図13で示した構成よりも、より第1の半導体素子12から第2の半導体素子22への伝熱を低減することが可能となる。
本発明の実施形態7に係る積層型半導体パッケージ100の概要について、図15及び図16を参照しながら説明する。
実施形態7は、実施形態1乃至6のいずれか一つの構成と併用することが可能である。図16は、本発明の実施形態7の変形例に係る積層型半導体パッケージ100の断面図を示したものであり、実施形態1と実施形態7とを組み合わせた構成となっている。すなわち、第1の半導体パッケージ10の上側の面には、第1の半導体素子12及びその周辺の第1の回路基板11上に熱伝導材料14が形成され、第2の半導体パッケージ20の下側の面全体に熱伝導材料14が形成される。
11:第1の回路基板
12:第1の半導体素子
13、23:封止樹脂
14、24:熱伝導材料
15:サーマルビア
16:低熱伝導層
17:接合用電極端子
18:配線
19:導電部材
20:第2の半導体パッケージ
21:第2の回路基板
22:第2の半導体素子
31、35:半田ボール
34:ボンディングワイヤ
100:積層型半導体パッケージ
Claims (9)
- 第1の回路基板と、前記第1の回路基板に実装された第1の半導体素子を含む第1の半導体パッケージと、
第2の回路基板と、前記第2の回路基板に実装された第2の半導体素子を含み、前記第1の半導体パッケージに積層された第2の半導体パッケージと、
前記第1の半導体素子上及び前記第1の半導体素子の周辺の前記第1の回路基板上に配置される熱伝導材料と、
を有する積層型半導体パッケージ。 - 前記第1の半導体パッケージは、前記第2の半導体パッケージと接合し前記第1の半導体素子の周辺に配置される複数の接合用電極端子を有し、
前記熱伝導材料は、前記複数の接合用電極端子の内側に配置される、
ことを特徴とする請求項1に記載の積層型半導体パッケージ。 - 前記第1の回路基板はサーマルビアを有し、
前記熱伝導材料は前記サーマルビアと接する、
ことを特徴とする請求項1に記載の積層型半導体パッケージ。 - 前記サーマルビアは、前記第1の回路基板の電源プレーン又はグランドプレーンと接することを特徴とする、請求項3に記載の積層型半導体パッケージ。
- 前記熱伝導材料は、面方向の熱伝導率が厚さ方向の熱伝導率よりも大きいことを特徴とする、請求項1に記載の積層型半導体パッケージ。
- 前記熱伝導材料は、炭素繊維プリプレグ、炭素繊維シート又はカーボングラファイトシートのうちの何れか一つであることを特徴とする、請求項5に記載の積層型半導体パッケージ。
- 前記熱伝導材料上に、前記熱伝導材料の厚さ方向の熱伝導率よりも熱伝導率が低い層を配置したことを特徴とする、請求項1乃至6の何れか一項に記載の積層型半導体パッケージ。
- 前記熱伝導材料は、平面視において切れ込みを有することを特徴とする、請求項1乃至7の何れか一項に記載の積層型半導体パッケージ。
- 第1の回路基板と、前記第1の回路基板に実装された第1の半導体素子を含む第1の半導体パッケージと、
第2の回路基板と、前記第2の回路基板に実装された第2の半導体素子を含み、前記第1の半導体パッケージに積層された第2の半導体パッケージと、
前記第2の半導体パッケージの前記第1の半導体パッケージと対向する面に配置される熱伝導材料と、
を有する積層型半導体パッケージ。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014150374A JP6438225B2 (ja) | 2014-07-24 | 2014-07-24 | 半導体パッケージ |
KR1020150099569A KR102098978B1 (ko) | 2014-07-24 | 2015-07-14 | 반도체 패키지 |
CN201510412404.6A CN105304592B (zh) | 2014-07-24 | 2015-07-14 | 半导体封装件 |
TW104122944A TWI681514B (zh) | 2014-07-24 | 2015-07-15 | 半導體封裝 |
US14/803,889 US9635762B2 (en) | 2014-07-24 | 2015-07-20 | Semiconductor package |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014150374A JP6438225B2 (ja) | 2014-07-24 | 2014-07-24 | 半導体パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016025294A true JP2016025294A (ja) | 2016-02-08 |
JP6438225B2 JP6438225B2 (ja) | 2018-12-12 |
Family
ID=55167317
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014150374A Active JP6438225B2 (ja) | 2014-07-24 | 2014-07-24 | 半導体パッケージ |
Country Status (5)
Country | Link |
---|---|
US (1) | US9635762B2 (ja) |
JP (1) | JP6438225B2 (ja) |
KR (1) | KR102098978B1 (ja) |
CN (1) | CN105304592B (ja) |
TW (1) | TWI681514B (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20190104620A (ko) | 2017-03-21 | 2019-09-10 | 후지필름 가부시키가이샤 | 적층 디바이스, 적층체 및 적층 디바이스의 제조 방법 |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6557540B2 (ja) * | 2015-07-31 | 2019-08-07 | 日立オートモティブシステムズ株式会社 | パワーモジュール |
FR3044864B1 (fr) * | 2015-12-02 | 2018-01-12 | Valeo Systemes De Controle Moteur | Dispositif electrique et procede d'assemblage d'un tel dispositif electrique |
JP6939568B2 (ja) * | 2016-01-15 | 2021-09-22 | ソニーグループ株式会社 | 半導体装置および撮像装置 |
TWI620356B (zh) * | 2016-10-07 | 2018-04-01 | 欣興電子股份有限公司 | 封裝結構及其製作方法 |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004006564A (ja) * | 2002-03-28 | 2004-01-08 | Sharp Corp | 積層型半導体装置 |
JP2007019130A (ja) * | 2005-07-06 | 2007-01-25 | Sumitomo Electric Ind Ltd | 放熱装置 |
JP2010258254A (ja) * | 2009-04-27 | 2010-11-11 | Renesas Electronics Corp | 半導体装置 |
US20110227209A1 (en) * | 2010-03-18 | 2011-09-22 | In Sang Yoon | Integrated circuit package system with package stacking and method of manufacture thereof |
JP2012142572A (ja) * | 2010-12-31 | 2012-07-26 | Samsung Electronics Co Ltd | 半導体パッケージ及びその製造方法 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5834337A (en) * | 1996-03-21 | 1998-11-10 | Bryte Technologies, Inc. | Integrated circuit heat transfer element and method |
JP3285763B2 (ja) | 1996-06-24 | 2002-05-27 | 京セラ株式会社 | 半導体装置 |
US6737750B1 (en) * | 2001-12-07 | 2004-05-18 | Amkor Technology, Inc. | Structures for improving heat dissipation in stacked semiconductor packages |
JP3858854B2 (ja) * | 2003-06-24 | 2006-12-20 | 富士通株式会社 | 積層型半導体装置 |
US7701040B2 (en) * | 2007-09-24 | 2010-04-20 | Stats Chippac, Ltd. | Semiconductor package and method of reducing electromagnetic interference between devices |
US8569869B2 (en) * | 2010-03-23 | 2013-10-29 | Stats Chippac Ltd. | Integrated circuit packaging system with encapsulation and method of manufacture thereof |
KR20120053332A (ko) * | 2010-11-17 | 2012-05-25 | 삼성전자주식회사 | 반도체 패키지 및 이의 제조 방법 |
US8841171B2 (en) * | 2010-11-22 | 2014-09-23 | Bridge Semiconductor Corporation | Method of making stackable semiconductor assembly with bump/flange heat spreader and dual build-up circuitry |
KR20130038581A (ko) * | 2011-10-10 | 2013-04-18 | 삼성전자주식회사 | 반도체 패키지 |
TW201351599A (zh) * | 2012-06-04 | 2013-12-16 | 矽品精密工業股份有限公司 | 半導體封裝件及其製法 |
KR102076044B1 (ko) * | 2013-05-16 | 2020-02-11 | 삼성전자주식회사 | 반도체 패키지 장치 |
KR102065008B1 (ko) * | 2013-09-27 | 2020-01-10 | 삼성전자주식회사 | 적층형 반도체 패키지 |
-
2014
- 2014-07-24 JP JP2014150374A patent/JP6438225B2/ja active Active
-
2015
- 2015-07-14 CN CN201510412404.6A patent/CN105304592B/zh active Active
- 2015-07-14 KR KR1020150099569A patent/KR102098978B1/ko active IP Right Grant
- 2015-07-15 TW TW104122944A patent/TWI681514B/zh active
- 2015-07-20 US US14/803,889 patent/US9635762B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004006564A (ja) * | 2002-03-28 | 2004-01-08 | Sharp Corp | 積層型半導体装置 |
JP2007019130A (ja) * | 2005-07-06 | 2007-01-25 | Sumitomo Electric Ind Ltd | 放熱装置 |
JP2010258254A (ja) * | 2009-04-27 | 2010-11-11 | Renesas Electronics Corp | 半導体装置 |
US20110227209A1 (en) * | 2010-03-18 | 2011-09-22 | In Sang Yoon | Integrated circuit package system with package stacking and method of manufacture thereof |
JP2012142572A (ja) * | 2010-12-31 | 2012-07-26 | Samsung Electronics Co Ltd | 半導体パッケージ及びその製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20190104620A (ko) | 2017-03-21 | 2019-09-10 | 후지필름 가부시키가이샤 | 적층 디바이스, 적층체 및 적층 디바이스의 제조 방법 |
US11011499B2 (en) | 2017-03-21 | 2021-05-18 | Fujifilm Corporation | Stacked device, stacked structure, and method of manufacturing stacked device |
Also Published As
Publication number | Publication date |
---|---|
US20160027715A1 (en) | 2016-01-28 |
CN105304592A (zh) | 2016-02-03 |
KR20160012913A (ko) | 2016-02-03 |
CN105304592B (zh) | 2019-01-18 |
US9635762B2 (en) | 2017-04-25 |
TW201605002A (zh) | 2016-02-01 |
KR102098978B1 (ko) | 2020-04-08 |
JP6438225B2 (ja) | 2018-12-12 |
TWI681514B (zh) | 2020-01-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6438225B2 (ja) | 半導体パッケージ | |
US10134710B2 (en) | Semiconductor package | |
JP3655242B2 (ja) | 半導体パッケージ及び半導体実装装置 | |
KR102243287B1 (ko) | 반도체 패키지 및 그 제조 방법 | |
JP5413971B2 (ja) | 電子部品実装装置及びその製造方法 | |
US8779603B2 (en) | Stacked semiconductor device with heat dissipation | |
JP2009016626A (ja) | 半導体モジュール装置および半導体モジュール装置の製造方法ならびにフラットパネル型表示装置,プラズマディスプレイパネル | |
JP2010080572A (ja) | 電子装置 | |
JP2009289790A (ja) | 部品内蔵プリント配線板及び部品内蔵プリント配線板の製造方法 | |
KR101697684B1 (ko) | 임베딩된 다이를 갖는 집적 회로 패키지 내의 열 비아들 | |
JP2007281201A (ja) | 半導体装置 | |
KR20150125988A (ko) | 반도체 장치 | |
JP5218230B2 (ja) | 半導体装置 | |
JP6007566B2 (ja) | 部品内蔵配線基板、及び部品内蔵配線基板の放熱方法 | |
US9402331B2 (en) | Integrated circuit chip comprising electronic device and electronic system | |
JP5810206B1 (ja) | 基板構造およびその製造方法 | |
JP7103030B2 (ja) | 電子部品内蔵パッケージ及びその製造方法 | |
JP2003273321A (ja) | 半導体モジュール | |
JP2020047690A (ja) | 電子回路装置 | |
JP2006351952A (ja) | 半導体装置 | |
JP2012243973A (ja) | 半導体装置 | |
JP2012199283A (ja) | 半導体装置 | |
JP7283909B2 (ja) | 配線基板および実装構造 | |
JP5220438B2 (ja) | 半導体装置パッケージ積層体 | |
JP3844079B2 (ja) | 半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170214 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20171023 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20171114 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180112 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180522 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180720 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20181113 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20181116 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6438225 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |