CN105304592A - 半导体封装件 - Google Patents

半导体封装件 Download PDF

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Publication number
CN105304592A
CN105304592A CN201510412404.6A CN201510412404A CN105304592A CN 105304592 A CN105304592 A CN 105304592A CN 201510412404 A CN201510412404 A CN 201510412404A CN 105304592 A CN105304592 A CN 105304592A
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China
Prior art keywords
heat conduction
semiconductor
conduction material
circuit substrate
package part
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Granted
Application number
CN201510412404.6A
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English (en)
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CN105304592B (zh
Inventor
渡边真司
细山田澄和
中村慎吾
出町浩
宫腰武
近井智哉
石堂仁则
松原宽明
中村卓
本多广一
熊谷欣一
作元祥太朗
岩崎俊宽
玉川道昭
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Rely On Technology Japan Co
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J Devices Corp
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    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/181—Printed circuits structurally associated with non-printed electric components associated with surface mounted components
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    • H01L23/3733—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures
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Abstract

本发明的目的在于提供一种半导体封装件，能够减少层叠型半导体封装件中从下侧芯片向上侧芯片的传热。提供一种半导体封装件，具有：第一半导体封装件，包含第一电路基板和安装于第一电路基板的第一半导体元件；第二半导体封装件，包含第二电路基板和安装于第二电路基板的第二半导体元件，第二半导体封装件与第一半导体封装件层叠；以及导热材料，配置在第一半导体元件上和第一半导体元件周边的第一电路基板上。

Description

半导体封装件
技术领域
本发明涉及半导体封装件的安装技术。尤其涉及用于减轻层叠型半导体封装件中的、从下侧封装件向上侧封装件的传热的结构。
背景技术
近些年来，伴随着电子设备的小型化/高密度化、提高向半导体元件的存取速度等需求，而使用层叠多个半导体封装件的封装叠层(Pop:packageonPackage)。例如，在手机、智能手机等便携型终端中，使用将包含进行图像处理的逻辑芯片的封装件配置在下侧且将包含存储芯片的封装件配置在上侧的半导体封装件。
在这种层叠型半导体封装件中，存在芯片间的距离有可能接近至1mm以下的程度，来自下侧逻辑芯片的发热传递至上侧存储芯片而引起上侧存储芯片的动作不良的情况。因此，正在寻求减轻从下侧封装件向上侧封装件的传热的措施。
另一方面，日本特开平10-12780号公报提出了一种将散热部件附着在安装于布线基板的半导体元件上的半导体装置。
发明内容
本发明的一个实施方式的目的在于提供一种能够减轻层叠型半导体封装件中从下侧芯片向上侧芯片的传热的半导体封装件。
本发明的一个实施方式的层叠型半导体封装件具有：第一半导体封装件，包含第一电路基板和安装于第一电路基板的第一半导体元件；第二半导体封装件，包含第二电路基板和安装于第二电路基板的第二半导体元件，第二半导体封装件与第一半导体封装件层叠；以及导热材料，配置在第一半导体元件上和第一半导体元件的周边的第一电路基板上。
在本发明的一个实施方式中，第一半导体封装件也可以具有与第二半导体封装件接合且配置在第一半导体元件的周边的多个接合用电极端子，导热材料可以配置在多个接合用电极端子的内侧。
在本发明的一个实施方式中，第一半导体封装件可以具有与第二半导体封装件接合且配置在第一半导体元件的周边的多个接合用电极端子，导热材料以包围多个接合用电极端子的方式设置在第一半导体封装件的大致整个面上。
在本发明的一个实施方式中，第一电路基板也可以具有导热通孔，导热材料与导热通孔相接。
在本发明的一个实施方式中，导热通孔也可以与第一电路基板的电源层或接地层相接。
在本发明的一个实施方式中，导热材料的面方向的导热率也可以比厚度方向的导热率大。
在本发明的一个实施方式中，导热材料也可以是碳纤维预浸料、碳纤维片材以及碳石墨片材中的任意一种。
另外，在导热材料上也可以配置导热率低的层。
在本发明的一个实施方式中，也可以在导热材料的上表面设置密封树脂。
在本发明的一个实施方式中，导热材料也可以以比第一半导体元件的一边窄的宽度形成为十字形。
本发明一个实施方式的另一个层叠型半导体封装件具有：第一半导体封装件，包含第一电路基板和安装于第一电路基板的第一半导体元件；第二半导体封装件，包含第二电路基板和安装于第二电路基板的第二半导体元件，第二半导体封装件与第一半导体封装件层叠；以及第一导热材料，配置在第二半导体封装件的与第一半导体封装件对置的面上。
在本发明的一个实施方式中，也可以具有配置在第一半导体元件上以及第一半导体元件的周边的第一电路基板上的第二导热材料。
在本发明的一个实施方式中，第一导热材料和第二导热材料的面方向导热率也可以比厚度方向的导热率大。
附图说明
图1是本发明的实施方式一的层叠型半导体封装件的剖面图。
图2是本发明的实施方式一的层叠型半导体封装件的概略俯视图。
图3是本发明的实施方式一的变形例的层叠型半导体封装件的概略俯视图。
图4是本发明的实施方式一的另一变形例的层叠型半导体封装件的概略俯视图。
图5是本发明的实施方式一的又一变形例的层叠型半导体封装件的概略俯视图。
图6是本发明的实施方式二的层叠型半导体封装件的剖面图。
图7是本发明的实施方式二的层叠型半导体封装件的概略俯视图。
图8是本发明的实施方式三的层叠型半导体封装件的剖面图。
图9是本发明的实施方式四的层叠型半导体封装件的剖面图。
图10是本发明的实施方式五的层叠型半导体封装件的剖面图。
图11是本发明的实施方式五的层叠型半导体封装件的概略俯视图。
图12是本发明的实施方式五的变形例的层叠型半导体封装件的剖面图。
图13是本发明的实施方式六的层叠型半导体封装件的剖面图。
图14是本发明的实施方式六的变形例的层叠型半导体封装件的剖面图。
图15是本发明的实施方式七的层叠型半导体封装件的剖面图。
图16是本发明的实施方式七的变形例的层叠型半导体封装件的剖面图。
(附图标记的说明)
10第一半导体封装件；11第一电路基板；12第一半导体元件；12a：虚线；13、23密封树脂；14、24导热材料；14s切口；15导热通孔；15a虚线；16低导热层；17接合用电极端子；18布线；19导电部件；20第二半导体封装件；21第二电路基板；22第二半导体元件；31、35焊料球；34键合线；50区域；100层叠型半导体封装件。
具体实施方式
以下，参照附图对本发明的层叠型半导体封装件进行说明。但是，本发明的层叠型半导体封装件能够以多种不同的方式进行实施，并不局限地解释为下文所示的实施方式的记载内容。另外，在本实施方式所参照的附图中，对于同一部分或具有相同功能的部分标注同一附图标记，并省略其重复说明。
<实施方式一>
参照图1～图3对本发明的实施方式一的层叠型半导体封装件100的概要进行详细说明。
(层叠型半导体封装件的基本结构)
图1是本发明的实施方式一的层叠型半导体封装件100的A－A’(参照图2)剖面图。参照图1可知第一半导体封装件10与第二半导体封装件20经由焊料球31而接合，第二半导体封装件20层叠在第一半导体封装件10上。
第一半导体封装件10具有第一电路基板11，第一半导体元件12配置在第一电路基板11上。第一电路基板11由一个或多个布线基板构成。图1中表示了第一电路基板11由4层构成，但并不局限于此。第一半导体元件12例如配置应用处理器等，但并不局限于此。另外，在图1中，将第一半导体元件12表示为一个半导体，也可以将多个半导体元件作为第一半导体元件12配置在第一电路基板11上。
在构成第一电路基板11的布线基板上配置有布线18，在第二半导体封装件20一侧的面上露出的布线18的一部分成为接合用电极端子17。焊料球31配置在接合用电极端子17上，与配置在第二半导体封装件20的第二电路基板21的下侧的电极连接。第一半导体封装件10的第一电路基板11的布线18与第二半导体封装件20的第二电路基板21的布线经由焊料球31电连接。另外，利用焊料球31将第一半导体封装件10与第二半导体封装件20的间隔保持为固定长度。
第二半导体封装件20具有由一个或多个布线基板构成的第二电路基板21，在第二电路基板21上配置第二半导体元件22。第二半导体元件22利用以金(Au)或铜(Cu)等为材料的键合线34与第二电路基板21的布线电连接。第二半导体元件22例如配置闪存(FLASH)、同步动态随机存取存储器(SDRAM)等存储器。也可以将多个相同种类或不同种类的存储器在第二电路基板21上并列配置来作为第二半导体元件22。另外，也可以将多个存储器层叠配置来作为第二半导体元件22。
以覆盖第二电路基板21和第二半导体元件22的方式配置密封树脂23。密封树脂23保护第二半导体元件22与第二电路基板21的上部，以免水分、杂质从外部混入，并防止第二电路基板21的翘曲。作为密封树脂23，可以使用环氧树脂、氰酸酯树脂、丙烯酸树脂、聚酰亚胺树脂、硅树脂等。
电极配置在第一电路基板11的下侧，并经由配置于上述电极的焊料球35与安装层叠型半导体封装件100的外部的安装基板连接。
(用于减少从下侧半导体元件向上侧半导体元件的传热的结构)
在本发明的实施方式一的层叠型半导体封装件100中，导热材料14配置于第一半导体元件12上和第一半导体元件12的周边的第一电路基板11的一部分。另外，在第一电路基板11配置导热通孔(thermalvia)15，导热材料14与导热通孔15直接连接或经由电极连接。
图2是本发明的实施方式一的层叠型半导体封装件100的、从上侧观察第一半导体封装件10的俯视图。在矩形形状的第一半导体封装件10的***周边，将多个接合用电极端子17在上下左右分别各配置两列。另外，导热材料14以由配置在第一半导体封装件10的***附近的多个接合用电极端子17所包围的方式配置在上述多个接合用电极端子17的内侧的区域。
在此，虚线12a所包围的部分表示配置第一半导体元件12的位置，矩形形状的第一半导体元件12配置在第一半导体封装件10的中央。因此可知，导热材料14配置为比配置第一半导体元件12的部分更宽广，以便完全覆盖配置第一半导体元件12的部分。由于第一半导体元件12呈矩形形状，且矩形形状的导热材料14以包围上述第一半导体元件12的方式配置，因此配置导热材料14而未配置第一半导体元件12的区域50形成为中空的矩形形状。
以虚线15a示出的圆表示配置有导热通孔15的部位。导热通孔15被配置在区域50的各顶点附近和各边的中央附近总共8个部位，但导热通孔15的配置数量和在区域50内的位置并不局限于此。
下文对导热材料14的材料和形成方法进行详细说明。
导热材料14优选使用碳纤维预浸料(carbonfiberprepreg)、碳纤维片材、石墨等。在此，导热材料14在传热方向上具有各向异性，当导热材料14被形成在第一半导体元件12及其周边的第一电路基板11上时，优选面方向(图1中的横向)的传热性比厚度方向(图1中的纵向)的传热性高。
在使用碳纤维预浸料作为导热材料14时，将碳纤维预浸料载置在第一半导体元件12及其周边的第一电路基板11上，将碳纤维预浸料进行加压冲压而成形至规定厚度后，进行加热处理。在冲压时，为了排除孔隙(void)，优选采用真空冲压或真空层压。在冲压后进行加热处理时，碳纤维预浸料沿着第一半导体元件12和第一电路基板11的台阶差、形成在配置有导热通孔15的部分的第一电路基板11上的凹部等而变形并粘接(参照图1)。
在使用碳纤维片材或碳纤维预浸料作为导热材料14时，首先，在第一半导体元件12及其周边的第一电路基板11上形成由粘接膜等构成的粘接层(未图示)。然后，将以固化状态而供给的碳纤维片材或碳纤维预浸料载置并粘接在形成有粘接层的第一半导体元件12及其周边的第一电路基板11上。为了防止碳纤维片材或碳纤维预浸料的纤维因第一半导体元件12和第一电路基板11所形成的台阶差而折断，纤维优选采用不织布，而不是纺织布。
下文说明导热通孔15的形成方法。
首先，利用蚀刻等在构成第一电路基板11的各布线基板的规定位置形成通孔(via)。然后，将由金属镀敷或蚀刻等形成的金属材料填埋在通孔内。将在各布线基板的规定位置形成的金属材料层叠而形成导热通孔15。
参照图1，在导热通孔15的上侧形成布线18，在下侧形成导电部件19。布线18和导电部件19使用金属材料。在此情况下，导热材料14和导热通孔15经由布线18连接。也可以在导热通孔15的上侧不形成布线18而将导热材料14与导热通孔15直接连接。在任一种情况下，在导热材料14使用碳纤维片材或碳纤维预浸料的情况下，粘接层都必不可少，所以导热材料14和导热通孔15还经由粘接层连接。
另外，也可以配置成在构成第一电路基板11的各布线基板上配置电源层(powerplane)或接地层(groundplane)，将导热通孔15与电源层或接地层连接。如果电源层和接地层不会因导热通孔15和导热材料14而短路，则可以使一些导热通孔15与电源层连接，而使另一些导热通孔15与接地层连接。
在本发明实施方式一的层叠型半导体封装件100中，通过在第一半导体元件12上及其周边的上述第一电路基板11上配置导热材料14，能够将第一半导体元件12的上表面的发热更积极地传热至第一电路基板11。因而，能够减少从第一半导体元件12向配置在第一半导体封装件10上侧的第二半导体封装件20的第二半导体元件22的传热，能够抑制第二半导体元件22的动作不良。
另外，在导热材料14使用面方向上的传热性高的材料的情况下，由于能够使第一半导体元件12的上表面的发热更积极地在面方向上传热，所以能够进一步减少向第二半导体元件22的传热。
另外，在第一电路基板11上配置导热通孔15，使导热材料14与导热通孔15连接，据此能够经由导热材料14和导热通孔15将第一半导体元件12上表面的发热传递至第一电路基板11。特别地，如果采用在导热通孔15的下侧配置导电部件19和焊料球35的结构，则能够向载置层叠型半导体封装件100的其它支撑基板传热。通过采用这种构成，能够使热量更加向第一电路基板11或层叠型半导体封装件100的外部逃逸，所以能够进一步减少从第一半导体元件12向第二半导体元件22的传热。
另外，在采用将导热通孔15配置在第一电路基板11上，将电源层或接地层配置在构成第一电路基板11的布线基板上，将导热通孔15与电源层或接地层连接的结构的情况下，能够利用电源层或接地层将第一半导体元件12的热量向整个第一电路基板11扩散。通过采用这样的结构，也可以进一步减少从第一半导体元件12向第二半导体元件22的传热。
(实施方式一的变形例一)
参照图3详细说明本发明实施方式一的层叠型半导体封装件100的变形例一。
根据用作导热材料14的原材料，由于第一半导体元件12具有厚度等原因，有时会使导热材料14产生褶皱、或者导热材料14与第一半导体元件12或第一电路基板11的连接状态变得不良。因此，也可以如图3所示，形成从矩形形状的导热材料14的各顶点朝向第一半导体元件12的顶点的切口14s。切口14s吸收导热材料14的伴随着台阶差等的松弛等，据此能够防止导热材料14的褶皱的产生、导热材料14与第一半导体元件12或第一电路基板11的连接不良。
另外，切口14s的宽度或数量、形成部位等并不局限于上述情况。例如也可以放射状地形成多个切口14s。另外，第一电路基板11或第一半导体元件12也可以从形成了切口14s的部分露出，或导热材料14也可以在形成有切口14s的部分局部地折叠。另外，可以对应于切口14s的形成位置而适当地调整导热通孔15的配置位置。相反，也可以考虑可能配置导热通孔15的部位而适当地调整切口14s的形成位置。
(实施方式一的变形例二)
参照图4详细说明本发明实施方式一的层叠型半导体封装件100的变形例二。
变形例二是用于防止上述变形例一中所说明的因第一半导体元件12的厚度等而导致的褶皱的产生、连接不良的更简单的方法。参照图4，导热材料14以比第一半导体元件12的一边略窄的宽度形成为十字状，第一半导体元件12的各个顶点未被导热材料14覆盖。换言之，从矩形形状的导热材料14的各顶点朝向比第一半导体元件12的顶点所在的位置的点靠中心的点分别切除矩形形状，据此形成变形例二中的导热材料14。
参照图4，例如从导热材料14的中心向第一半导体元件12的上部延伸的部分仅和第一半导体元件12与第一电路基板11的台阶差垂直地相交，因此导热材料14容易吸收台阶差，难以产生褶皱等。另外，在变形例二中，仅将矩形形状的导热材料14的各顶点切除成矩形形状，载置在第一半导体元件12和第一电路基板11上即可，所以还具有形成方法比较容易的优点。
在图4中，位于第一半导体元件12的上下左右的、第一电路基板11上的导热材料14的各自的形状为矩形，但变形例二不局限于此。例如，也可以将导热材料14的形状形成为随着接近第一半导体封装件10的***而变宽的梯形。另外，在图4中，在第一半导体元件12的上下左右各配置1个导热通孔15，也可以与导热材料14的形状等相对应而适当地配置导热通孔15。
(实施方式一的变形例三)
参照图5详细说明本发明实施方式一的层叠型半导体封装件100的变形例三。
在上述实施方式一的说明中，区域50的形状为中空的矩形形状，但区域50的形状并不局限于此。图2中示出了将接合用电极端子17在第一电路基板11的周边部分配置成内侧和外侧的两列的状态。与此相对，参照图5，采用将图2中内侧的接合用电极端子17的一部分置换成导热通孔15的结构。在图5中，区域50的外侧形状为凹凸状，但也可以为波浪线状。
通过具有上述结构，能够更宽广地形成导热材料14，可以提高在面方向上传递第一半导体元件12的发热的效果。另外，能够确保配置第一半导体元件12的空间更宽广。
另外，通过具有上述结构，还存在可以缩短第一半导体元件12与导热通孔15的距离的情况。在此情况下，能够经由导热材料14和导热通孔15更有效地将第一半导体元件12的发热传递至第一半导体封装件10的下侧。
<实施方式二>
参照图6和图7对本发明实施方式二的层叠型半导体封装件100的概要进行详细说明。
图6是示出本发明实施方式二的层叠型半导体封装件100的剖面图。虽然图6与图1类似，但在导热材料14上配置有导热率比导热材料14的厚度方向的导热率低的低导热层16，在这点上与图1不同。
优选地，尽量不使石英填料(silicafiller)等导热率高的物质混入到低导热层16内，例如可以应用环氧类的预浸(prepreg)材料等。更优选地，可以使用均匀地混入了空气的材料，例如发泡聚氨酯等绝热材料。
关于低导热材料14和低导热层16，也可以先在第一半导体元件12和第一电路基板11上形成导热材料14后，再在导热材料14上形成低导热层16。或者，先使导热材料14与低导热层16粘接，再将粘接后的导热材料14与低导热层16配置在第一半导体元件12和第一电路基板11上。
图7是示出本发明实施方式二的层叠型半导体封装件100的、从上侧观察第一半导体封装件10的俯视图。
参照图7可知，低导热层16具有矩形形状，并被配置在配置有导热材料14的区域的略微内侧。在图7中，低导热层16被配置在配置有导热材料14的区域的内侧，但低导热层16也可以配置成覆盖配置有导热材料14的区域。
在导热材料14上配置低导热层16，据此能够积极地促进第一半导体元件12的发热在面方向上的传热，能够抑制第一半导体元件12的发热向厚度方向传递。结果，能够进一步减少从第一半导体元件12向第二半导体元件22的传热。
另外，在导热材料14上配置低导热层16，据此能够避免导热材料14与第二半导体封装件20的下侧直接接触，因此也具有能够扩大同第一半导体封装件10与第二半导体封装件20的间隔相关的设计余裕的效果。
另外，低导热层16的配置区域具有与导热材料14的配置区域几乎相同的面积，但并不局限于此，也可以进一步缩窄低导热层16的配置区域。但是，从更积极地促进第一半导体元件12的发热在面方向上传热的观点出发，优选低导热层16的配置区域更大。
<实施方式三>
参照图8对本发明实施方式三的层叠型半导体封装件100的概要进行详细说明。
图8是示出本发明实施方式三的层叠型半导体封装件100的剖面图。图8与图1类似。但是，在第一电路基板11上、即在导热材料14上和在构成未配置导热材料14的第一电路基板11的电路基板上配置有密封树脂13，在这点上，图8与图1不同。
密封树脂13保护第一半导体元件12和第一电路基板11的上部，以免水分和杂质从外部混入，防止第一电路基板11的翘曲。虽然密封树脂13可以使用环氧树脂、氰酸酯树脂、丙烯酸树脂、聚酰亚胺树脂、硅树脂等，但优选使用导热率比导热材料14的厚度方向的导热率低的材料。在第一电路基板11的整个面上形成密封树脂13后，在规定位置形成用于配置焊料球31的通孔(via)。
在第一电路基板11上配置密封树脂13，据此能够抑制向导热材料14的厚度方向的传热，能够进一步减少从第一半导体元件12向第二半导体元件22的传热。另外，由于在导热材料14上配置有密封树脂13，因此能够避免导热材料14与第二半导体封装件20的下侧直接接触，也具有能够扩大同第一半导体封装件10与第二半导体封装件20的间隔相关的设计余裕的效果。
<实施方式四>
参照图9对本发明实施方式四的层叠型半导体封装件100的概要进行说明。
图9是示出本发明实施方式四的层叠型半导体封装件100的剖面图。虽然图9与图6类似，但在第一电路基板11上配置有密封树脂13，在这点上，图9与图6不同。
在实施方式四中，在低导热层16上配置有密封树脂13。当低导热层16的配置区域比导热材料14的配置区域小时，在导热材料14上也配置密封树脂13。通过具有这种结构，能够进一步提高抑制向导热材料14的厚度方向传热的效果，能够大幅度减少从第一半导体元件12向第二半导体元件22的传热。
<实施方式五>
参照图10～图12对本发明实施方式五的层叠型半导体封装件100的概要进行说明。
图10是示出本发明实施方式五的层叠型半导体封装件100的、A－A’剖面图(参照图11)。虽然图10和图1类似，但在第一电路基板11上表面的左右的边缘部、剖面图中在左右各配置两个的接合用电极端子17之间也配置有导热材料14，在这点上，图10和图1不同。
图11是本发明实施方式五的层叠型半导体封装件100的、从上侧观察第一半导体封装件10的俯视图。参照图11，在第一半导体封装件10上部的整个面配置导热材料14。导热材料14以遍及整个面的方式配置在第一半导体元件12和第一电路基板11上后，利用激光消融(laserabrasion)来开设用于露出接合用电极端子17的孔，并且利用表面沾污去除(desmear)处理除去残渣而形成。
导热材料14配置在第一半导体封装件10的整个面上，据此能够更积极地将第一半导体元件12的发热传递至第一电路基板11整体而扩散。能够防止热量集中在第一半导体元件12的上部，因此能够进一步减少从第一半导体元件12向第二半导体元件22的传热。
(实施方式五的变形例)
参照图12对本发明实施方式五的层叠型半导体封装件100的变形例进行说明。
参照图12可知，在第一半导体封装件10的上部填充有密封树脂13，在导热材料14上形成有密封树脂13。在第一电路基板11的整个面上形成导热材料14后，再形成密封树脂13。之后，利用蚀刻等在封闭树脂13和导热材料14上形成用于露出接合用电极端子17的孔。
导热材料14形成在第一电路基板11的整个面上，进而，在导热材料14上填充密封树脂13，据此能够抑制向导热材料14的厚度方向的传热。因此，与图10和图11所示实施方式相比，能够进一步向第一电路基板11整体传热而扩散，能够进一步减少从第一半导体元件12向第二半导体元件22的传热。另外，由于在导热材料14上配置密封树脂13，所以能够避免导热材料14与第二半导体封装件20的下侧直接接触，也具有能够扩大同第一半导体封装件10与第二半导体封装件20的间隔相关的设计余裕的效果。
<实施方式六>
参照图13和图14对本发明实施方式六的层叠型半导体封装件100的概要进行说明。
图13是示出本发明实施方式六的层叠型半导体封装件100的剖面图。虽然图13与图10类似，但在导热材料14的上部还配置有低导热层16，在这点上，图13与图10不同。导热材料14以遍及整个面的方式形成在第一半导体元件12上和第一电路基板11上，还在导热材料14上形成低导热层16，据此能够积极地促进第一半导体元件12的发热在面方向上的传热。因此，与实施方式五的图10所示结构相比，图13所示的本发明的实施方式六的层叠型半导体封装件100能够进一步减少从第一半导体元件12向第二半导体元件22的传热。另外，通过在导热材料14上配置低导热层16，能够避免导热材料14与第二半导体封装件20的下侧直接接触，所以也具有能够扩大同第一半导体封装件10与第二半导体封装件20的间隔相关的设计余裕的效果。
(实施方式六的变形例)
图14是示出本发明实施方式六的变形例的层叠型半导体封装件100的剖面图。参照图14可知，在第一半导体封装件10的上部填充有密封树脂13，在层叠在导热材料14上的低导热层16上形成有密封树脂13。在导热材料14上形成低导热层16，进而也形成密封树脂13，所以与实施方式六的图13所示结构相比，图14所示本发明的实施方式六的变形例的层叠型半导体封装件100能够进一步减少从第一半导体元件12向第二半导体元件22的传热。
<实施方式七>
参照图15和图16对本发明实施方式七的层叠型半导体封装件100的概要进行说明。
图15是示出本发明实施方式七的层叠型半导体封装件100的剖面图。参照图15，导热材料24被配置在第二半导体封装件22的下侧的整个面。关于导热材料24的材质、特性，与实施方式一～七所说明的导热材料14相同。导热材料24形成在第二电路基板21的、与第一半导体封装件10对置一侧的整个面上后，形成用于露出与焊料球31连接的电极的孔。
在第二半导体封装件20的下侧整个面上形成导热材料24，据此使从第一半导体元件12向导热材料24的与第一半导体元件12的上部相对的部分传递的热量在面方向上扩散。即，将第一半导体元件12的发热向第二半导体封装件20整体扩散，防止热量集中在第一半导体元件12的上部。据此，能够减少从第一半导体元件12向配置在第一半导体封装件10的上侧的第二半导体封装件20的第二半导体元件22的传热，能够抑制第二半导体元件22的动作不良。
另外，虽然在图15中示出导热材料24形成在第二半导体封装件20的下侧整个面上，但形成导热材料24面积和形状并不局限于此。但是，从使第一半导体元件12的发热向第二半导体封装件20整体扩散的观点出发，优选导热材料24被形成得尽可能地宽广。
(实施方式七的变形例)
实施方式七能够与实施方式一～六中的任一个结构组合使用。图16是示出本发明实施方式七的变形例的层叠型半导体封装件100的剖面图，采用将实施方式一与实施方式七组合的结构。即，在第一半导体封装件10的上侧的面、即在第一半导体元件12及其周边的第一电路基板11上形成导热材料14，在第二半导体封装件20的下侧的整个面形成导热材料14。
通过将实施方式七与实施方式一～六中的任一个结构组合，与实施方式一～六的单独结构相比，能够进一步减少从第一半导体元件12向第二半导体元件22的传热。
以上参照图1～图16对本发明的实施方式一～实施方式七进行了说明。另外，本发明并不局限于上述实施方式，在不脱离主旨的范围内可以进行适当变更。

Claims (14)

1.一种层叠型半导体封装件，具有：
第一半导体封装件，包含第一电路基板和安装于所述第一电路基板的第一半导体元件；
第二半导体封装件，包含第二电路基板和安装于所述第二电路基板的第二半导体元件，所述第二半导体封装件与所述第一半导体封装件层叠；以及
导热材料，配置在所述第一半导体元件上以及所述第一半导体元件的周边的所述第一电路基板上。
2.根据权利要求1所述的层叠型半导体封装件，其特征在于，
所述第一半导体封装件具有与所述第二半导体封装件接合且配置在所述第一半导体元件的周边的多个接合用电极端子，
所述导热材料配置在所述多个接合用电极端子的内侧。
3.根据权利要求1所述的层叠型半导体封装件，其特征在于，
所述第一半导体封装件具有与所述第二半导体封装件接合且配置在所述第一半导体元件的周边的多个接合用电极端子，
所述导热材料包围设置有所述多个接合用电极端子的区域，并被设置在所述第一半导体封装件的大致整个面上。
4.根据权利要求1所述的层叠型半导体封装件，其特征在于，
所述第一电路基板具有导热通孔，
所述导热材料与所述导热通孔相接。
5.根据权利要求4所述的层叠型半导体封装件，其特征在于，
所述导热通孔与所述第一电路基板的电源层或接地层相接。
6.根据权利要求1所述的层叠型半导体封装件，其特征在于，
所述导热材料的面方向的导热率比厚度方向的导热率大。
7.根据权利要求1所述的层叠型半导体封装件，其特征在于，
所述导热材料是碳纤维预浸料、碳纤维片材或碳石墨片材中的任意一种。
8.根据权利要求1所述的层叠型半导体封装件，其特征在于，
在所述导热材料上配置有导热率比所述导热材料的厚度方向的导热率低的层。
9.根据权利要求1所述的层叠型半导体封装件，其特征在于，
在所述导热材料的上表面设置有密封树脂。
10.根据权利要求1所述的层叠型半导体封装件，其特征在于，
所述导热材料以比所述第一半导体元件的一边窄的宽度形成为十字形。
11.根据权利要求1所述的层叠型半导体封装件，其特征在于，
俯视观察所述导热材料时，所述导热材料具有切口。
12.一种层叠型半导体封装件，具有：
第一半导体封装件，包含第一电路基板和安装于所述第一电路基板的第一半导体元件；
第二半导体封装件，包含第二电路基板和安装于所述第二电路基板的第二半导体元件，所述第二半导体封装件与所述第一半导体封装件层叠；以及
第一导热材料，配置在所述第二半导体封装件的与所述第一半导体封装件对置的面上。
13.根据权利要求12所述的层叠型半导体封装件，其特征在于，
具有配置在所述第一半导体元件上以及所述第一半导体元件的周边的所述第一电路基板上的第二导热材料。
14.根据权利要求13所述的层叠型半导体封装件，其特征在于，
所述第一导热材料和所述第二导热材料的面方向的导热率比厚度方向的导热率大。
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