JP2015053400A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2015053400A JP2015053400A JP2013185612A JP2013185612A JP2015053400A JP 2015053400 A JP2015053400 A JP 2015053400A JP 2013185612 A JP2013185612 A JP 2013185612A JP 2013185612 A JP2013185612 A JP 2013185612A JP 2015053400 A JP2015053400 A JP 2015053400A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 112
- 239000012535 impurity Substances 0.000 claims description 50
- 230000004888 barrier function Effects 0.000 abstract description 63
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 230000008901 benefit Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 230000035515 penetration Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000001737 promoting effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
- H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
【解決手段】一の実施形態によれば、半導体装置は、第1の面と、前記第1の面に対向する第2の面とを有する、第1導電型の第1半導体層と、前記第1半導体層の前記第1の面に形成された、第2導電型の第2半導体層とを備える。さらに、前記装置は、前記第1および第2半導体層に形成され、前記第1の面に平行な第1方向に延びている、複数の制御電極と、前記第2半導体層の前記第1半導体層とは反対側に、前記第1方向に沿って交互に形成された、前記第1導電型の複数の第3半導体層および前記第2導電型の複数の第4半導体層とを備える。さらに、前記装置は、前記第2半導体層の前記第1半導体層側、または前記第2半導体層に包囲される位置に形成された、前記第1導電型の複数の第5半導体層を備え、前記第5半導体層は、前記第1方向に沿って互いに離間して配置されている。
【選択図】図1
Description
図1は、第1実施形態の半導体装置の構造を示す平面図および断面図である。図2は、第1実施形態およびその変形例の半導体装置の構造を示す斜視図である。本実施形態の半導体装置は、電力用トランジスタとして、トレンチ型IGBTを備えている。
次に、図3および図4を参照して、第1実施形態の各半導体層の不純物濃度について説明する。
図6は、第2実施形態の半導体装置の構造を示す断面図である。
次に、図7を参照して、第2実施形態のバリア層17の不純物濃度について説明する。
13:エミッタ層(第3半導体層)、14:コンタクト層(第4半導体層)、
15:コレクタ層、16:バッファ層、
17:バリア層(第5半導体層)、17a:第1領域、17b:第2領域、
18:ゲート絶縁膜、19:ゲート電極(制御電極)、
21:絶縁膜、22:ゲート配線、
23:絶縁膜、24:エミッタ電極、25:コレクタ電極
Claims (6)
- 第1の面と、前記第1の面に対向する第2の面とを有する、第1導電型の第1半導体層と、
前記第1半導体層の前記第1の面に形成された、第2導電型の第2半導体層と、
前記第1および第2半導体層に絶縁膜を介して形成され、前記第1の面に平行な第1方向に延びている、複数の制御電極と、
前記第2半導体層の前記第1半導体層とは反対側に、前記第1方向に沿って交互に形成された、前記第1導電型の複数の第3半導体層および前記第2導電型の複数の第4半導体層と、
前記第2半導体層の前記第1半導体層側、または前記第2半導体層に包囲される位置に形成された、前記第1導電型の複数の第5半導体層とを備え、
前記第5半導体層は、前記第1方向に沿って互いに離間して配置されている、半導体装置。 - 前記第5半導体層は、前記第1半導体層の前記第1の面に垂直な第2方向に前記第3半導体層と重なる位置に設けられている、請求項1に記載の半導体装置。
- 前記第5半導体層間の隙間は、前記第1半導体層の前記第1の面に垂直な第2方向に前記第4半導体層と重なる位置に設けられている、請求項1または2に記載の半導体装置。
- 第1の面と、前記第1の面に対向する第2の面とを有する、第1導電型の第1半導体層と、
前記第1半導体層の前記第1の面に形成された、第2導電型の第2半導体層と、
前記第1および第2半導体層に絶縁膜を介して形成され、前記第1の面に平行な第1方向に延びている、複数の制御電極と、
前記第2半導体層の前記第1半導体層とは反対側に、前記第1方向に沿って交互に形成された、前記第1導電型の複数の第3半導体層および前記第2導電型の複数の第4半導体層と、
前記第2半導体層の前記第1半導体層側、または前記第2半導体層に包囲される位置に形成され、前記第1方向に延びている、前記第1導電型の第5半導体層とを備え、
前記第5半導体層は、前記第1導電型の不純物の実効的な不純物濃度の複数の極大点と複数の極小点とを、前記第1方向に沿って交互に有している、半導体装置。 - 前記極大点は、前記第1半導体層の前記第1の面に垂直な第2方向に前記第3半導体層と重なる位置に設けられている、請求項4に記載の半導体装置。
- 前記極小点は、前記第1半導体層の前記第1の面に垂直な第2方向に前記第4半導体層と重なる位置に設けられている、請求項4または5に記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
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JP2013185612A JP5941447B2 (ja) | 2013-09-06 | 2013-09-06 | 半導体装置 |
CN201410061291.5A CN104425581B (zh) | 2013-09-06 | 2014-02-24 | 半导体装置 |
US14/201,621 US9130007B2 (en) | 2013-09-06 | 2014-03-07 | Semiconductor device |
US14/819,064 US9318588B2 (en) | 2013-09-06 | 2015-08-05 | Semiconductor device |
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JP2013185612A JP5941447B2 (ja) | 2013-09-06 | 2013-09-06 | 半導体装置 |
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JP2015053400A true JP2015053400A (ja) | 2015-03-19 |
JP5941447B2 JP5941447B2 (ja) | 2016-06-29 |
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US (2) | US9130007B2 (ja) |
JP (1) | JP5941447B2 (ja) |
CN (1) | CN104425581B (ja) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018105729A1 (ja) * | 2016-12-08 | 2018-06-14 | 富士電機株式会社 | 半導体装置 |
WO2018105744A1 (ja) * | 2016-12-08 | 2018-06-14 | 富士電機株式会社 | 半導体装置 |
JP2019004060A (ja) * | 2017-06-15 | 2019-01-10 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2020047756A (ja) * | 2018-09-19 | 2020-03-26 | 株式会社東芝 | 半導体装置 |
JP2021103708A (ja) * | 2019-12-24 | 2021-07-15 | 株式会社デンソー | 絶縁ゲートバイポーラトランジスタ |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015046502A (ja) * | 2013-08-28 | 2015-03-12 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2010283128A (ja) * | 2009-06-04 | 2010-12-16 | Mitsubishi Electric Corp | 電力用半導体装置 |
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US5262339A (en) * | 1989-06-12 | 1993-11-16 | Hitachi, Ltd. | Method of manufacturing a power semiconductor device using implants and solid diffusion source |
JP3435635B2 (ja) | 1999-10-27 | 2003-08-11 | 株式会社豊田中央研究所 | 絶縁ゲート型半導体装置、およびその製造方法ならびにインバータ回路 |
JP2004022941A (ja) | 2002-06-19 | 2004-01-22 | Toshiba Corp | 半導体装置 |
JP3634830B2 (ja) * | 2002-09-25 | 2005-03-30 | 株式会社東芝 | 電力用半導体素子 |
JP3927111B2 (ja) | 2002-10-31 | 2007-06-06 | 株式会社東芝 | 電力用半導体装置 |
JP2005340626A (ja) | 2004-05-28 | 2005-12-08 | Toshiba Corp | 半導体装置 |
JP4575713B2 (ja) | 2004-05-31 | 2010-11-04 | 三菱電機株式会社 | 絶縁ゲート型半導体装置 |
JP5707681B2 (ja) | 2009-03-04 | 2015-04-30 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP2011055017A (ja) | 2010-12-17 | 2011-03-17 | Toshiba Corp | 半導体装置 |
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2013
- 2013-09-06 JP JP2013185612A patent/JP5941447B2/ja active Active
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2014
- 2014-02-24 CN CN201410061291.5A patent/CN104425581B/zh active Active
- 2014-03-07 US US14/201,621 patent/US9130007B2/en not_active Expired - Fee Related
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Patent Citations (1)
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JP2010283128A (ja) * | 2009-06-04 | 2010-12-16 | Mitsubishi Electric Corp | 電力用半導体装置 |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2018105729A1 (ja) * | 2016-12-08 | 2018-06-14 | 富士電機株式会社 | 半導体装置 |
WO2018105744A1 (ja) * | 2016-12-08 | 2018-06-14 | 富士電機株式会社 | 半導体装置 |
JPWO2018105729A1 (ja) * | 2016-12-08 | 2019-03-22 | 富士電機株式会社 | 半導体装置 |
JPWO2018105744A1 (ja) * | 2016-12-08 | 2019-04-25 | 富士電機株式会社 | 半導体装置 |
US10797045B2 (en) | 2016-12-08 | 2020-10-06 | Fuji Electric Co., Ltd. | Semiconductor device |
US10840363B2 (en) | 2016-12-08 | 2020-11-17 | Fuji Electric Co., Ltd. | Semiconductor device |
JP2019004060A (ja) * | 2017-06-15 | 2019-01-10 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
JP2020047756A (ja) * | 2018-09-19 | 2020-03-26 | 株式会社東芝 | 半導体装置 |
JP2021103708A (ja) * | 2019-12-24 | 2021-07-15 | 株式会社デンソー | 絶縁ゲートバイポーラトランジスタ |
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US20150069460A1 (en) | 2015-03-12 |
CN104425581B (zh) | 2017-09-15 |
CN104425581A (zh) | 2015-03-18 |
US20150340478A1 (en) | 2015-11-26 |
US9318588B2 (en) | 2016-04-19 |
JP5941447B2 (ja) | 2016-06-29 |
US9130007B2 (en) | 2015-09-08 |
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